摘要:
A method includes forming a patterned resist layer comprising a resist layer opening overlying a bond pad of a substrate. The resist layer opening is at least partially filled with a first solder component layer. A second solder component layer is formed on the first solder component layer. The patterned resist layer is removed. The first solder component layer and the second solder component layer are reflowed to form a lead free binary metal alloy solder bump electrically connected to the bond pad.
摘要:
An electronic device may include a substrate, a seed layer on the substrate, a barrier layer on the seed layer opposite the substrate, and an oxidation barrier on the barrier layer opposite the seed layer. The barrier layer and the seed layer comprise different materials, and the oxidation barrier and the barrier layer may comprise different materials. The seed layer may be undercut relative to the barrier layer and/or relative to the oxidation barrier so that the barrier layer and/or the oxidation barrier define a lip extending beyond the seed layer in a direction parallel with respect to a surface of the substrate. Related methods are also discussed.
摘要:
Methods of forming a solder structure may include providing a wafer including a plurality of die therein, and a solder wettable pad may be formed on one of the die adjacent an edge of the die. The solder wettable pad may have a length parallel to the edge of the die and a width perpendicular to the edge of the die wherein the length parallel to the edge of the die is greater than the width perpendicular to the edge of the die. A solder bump may be plated on the solder wettable pad, and the die may be separated from the wafer along the edge of the die after plating the solder bump on the solder wettable pad. Moreover, the solder bump may be reflowed on the solder wettable pad so that the solder structure extends laterally from the solder wettable pad beyond the edge of the die after separating the die from the wafer. Related structures are also discussed.
摘要:
Forming an electronic structure may include forming a seed layer on a substrate, and forming a mask on the seed layer. The mask may include an aperture therein exposing a portion of the seed layer, and a barrier layer may be formed on the exposed portion of the seed layer. A bump may be formed on the barrier layer, and the mask may be removed. In addition, portions of the seed layer may be selectively removed using the barrier layer as an etch mask.
摘要:
Methods of bonding two components may include positioning the components relative to one another to obtain a desired orientation. Once the desired orientation is obtained, the components can be bonded in the desired orientation with metal wherein a temperature of both components is maintained below a melting temperature of the metal while bonding. Related structures are also discussed.
摘要:
Solder bumps are fabricated by plating a first solder layer on an underbump metallurgy, plating a second solder layer having higher melting point than the first solder layer on the first solder layer and plating a third solder layer having lower melting point than the second solder layer on the second solder layer. The structure then is heated to below the melting point of the second solder layer but above the melting point of the first solder layer and the third solder layer, to alloy at least some of the first solder layer with at least some of the underbump metallurgy and to round the third solder layer. Accordingly, a trilayer solder bump may be fabricated wherein the first and third layers melt at lower temperatures than the second solder layer, to thereby round the outer surface of the solder bump and alloy the base of the solder bump to the underbump metallurgy, while allowing the structure of the intermediate layer to be preserved. Solder bump fabrication as described above may be particularly useful with lead-tin solder wherein the first solder layer is eutectic lead-tin solder, the second solder layer is lead-tin solder having higher lead content than eutectic lead-tin solder and the third solder layer is eutectic lead-tin solder. In yet other embodiments, the thickness and/or composition of the outer underbump metallurgy layer and/or of the first solder layer may be selected so that upon heating, sufficient tin from the first solder layer is alloyed with at least some of the outer underbump metallurgy layer, such that the first solder layer is converted to a fourth solder layer having the same lead content as the second solder layer. Bilayer solder bumps thereby may be provided.
摘要:
A flip-ship structure having a semiconductor substrate including an electronic device formed thereon, a contact pad on said semiconductor substrate electrically connected to said electronic device, a passivation layer on said semiconductor substrate and on said contact pad wherein said passivation layer defines a contact hole therein exposing a portion of said contact pad, an under-bump metallurgy structure on said passivation layer electrically contacting said portion of said contact pad that is exposed; and a solder structure on said under-bump metallurgy structure opposite said semiconductor substrate, said solder structure including an elongate portion on said elongate portion of said metallurgy structure opposite said contact pad and an enlarged width portion on said enlarged width portion of said metallurgy structure opposite said passivation layer.
摘要:
A solder bump structure on a microelectronic substrate including an electrical contact having an exposed portion. This solder bump structure includes an under bump metallurgy structure on the microelectronic substrate, and a solder structure on the under bump metallurgy structure opposite the microelectronic substrate. The metallurgy structure includes an elongate portion having a first end which electronically contacts the exposed portion of the electrical contact and an enlarged width portion connected to a second end of the elongate portion. The solder structure includes an elongate portion on the metallurgy structure and an enlarged width portion on the enlarged width portion of the metallurgy structure. Accordingly, the enlarged width portion of the solder structure can be formed on a portion of the microelectronic substrate other than the contact pad and still be electronically connected to the pad.
摘要:
A method for pretreating a solder surface for fluxless soldering is disclosed. The method uses a noble fluorine gas to remove surface oxides from solder surfaces, without the use of external stimulation. A noble fluorine gas is suffused across the solder surface to reduce or eliminate or chemically convert the surface oxides. The process can take place at atmospheric pressure and room temperature. A simple belt driven transport may be used to move the parts past a nozzle which emits the vapor in a system similar to a conventional solder reflow machine.
摘要:
A method of processing a wafer including a plurality of integrated circuit devices on a front side of the wafer, may include thinning the wafer from a back side opposite the front side. After thinning the wafer, a back side layer may be provided on the back side of the thinned wafer opposite the front side, and the back side layer may be configured to counter stress on the front side of the wafer including the plurality of integrated circuit devices thereon. After providing the back side layer, the plurality of integrated circuit devices may be separated. Related structures are also discussed.