公开(公告)号：US20030203661A1

公开(公告)日：2003-10-30

申请号：US10422749

申请日：2003-04-25

发明人： Atsushi Ono ,  Takuro Asazu ,  Shinji Yamaguchi

IPC分类号： H05K001/00 ,  H01R012/00

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L2224/05557 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/13018 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13611 ,  H01L2224/13644 ,  H01L2224/13664 ,  H01L2924/0001 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/3025 ,  H01L2224/05599

摘要： A first protection film (3) and a second protection film (4) are formed on an electrode pad (2). Bumps (5) are formed at sites where the deposited first and second protection films (3), (4) are both removed. The openings (3a) where the lower, first protection film (3) is removed are larger than the openings (4a) where the upper, second protection film (4) is removed, so that the upper, second protection film (4) has an overhanging structure. The bottom periphery of the bump (5) is formed to extend under the second protection film (4).

摘要翻译： 在电极焊盘（2）上形成第一保护膜（3）和第二保护膜（4）。 在沉积的第一和第二保护膜（3），（4）都被移除的位置处形成凸起（5）。 除去下部第一保护膜（3）的开口（3a）大于去除上部第二保护膜（4）的开口（4a），使得上部第二保护膜（4）具有 突出结构。 凸块（5）的底部周边形成为在第二保护膜（4）的下方延伸。

公开(公告)号：US06573598B2

公开(公告)日：2003-06-03

申请号：US09542291

申请日：2000-04-04

申请人： Shinji Ohuchi ,  Harufumi Kobayashi ,  Yasushi Shiraishi

发明人： Shinji Ohuchi ,  Harufumi Kobayashi ,  Yasushi Shiraishi

IPC分类号： H01L2348

CPC分类号： H01L24/14 ,  H01L21/78 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0384 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05541 ,  H01L2224/05556 ,  H01L2224/05571 ,  H01L2224/05599 ,  H01L2224/05647 ,  H01L2224/06505 ,  H01L2224/10145 ,  H01L2224/11334 ,  H01L2224/1147 ,  H01L2224/1148 ,  H01L2224/11849 ,  H01L2224/11902 ,  H01L2224/13006 ,  H01L2224/13018 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1319 ,  H01L2224/14 ,  H01L2224/14051 ,  H01L2224/1413 ,  H01L2224/14505 ,  H01L2224/14515 ,  H01L2224/16 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2224/97 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/351 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/01014 ,  H01L2224/13099 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device is disclosed which includes a semiconductor chip having a plurality of electrode pads on its upper surface; terminals such as copper posts formed on the upper surface of the semiconductor chip, and electrically connected to each of the electrode pads; a resin deposited on the upper surface of the semiconductor chip, encapsulating the terminals but exposing at least some of them to a predetermined height; and electroconductor members such as solder balls connected to the terminals. There is also disclosed a method of fabricating such a semiconductor device.

摘要翻译： 公开了一种半导体器件，其包括在其上表面上具有多个电极焊盘的半导体芯片; 端子，例如形成在半导体芯片的上表面上的铜柱，并且电连接到每个电极焊盘; 沉积在半导体芯片的上表面上的树脂，封装端子，但将其中的至少一些暴露于预定高度; 以及连接到端子的诸如焊球的电导体构件。 还公开了一种制造这种半导体器件的方法。

公开(公告)号：US20020145032A1

公开(公告)日：2002-10-10

申请号：US09753296

申请日：2000-12-29

申请人： FORMFACTOR INC

发明人： Igor Y. Khandros ,  Thomas H. Dozier ,  Gary W. Grube ,  Gaetan L. Mathieu

IPC分类号： B23K031/02 ,  H05K003/00 ,  H01R009/00 ,  B21D039/00

CPC分类号： H05K3/4015 ,  G01R1/06744 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/1111 ,  H01L2224/1112 ,  H01L2224/11334 ,  H01L2224/13018 ,  H01L2224/13144 ,  H01L2224/13582 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/45144 ,  H01L2224/81192 ,  H01L2924/00011 ,  H01L2924/01012 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K2203/049 ,  Y10T29/49146 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49204 ,  H01L2924/00012 ,  H01L2224/1134 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/01004

摘要： Interconnection elements for electronic components, exhibiting desirable mechanical characteristic (such as resiliency, for making pressure contacts) are formed by using a shaping tool (512) to shape an elongate core element (502) of a soft material (such as gold or soft copper wire) to have a springable shape (including cantilever beam, S-shape, U-shape), and overcoating the shaped core element with a hard material (such as nickel and its alloys), to impart to desired spring (resilient) characteristic to the resulting composite interconnection element. A final overcoat of a material having superior electrical qualities (e.g., electrical conductivity and/or solderability) may be applied to the composite interconnection element. The resulting interconnection elements may be mounted to a variety of electronic components, including directly to semiconductor dies and wafers (in which case the overcoat material anchors the composite interconnection element to a terminal (or the like) on the electronic component), may be mounted to support substrates for use as interposers and may be mounted to substrates for use as probe cards or probe card inserts. The shaping tool may be an anvil (622) and a die (624), and may nick or sever successive shaped portions of the elongate elements, and the elongate element may be of an inherently hard (springy) material. Methods of fabricating interconnection elements on sacrificial substrates are described. Methods of fabricating tip structures (258) and contact tips at the end of interconnection elements are also described.

摘要翻译： 通过使用成形工具（512）来形成软质材料（例如金或软铜）的细长芯元件（502），形成用于电子部件的互连元件，其具有期望的机械特性（例如弹性，用于形成压力接触） 电线）具有弹性形状（包括悬臂梁，S形，U形），并用硬质材料（例如镍及其合金）涂覆成形芯元件，以赋予期望的弹簧（弹性）特性 所得到的复合互连元件。 可以对复合互连元件施加具有优异电气质量（例如导电性和/或可焊性）的材料的最终外涂层。 所得到的互连元件可以安装到各种电子部件，包括直接连接到半导体管芯和晶片（在这种情况下，外罩材料将复合互连元件锚定到电子部件上的端子等），可以被安装 以支撑用作内插件的基板，并且可以安装到用作探针卡或探针卡插入件的基板。 成型工具可以是砧座（622）和模具（624），并且可以切割或切断细长元件的连续成形部分，并且细长元件可以是固有的硬（弹性）材料。 描述了在牺牲基板上制造互连元件的方法。 还描述了在互连元件的末端处制造尖端结构（258）和接触尖端的方法。

公开(公告)号：US20020063324A1

公开(公告)日：2002-05-30

申请号：US09994957

申请日：2001-11-27

申请人： NEC Corporation

发明人： Toshinori Shiina

IPC分类号： H01L023/02

CPC分类号： H01L24/83 ,  H01L21/563 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/72 ,  H01L24/81 ,  H01L24/90 ,  H01L2224/13018 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81903 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/05624 ,  H01L2924/00014 ,  H01L2224/05644

摘要： A semiconductor device allows for mounting by means of low load in a flip-chip mounting method, enables prevention of damage, enables an increase in the reliability of electrical connections in a high-temperature environment, and further, enables the efficient fabrication of miniaturized external connection electrodes. In semiconductor device 1, miniaturized external connection electrodes 12 are formed by lamination on electrodes of semiconductor chip 11, and these external connection electrodes electrically connect by means of contact with substrate wiring 21 while maintaining an elastically deformed state. The semiconductor device may further include elastic layer 13, bumps 14, and protective film 15.

摘要翻译： 半导体器件允许以倒装芯片安装方式通过低负载进行安装，能够防止损坏，能够在高温环境中提高电连接的可靠性，并且还能够有效地制造小型化的外部 连接电极。 在半导体装置1中，通过层叠在半导体芯片11的电极上形成小型化的外部连接电极12，并且这些外部连接电极通过与基板布线21的接触而电连接，同时保持弹性变形状态。 半导体器件还可以包括弹性层13，凸块14和保护膜15。

公开(公告)号：US06191489B1

公开(公告)日：2001-02-20

申请号：US09506634

申请日：2000-02-18

申请人： Günter Igel ,  Hans-Jürgen Gahle ,  Mirko Lehmann

发明人： Günter Igel ,  Hans-Jürgen Gahle ,  Mirko Lehmann

IPC分类号： H01L2348

CPC分类号： H01L24/12 ,  H01L23/3192 ,  H01L24/11 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19043 ,  H01L2924/351 ,  H01L2924/00

摘要： A process is provided for manufacturing a layer arrangement (1) having a bump for a flip chip or similar connection. The layer arrangement has a plurality of layers (2, 3, 4, 5, 6, 7, 11) made of solid material and stacked into a layer stack (8). A recess (10) that extends over several layers (2, 3, 4, 5, 6, 7, 11) is made in the layer stack (8) transverse to the coating planes of the layers (2, 3, 4, 5, 6, 7, 11). A bump material (14) is placed in the recess (10). A profiling is created on the lateral boundary wall of the recess (10) by removal of layer material of different layers (2, 3, 4, 5, 6, 7, 11) of the layer stack (8). The profiling, starting from the surface (9) of the layer stack (8) and progressing in layers to the inside of the recess (10), has at least two indentations (12) and at least one projection (13) located between them. After the production of the profiling, a bump material (14) is brought into the recess (10) in such a way that it grasps behind the indentations (12).

摘要翻译： 提供了一种用于制造具有用于倒装芯片或类似连接的凸块的层布置（1）的工艺。 层布置具有由固体材料制成并堆叠成层堆叠（8）的多个层（2,3,4,5,6,7,11）。 在层叠体（8）中横跨多层（2,3,4,5,6,7,11）的层（2,3,4,5,11）的涂层平面（2,3,4,5） ，6,7,11）。 凸起材料（14）放置在凹部（10）中。 通过去除层叠（8）的不同层（2,3,4,5,6,7,11）的层材料，在凹槽（10）的侧边界壁上形成轮廓。 从层叠体（8）的表面（9）开始并且分层进入凹部（10）的内部的成型具有至少两个凹口（12）和位于它们之间的至少一个突起（13） 。 在生产轮廓之后，将凸块材料（14）以这样一种方式被带到凹槽（10）中，使得它抓住压痕（12）的后面。

公开(公告)号：US6097097A

公开(公告)日：2000-08-01

申请号：US914769

申请日：1997-08-20

申请人： Tatsuya Hirose

发明人： Tatsuya Hirose

IPC分类号： H01L21/338 ,  H01L21/48 ,  H01L21/60 ,  H01L21/70 ,  H01L23/485 ,  H01L23/538 ,  H01L23/64 ,  H01L29/812 ,  H01L23/495 ,  H01L23/02 ,  H01L23/48 ,  H01L23/28

CPC分类号： H01L21/4853 ,  H01L23/5386 ,  H01L23/64 ,  H01L24/13 ,  H01L24/14 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/06102 ,  H01L2224/1147 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13099 ,  H01L2224/1403 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/73203 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12032 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13063 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011

摘要： A face-down-bonded semiconductor device having: a semiconductor substrate having a semiconductor electric/electronic circuit formed on the surface of the semiconductor substrate, the circuit having contact terminals; wiring pillars made of conductive material and disposed on the contact terminals on the surface of the semiconductor substrate; and support pillars disposed at positions different from the contact terminals on the surface of the semiconductor substrate, the support pillars each having a top surface generally at the same height as the height of each of the wiring pillars. The face-down-bonded semiconductor device can provide a sufficient support force and prevent degradation of the electrical characteristics.

摘要翻译： 一种面朝下键合半导体器件，具有：具有形成在半导体衬底的表面上的半导体电气/电子电路的半导体衬底，该电路具有接触端子; 由导电材料制成并布置在半导体衬底的表面上的接触端子上的接线柱; 以及设置在与半导体基板的表面上的接触端子不同的位置处的支撑柱，每个支撑柱具有大致与每个布线柱的高度相同的高度的顶表面。 面向下键合的半导体器件可以提供足够的支撑力并防止电特性的劣化。

公开(公告)号：US4862248A

公开(公告)日：1989-08-29

申请号：US694187

申请日：1985-01-23

申请人： Henrich Zeile ,  Heinz Sauermann

发明人： Henrich Zeile ,  Heinz Sauermann

IPC分类号： H01L21/60 ,  H01L21/331 ,  H01L23/48 ,  H01L23/485 ,  H01L29/73

CPC分类号： H01L24/72 ,  H01L24/13 ,  H01L24/14 ,  H01L2224/13 ,  H01L2224/13018 ,  H01L2224/13139 ,  H01L2224/13564 ,  H01L2224/13611 ,  H01L2224/14181 ,  H01L2224/81191 ,  H01L2224/819 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12043

摘要： In a contacting system for bipolar electronic circuit elements, more particularly semiconductor circuit elements, in which a circuit element body provided on at least one of two major surfaces located opposite each other with a thick, pressure-contact layer is held under pressure between two contact bodies interconnected by a housing, more particularly a soft glass housing. The risk of contact interruptions with frequent temperature variations in a range of from 0.degree. to 300.degree. C. is eliminated in that the thick pressure contact layers are subdivided into several contact blocks, preferably three or four, which are mutually separated and arranged beside each other.The surface of the contact blocks facing the contact bodies may be coated with a connection layer, which serves to establish during sealing into a soft glass envelope a connection by soldering or diffusion welding between the contact blocks and the contact bodies.

摘要翻译： 在用于双极电子电路元件的接触系统中，更具体地说，半导体电路元件，其中设置在彼此相对的两个主表面中的至少一个具有厚的压接层的电路元件主体被保持在两个触点 通过壳体互连的身体，更具体地说是软玻璃外壳。 消除了在0℃至300℃的范围内频繁温度变化的接触中断的风险，因为厚的压力接触层被细分为几个接触块，优选三个或四个，这两个接触块相互分离并布置在每个 其他。 面对接触体的接触块的表面可以涂覆有连接层，其用于在通过在接触块和接触体之间的焊接或扩散焊接将密封成软玻璃外壳的连接处建立连接层。

公开(公告)号：US20240363570A1

公开(公告)日：2024-10-31

申请号：US18141456

申请日：2023-04-30

申请人： Texas Instruments Incorporated

发明人： Jose Daniel Carlos Torres ,  Katleen Fajardo Timbol

IPC分类号： H01L23/00

CPC分类号： H01L24/13 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L23/31 ,  H01L23/4951 ,  H01L2224/03614 ,  H01L2224/03912 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05562 ,  H01L2224/05582 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05672 ,  H01L2224/0568 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11831 ,  H01L2224/13018 ,  H01L2224/13147 ,  H01L2224/16245

摘要： A semiconductor package comprises an integrated circuit having a contact and a conductive bump directly attached to the contact. The conductive bump has a sidewall with a roughened surface. A leadframe is electrically coupled to the conductive bump. An integrated circuit package mold covers portions of the conductive bump and the lead frame, the roughened surface of the conductive bump is configured to interlock with the integrated circuit package mold. An electrically conductive adhesive couples the conductive bump to the lead frame. The conductive bump comprises copper in one arrangement. The roughened surface of the conductive bump includes grooves along grain boundaries that separate copper grains. The roughened surface of the conductive bump is formed by etching with a diluted sulfuric peroxide solution.

公开(公告)号：US20240355763A1

公开(公告)日：2024-10-24

申请号：US18761075

申请日：2024-07-01

申请人： Advanced Semiconductor Engineering, Inc.

发明人： En Hao HSU ,  Kuo Hwa TZENG ,  Chia-Pin CHEN ,  Chi Long TSAI

IPC分类号： H01L23/00 ,  H01L23/16 ,  H01L23/31

CPC分类号： H01L23/562 ,  H01L23/16 ,  H01L23/3107 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/022 ,  H01L2224/02377 ,  H01L2224/13018

摘要： An electronic device package and manufacturing method thereof are provided. The electronic device package includes an electronic component including an active surface, a patterned conductive layer disposed on the active surface, an encapsulation layer disposed over the patterned conductive layer, and a buffer layer disposed between the patterned conductive layer and the encapsulation layer. The buffer layer is shaped and sized to alleviate a stress generated due to an interaction between the patterned conductive layer and the encapsulation layer.

公开(公告)号：US12027469B2

公开(公告)日：2024-07-02

申请号：US17500920

申请日：2021-10-13

申请人： Advanced Semiconductor Engineering, Inc.

发明人： En Hao Hsu ,  Kuo Hwa Tzeng ,  Chia-Pin Chen ,  Chi Long Tsai

IPC分类号： H01L23/31 ,  H01L23/00 ,  H01L23/16

CPC分类号： H01L23/562 ,  H01L23/16 ,  H01L23/3107 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/022 ,  H01L2224/02377 ,  H01L2224/13018

摘要： An electronic device package and manufacturing method thereof are provided. The electronic device package includes an electronic component including an active surface, a patterned conductive layer disposed on the active surface, an encapsulation layer disposed over the patterned conductive layer, and a buffer layer disposed between the patterned conductive layer and the encapsulation layer. The buffer layer is shaped and sized to alleviate a stress generated due to an interaction between the patterned conductive layer and the encapsulation layer.