公开(公告)号：US10102895B1

公开(公告)日：2018-10-16

申请号：US15686424

申请日：2017-08-25

Applicant: QUALCOMM Incorporated

Inventor： Xia Li ,  Seung Hyuk Kang

IPC: G11C11/00 ,  G11C11/16 ,  G11B5/39 ,  G11C11/15 ,  H01L43/08 ,  H01L27/105 ,  G11C11/412

Abstract: Back gate biasing magneto-resistive random access memory (MRAM) bit cells to reduce or avoid write operation failures caused by source degeneration are disclosed. In one aspect, an MRAM bit cell includes a magnetic tunnel junction (MTJ) device and an access transistor used to control reading and writing of the MRAM bit cell. To reduce or avoid source degeneration caused by a voltage at a source region of the access transistor in response to a write operation, a back gate bias voltage is applied to a back gate electrode of the access transistor, the back gate bias voltage controlled to be greater than or equal to a back gate voltage associated with the access transistor having a nominal threshold voltage corresponding to operation without source degeneration plus a voltage corresponding to the source region of the access transistor.

公开(公告)号：US10096649B2

公开(公告)日：2018-10-09

申请号：US15241595

申请日：2016-08-19

Applicant: QUALCOMM Incorporated

Inventor： Chando Park ,  Jimmy Jianan Kan ,  Seung Hyuk Kang

IPC: H01L27/22 ,  H01L43/10 ,  H01L43/12 ,  H01L43/08 ,  H01L43/02 ,  G11C11/16

Abstract: Aspects disclosed include reducing or avoiding metal deposition from etching magnetic tunnel junction (MTJ) devices. In one example, a width of a bottom electrode of an MTJ device is provided to be less than a width of the MTJ stack of the MTJ device. In this manner, etching of the bottom electrode may be reduced or avoided to reduce or avoid metal redeposition as a result of over-etching the MTJ device to avoid horizontal shorts between an adjacent device(s). In another example, a seed layer is embedded in a bottom electrode of the MTJ device. In this manner, the MTJ stack is reduced in height to reduce or avoid metal redeposition as a result of over-etching the MTJ device. In another example, an MTJ device includes an embedded seed layer in a bottom electrode which also has a width less than a width of the MTJ stack.

公开(公告)号：US20180284200A1

公开(公告)日：2018-10-04

申请号：US15474339

申请日：2017-03-30

Applicant: QUALCOMM Incorporated

Inventor： Wei-Chuan Chen ,  Wah Nam Hsu ,  Xia Li ,  Seung Hyuk Kang ,  Nicholas Ka Ming Stevens-Yu

IPC: G01R33/09 ,  H01L43/08 ,  H01L27/22 ,  G01R33/12

Abstract: Tunnel magneto-resistive (TMR) sensors employing TMR devices with different magnetic field sensitivities for increased detection sensitivity are disclosed. For example, a TMR sensor may be used as a biosensor to detect the presence of biological materials. In aspects disclosed herein, free layers of at least two TMR devices in a TMR sensor are fabricated to exhibit different magnetic properties from each other (e.g., MR ratio, magnetic anisotropy, coercivity) so that each TMR device will exhibit a different change in resistance to a given magnetic stray field for increased magnetic field detection sensitivity. For example, the TMR devices may be fabricated to exhibit different magnetic properties such that one TMR device exhibits a greater change in resistance in the presence of a smaller magnetic stray field, and another TMR device exhibits a greater change in resistance in the presence of a larger magnetic stray field.

公开(公告)号：US20180266991A1

公开(公告)日：2018-09-20

申请号：US15459556

申请日：2017-03-15

Applicant: QUALCOMM Incorporated

Inventor： Jimmy Jianan Kan ,  Peiyuan Wang ,  Chando Park ,  Seung Hyuk Kang

IPC: G01N27/74 ,  G01R33/12 ,  G01R33/09 ,  G01N33/543 ,  G01N27/12

CPC classification number: G01N27/745 ,  G01N27/122 ,  G01N33/5438 ,  G01R33/063 ,  G01R33/09 ,  G01R33/1269 ,  H01F10/3218

Abstract: Magneto-impedance (MI) sensors employing current confinement and exchange bias layer(s) for increased MI sensitivity are disclosed. MI sensors may be used as biosensors to detect biological materials. The sensing by the MI devices is based on a giant magneto-impedance (GMI) effect, which is very sensitive to a magnetic field. The GMI effect is a change in impedance of a magnetic material resulting from a change in skin depth of the magnetic material as a function of an external direct current (DC) magnetic field applied to the magnetic material and an alternating current (AC) current flowing through the magnetic material (or adjacent conductive materials). Thus, this change in impedance resulting from a magnetic stray field generated by magnetic nanoparticles can be detected in lower concentrations and measured to determine the amount of magnetic nanoparticles present, and thus the target analyte of interest.

公开(公告)号：US20180190338A1

公开(公告)日：2018-07-05

申请号：US15829004

申请日：2017-12-01

Applicant: QUALCOMM Incorporated

Inventor： Xia Li ,  Jeffrey Junhao Xu ,  Seung Hyuk Kang

IPC: G11C11/22 ,  H01L29/78 ,  H01L27/1159 ,  H01L29/49 ,  H01L29/47 ,  H01L29/51 ,  H01L29/16 ,  H01L21/768 ,  H01L21/02 ,  H01L29/66

CPC classification number: G11C11/2275 ,  G11C11/22 ,  G11C11/223 ,  G11C13/003 ,  H01L21/02148 ,  H01L21/02197 ,  H01L21/02532 ,  H01L21/28291 ,  H01L21/76841 ,  H01L21/76877 ,  H01L21/76897 ,  H01L27/1159 ,  H01L29/16 ,  H01L29/47 ,  H01L29/495 ,  H01L29/516 ,  H01L29/517 ,  H01L29/66643 ,  H01L29/66765 ,  H01L29/6684 ,  H01L29/7839 ,  H01L29/78391 ,  H01L29/78669 ,  H01L29/78678

Abstract: Ferroelectric-modulated Schottky non-volatile memory is disclosed. A resistive memory element is provided that is based on a semiconductive material. Metal elements are formed on a semiconductive material at two places such that two semiconductor-metal junctions are formed. The semiconductive material with the two semiconductor-metal junctions establishes a composite resistive element having a resistance and functions as a relatively fast switch with a relatively low forward voltage drop. Each metal element may couple a terminal to the resistive element. To provide a resistive element capable of being a resistive memory element to store distinctive memory states, a ferroelectric material is provided and disposed adjacent to the semiconductive material to create an electric field from a ferroelectric dipole. The orientation of the ferroelectric dipole changes the resistance of the resistive element to allow it to function as a resistive memory element.

公开(公告)号：US20180145838A1

公开(公告)日：2018-05-24

申请号：US15356112

申请日：2016-11-18

Applicant: QUALCOMM Incorporated

Inventor： Peiyuan Wang ,  Chando Park ,  Jimmy Jianan Kan ,  Seung Hyuk Kang

IPC: H04L9/32 ,  H04L9/08 ,  G06F21/72

CPC classification number: H04L9/3278 ,  G06F21/73 ,  H04L9/0866

Abstract: Exemplary features pertain to secure communications using Physical Unclonable Function (PUF) devices. Segments of a message to be encrypted are sequentially applied to a PUF device as a series of challenges to obtain a series of responses for generating a sequence of encryption keys, whereby a previous segment of the message is used to obtain a key for encrypting a subsequent segment of the message. The encrypted message is sent to a separate (receiving) device that employs a logical copy of the PUF device for decrypting the message. The logical copy of the PUF may be a lookup table or the like that maps all permissible challenges to corresponding responses for the PUF and may be generated in advance and stored in memory of the receiving device. The data to be encrypted may be further encoded to more fully exercise the PUF to enhance security. Decryption operations are also described.

公开(公告)号：US09691462B2

公开(公告)日：2017-06-27

申请号：US14499153

申请日：2014-09-27

Applicant: QUALCOMM Incorporated

Inventor： Seong-Ook Jung ,  Taehui Na ,  Byungkyu Song ,  Jung Pill Kim ,  Seung Hyuk Kang

IPC: G11C11/16 ,  G11C7/06 ,  G11C7/08 ,  G11C7/12

CPC classification number: G11C11/1673 ,  G11C7/062 ,  G11C7/065 ,  G11C7/08 ,  G11C7/12 ,  G11C11/165 ,  G11C11/1653 ,  G11C11/1655 ,  G11C11/1675 ,  G11C2207/002

Abstract: Systems and methods relate to operations on a magnetoresistive random access memory (MRAM) bit cell using a circuit configured in multiple phases. In a sensing circuit phase, the circuit configured to determine a first differential voltage between a data voltage across the bit cell and a reference voltage. In a pre-amplifying phase, the circuit is configured to pre-amplify the first differential voltage to generate a pre-amplified differential voltage, which does not have offset voltages that may arise due to process variations. In a sense amplifier phase, the circuit is configured to amplify the pre-amplified differential voltage in a latch. Generation of the pre-amplified differential voltage cancels offset voltages which may arise in the latch. In a write phase, the circuit is further configured to write a write data value to the MRAM bit cell.

公开(公告)号：US20170125481A1

公开(公告)日：2017-05-04

申请号：US15137437

申请日：2016-04-25

Applicant: QUALCOMM Incorporated

Inventor： Jimmy Jianan Kan ,  Chando Park ,  Matthias Georg Gottwald ,  Seung Hyuk Kang

IPC: H01L27/22 ,  H01L43/12 ,  G11C11/16 ,  H01L43/10 ,  H01L43/02 ,  H01L43/08

CPC classification number: H01L27/228 ,  G11C11/161 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: Magnetic tunnel junction (MTJ) devices with a heterogeneous free layer structure particularly suited for efficient spin-torque-transfer (STT) magnetic random access memory (MRAM) (STT MRAM) are disclosed. In one aspect, a MTJ structure with a reduced thickness first pinned layer section provided below a first tunnel magneto-resistance (TMR) barrier layer is provided. The first pinned layer section includes one pinned layer magnetized in one magnetic orientation. In another aspect, a second pinned layer section and a second TMR barrier layer are provided above a free layer section and above the first TMR barrier layer in the MTJ. The second pinned layer is magnetized in a magnetic orientation that is anti-parallel (AP) to that of the first pinned layer section. In yet another aspect, the free layer comprises first and second heterogeneous layers separated by an anti-ferromagnetic coupling spacer, the first and second heterogeneous layers differing in their magnetic anisotropy.

公开(公告)号：US09614143B2

公开(公告)日：2017-04-04

申请号：US14735006

申请日：2015-06-09

Applicant: QUALCOMM Incorporated

Inventor： Yu Lu ,  Wei-Chuan Chen ,  Seung Hyuk Kang

IPC: H01L43/02 ,  H01L43/08 ,  H01L43/12 ,  H01L27/22 ,  H01L43/10

CPC classification number: H01L43/02 ,  H01L27/222 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: A semiconductor device may include a magnetoresistive random-access memory (MRAM) trench having a first conductive barrier liner and a second conductive barrier liner. The MRAM trench may land on a hard mask of a magnetic tunnel junction (MTJ) within an MTJ region of the semiconductor device. The semiconductor device may also include a logic trench having the first conductive barrier liner. The semiconductor device may further include a logic via having the first conductive barrier liner. The logic via may land on a first portion of a conductive interconnect (Mx) within a logic region of the semiconductor device.

公开(公告)号：US09583696B2

公开(公告)日：2017-02-28

申请号：US14460731

申请日：2014-08-15

Applicant: QUALCOMM Incorporated

Inventor： Matthias Georg Gottwald ,  Chando Park ,  Xiaochun Zhu ,  Kangho Lee ,  Seung Hyuk Kang

IPC: G11C11/16 ,  H01L43/08

CPC classification number: H01L43/08 ,  G11C11/161 ,  G11C11/1673

Abstract: An apparatus includes a perpendicular magnetic anisotropy magnetic tunnel junction (pMTJ) device. The pMTJ device includes a storage layer and a reference layer. The reference layer includes a portion configured to produce a ferrimagnetic effect. The portion includes a first layer, a second layer, and a third layer. The second layer is configured to antiferromagnetically (AF) couple the first layer and the third layer during operation of the pMTJ device.

Abstract translation: 一种装置包括垂直磁各向异性磁隧道结（pMTJ）装置。 pMTJ设备包括存储层和参考层。 参考层包括被配置为产生亚铁磁效应的部分。 该部分包括第一层，第二层和第三层。 第二层被配置为在pMTJ器件的操作期间反铁磁（AF）耦合第一层和第三层。