Structure including a cross-bar router and method

    公开(公告)号:US12027226B2

    公开(公告)日:2024-07-02

    申请号:US17810018

    申请日:2022-06-30

    CPC classification number: G11C5/063 G11C11/22 G11C13/0028 G11C13/0069

    Abstract: The structure includes transistors in rows and columns and each having an electric field-based programmable threshold voltage at either a first threshold voltage (VT) or a second VT. The structure further includes first and second signal lines for the rows and columns, respectively. Each first signal line is connected to transistors in a row and each second signal line is connected to transistors in a column. When operated in a switch mode, the transistors may or may not become conductive depending upon their respective VTs. Conductive transistors form connected pairs of first and second signal lines and, thus, create signal paths. The structure can also include mode control circuitry to selectively operate the transistors in either a program mode to set a first VT or an erase mode to set a second VT and to concurrently operate the transistors in the switch mode.

    Smart compute resistive memory
    3.
    发明授权

    公开(公告)号:US11829775B2

    公开(公告)日:2023-11-28

    申请号:US17876321

    申请日:2022-07-28

    Applicant: NUMEM Inc.

    CPC classification number: G06F9/4418 G11C11/16 G11C11/22 G11C13/0004

    Abstract: Systems, methods and devices are disclosed for a smart compute memory circuitry that has the flexibility to perform a wide range of functions inside the memory via logic circuitry and an integrated processor. In one embodiment, the smart compute memory circuitry comprises an integrated processor and logic circuitry to enable adaptive System on a Chip (SOC) and electronics subsystem power or performance improvements, and adaptive memory management and control for the smart compute memory circuitry. A resistive memory array is coupled to the integrated processor.

Patent Agency Ranking