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公开(公告)号:US11195921B2
公开(公告)日:2021-12-07
申请号:US16412131
申请日:2019-05-14
Applicant: Infineon Technologies AG
Inventor: Ralf Siemieniec , Thomas Aichinger , Romain Esteve , Ravi Keshav Joshi , Shiqin Niu
IPC: H01L29/76 , H01L29/16 , H01L29/66 , H01L29/423 , H01L29/78
Abstract: A semiconductor device includes a gate electrode and a gate dielectric. The gate electrode extends from a first surface of a silicon carbide body into the silicon carbide body. The gate dielectric is between the gate electrode and the silicon carbide body. The gate electrode includes a metal structure and a semiconductor layer between the metal structure and the gate dielectric.
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公开(公告)号:US20210118986A1
公开(公告)日:2021-04-22
申请号:US17111551
申请日:2020-12-04
Applicant: Infineon Technologies AG
Inventor: Thomas Aichinger , Wolfgang Bergner , Paul Ellinghaus , Rudolf Elpelt , Romain Esteve , Florian Grasse , Caspar Leendertz , Shiqin Niu , Dethard Peters , Ralf Siemieniec , Bernd Zippelius
IPC: H01L29/06 , H01L29/16 , H01L21/265 , H01L29/423 , H01L29/66 , H01L27/088
Abstract: A semiconductor device includes gate trenches formed in a SiC substrate and extending lengthwise in parallel in a first direction. A trench interval which defines a space between adjacent gate trenches extends in a second direction perpendicular to the first direction. Source regions of a first conductivity type formed in the SiC substrate occupy a first part of the space between adjacent gate trenches. Body regions of a second conductivity type opposite the first conductivity type formed in the SiC substrate and below the source regions occupy a second part of the space between adjacent gate trenches. Body contact regions of the second conductivity type formed in the SiC substrate occupy a third part of the space between adjacent gate trenches. Shielding regions of the second conductivity type formed deeper in the SiC substrate than the body regions adjoin a bottom of at least some of the gate trenches.
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53.
公开(公告)号:US20200176580A1
公开(公告)日:2020-06-04
申请号:US16693909
申请日:2019-11-25
Applicant: Infineon Technologies AG
Inventor: Ralf Siemieniec , Thomas Aichinger , Iris Moder , Francisco Javier Santos Rodriguez , Hans-Joachim Schulze , Carsten von Koblinski
IPC: H01L29/49 , H01L29/16 , H01L29/40 , H01L29/423 , H01L29/45 , H01L29/78 , H01L21/02 , H01L21/04 , H01L29/66
Abstract: A silicon carbide device includes a silicon carbide substrate having a body region and a source region of a transistor cell. Further, the silicon carbide device includes a titanium carbide gate electrode of the transistor cell.
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公开(公告)号:US20190341447A1
公开(公告)日:2019-11-07
申请号:US16404284
申请日:2019-05-06
Applicant: Infineon Technologies AG
Inventor: Ralf Siemieniec , Thomas Aichinger , Thomas Basler , Wolfgang Bergner , Rudolf Elpelt , Romain Esteve , Michael Hell , Daniel Kueck , Caspar Leendertz , Dethard Peters , Hans-Joachim Schulze
Abstract: A semiconductor component has a gate structure that extends from a first surface into an SiC semiconductor body. A body area in the SiC semiconductor body adjoins a first side wall of the gate structure. A first shielding area and a second shielding area of the conductivity type of the body area have at least twice as high a level of doping as the body area. A diode area forms a Schottky contact with a load electrode between the first shielding area and the second shielding area.
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公开(公告)号:US10393697B2
公开(公告)日:2019-08-27
申请号:US14930295
申请日:2015-11-02
Applicant: Infineon Technologies AG
Inventor: Sabine Gruber , Thomas Aichinger , Stefan Krivec , Thomas Ostermann
IPC: G01N27/447 , G01N27/453 , G01N27/27 , G01N27/414
Abstract: An apparatus for analyzing ion kinetics in a dielectric probe structure includes an ion reservoir abutting the dielectric probe structure and configured to supply mobile ions to the dielectric probe structure, a capacitor structure configured to generate an electric field in the dielectric probe structure along a vertical direction, and an electrode structure configured to generate an electrophoretic force on mobile ions in the dielectric probe structure along a lateral direction. A method for analyzing ion kinetics in the dielectric probe structure of the apparatus is also provided.
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56.
公开(公告)号:US20190245075A1
公开(公告)日:2019-08-08
申请号:US16385817
申请日:2019-04-16
Applicant: Infineon Technologies AG
Inventor: Thomas Aichinger , Dethard Peters , Ralf Siemieniec
IPC: H01L29/78 , H01L29/06 , H01L29/10 , H01L29/08 , H01L29/16 , H01L29/04 , H01L29/739 , H01L29/423 , H01L27/02 , H01L27/06
CPC classification number: H01L29/7804 , H01L27/0207 , H01L27/0629 , H01L27/0727 , H01L29/04 , H01L29/045 , H01L29/0692 , H01L29/0696 , H01L29/0865 , H01L29/1095 , H01L29/1608 , H01L29/4236 , H01L29/7397 , H01L29/7813 , H01L29/861
Abstract: A semiconductor device includes a plurality of gate trenches formed in a first surface of a semiconductor body and extending lengthwise parallel to one another, transistor cells and diode regions formed in a mesa of the semiconductor body between neighboring ones of the gate trenches, and a drift region in the semiconductor body beneath the gate trenches. Each transistor cell includes a source zone and a body region. Each diode region includes a contact portion and a lower doped shielding portion. The source zone forms a first p-n junction with the body region, and the body region forms a second p-n junction with the drift region. The contact region extends to the first surface, and the shielding portion forms a third p-n junction with the drift region. The shielding portion extends under bottoms of the neighboring ones of the gate trenches.
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57.
公开(公告)号:US09960243B2
公开(公告)日:2018-05-01
申请号:US15358316
申请日:2016-11-22
Applicant: Infineon Technologies AG
Inventor: Thomas Aichinger , Wolfgang Bergner
IPC: H01L29/51 , H01L29/423 , H01L29/739 , H01L29/16 , H01L29/06 , H01L21/8234 , H01L29/78 , H01L21/02 , H01L21/04 , H01L23/00
CPC classification number: H01L29/4236 , H01L21/02236 , H01L21/02255 , H01L21/049 , H01L21/823462 , H01L24/48 , H01L29/0696 , H01L29/1608 , H01L29/42368 , H01L29/4238 , H01L29/7397 , H01L29/7813 , H01L2924/00014 , H01L2224/05599 , H01L2224/45099
Abstract: A semiconductor device includes a transistor cell with a stripe-shaped trench gate structure that extends from a first surface into a semiconductor body. A gate connector structure at a distance to the first surface is electrically connected to a gate electrode in the trench gate structure. A gate dielectric separates the gate electrode from the semiconductor body. First sections of the gate dielectric outside a vertical projection of the gate connector structure are thinner than second sections within the vertical projection of the gate connector structure.
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公开(公告)号:US09923066B2
公开(公告)日:2018-03-20
申请号:US15221122
申请日:2016-07-27
Applicant: Infineon Technologies AG
Inventor: Daniel Kueck , Thomas Aichinger , Franz Hirler , Anton Mauder
IPC: H01L29/40 , H01L29/78 , H01L29/739 , H01L29/10 , H01L29/423 , H01L29/06 , H01L29/16 , H01L29/20
CPC classification number: H01L29/408 , H01L29/0619 , H01L29/1095 , H01L29/1608 , H01L29/2003 , H01L29/407 , H01L29/42368 , H01L29/7397 , H01L29/7811 , H01L29/7813
Abstract: A semiconductor device includes a source zone electrically connected to a first load terminal, a contiguous zone isolating the source zone from a drift zone, and a trench extending into a semiconductor body along a vertical direction and including a first electrode electrically connected to a control terminal and an insulator in contact with the contiguous zone and which isolates the first electrode from the semiconductor body. The insulator has, at a trench bottom region, a first thickness along the vertical direction, and, at a trench top region, a second thickness along a lateral direction, the first thickness being greater than the second thickness by a factor of at least 1.5. The contiguous zone is arranged in contact with the insulator and extends further along the vertical direction than the trench, and the trench bottom region and the contiguous zone overlap along the lateral direction.
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公开(公告)号:US09923053B2
公开(公告)日:2018-03-20
申请号:US15400299
申请日:2017-01-06
Applicant: Infineon Technologies AG
Inventor: Romain Esteve , Dethard Peters , Wolfgang Bergner , Ralf Siemieniec , Thomas Aichinger , Daniel Kueck
IPC: H01L21/336 , H01L29/06 , H01L29/16 , H01L29/10 , H01L29/78 , H01L29/423 , H01L21/04 , H01L29/66
Abstract: A SIC transistor device includes a silicon-carbide semiconductor substrate having a plurality of first doped regions laterally spaced apart from one another and beneath a main surface of the substrate, a second doped region extending from the main surface to a third doped region that is above the first doped regions, and a plurality of fourth doped regions in the substrate extending from the main surface to the first doped regions. The second doped region has a first conductivity type. The first, third and fourth doped regions have a second conductivity type opposite the first conductivity type. A gate trench extends through the second and third doped regions. The gate trench has sidewalls, a bottom and rounded corners between the bottom and the sidewalls.
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公开(公告)号:US20170345905A1
公开(公告)日:2017-11-30
申请号:US15162716
申请日:2016-05-24
Applicant: Infineon Technologies AG
Inventor: Ralf Siemieniec , Dethard Peters , Romain Esteve , Wolfgang Bergner , Thomas Aichinger , Daniel Kueck , Roland Rupp , Bernd Zippelius , Karlheinz Feldrapp , Christian Strenger
IPC: H01L29/423 , H01L29/739 , H01L29/20 , H01L29/16 , H01L29/10 , H01L29/78 , H01L29/04
CPC classification number: H01L29/4236 , H01L29/04 , H01L29/045 , H01L29/0696 , H01L29/1095 , H01L29/1608 , H01L29/2003 , H01L29/407 , H01L29/66068 , H01L29/7397 , H01L29/7827
Abstract: A semiconductor device includes trench gate structures extending from a first surface into a semiconductor body from a wide-bandgap semiconductor material. The trench gate structures separate mesa portions of the semiconductor body from each other. In the mesa portions, body regions form first pn junctions with a drain structure and directly adjoin first mesa sidewalls. Source regions in the mesa portions form second pn junctions with the body regions, wherein the body regions separate the source regions from the drain structure. The source regions directly adjoin the first mesa sidewalls and second mesa sidewalls opposite to the first mesa sidewalls.
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