公开(公告)号：US20080111244A1

公开(公告)日：2008-05-15

申请号：US11559966

申请日：2006-11-15

申请人： Glenn J. Tessmer ,  Edgardo R. Hortaleza ,  Thad E. Briggs

发明人： Glenn J. Tessmer ,  Edgardo R. Hortaleza ,  Thad E. Briggs

IPC分类号： H01L21/56 ,  H01L23/50

CPC分类号： H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02126 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05083 ,  H01L2224/05147 ,  H01L2224/05157 ,  H01L2224/05166 ,  H01L2224/0518 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L2924/00

摘要： A semiconductor device having copper interconnecting metallization (111) protected by a first (102) and a second (120) overcoat layer (homogeneous silicon dioxide), portions of the metallization exposed in a window (103) opened through the thicknesses of the first and second overcoat layers. A patterned conductive barrier layer (130) is positioned on the exposed portion of the copper metallization and on portions of the second overcoat layer surrounding the window. A bondable metal layer (150) is positioned on the barrier layer; the thickness of this bondable layer is suitable for wire bonding. A third overcoat layer (160) consist of a homogeneous silicon nitride compound is positioned on the second overcoat layer so that the ledge (162, more than 500 nm high) of the third overcoat layer overlays the edge (150b) of the bondable metal layer. The resulting contoured chip surface improves the adhesion to plastic device encapsulation.

摘要翻译： 具有由第一（102）和第二（120）外涂层（均匀二氧化硅）保护的铜互连金属化（111）的半导体器件，暴露在窗口（103）中的金属化部分暴露在第一和/ 第二层涂层。 图案化的导电阻挡层（130）被定位在铜金属化的暴露部分上以及围绕窗口的第二覆盖层的部分上。 可粘合金属层（150）位于阻挡层上; 该可结合层的厚度适合于引线接合。 第三外涂层（160）由均匀的氮化硅化合物组成，位于第二外涂层上，使得第三外涂层的凸缘（162，大于500nm高）覆盖可粘合金属的边缘（150b） 层。 所形成的轮廓芯片表面改善了对塑料器件封装的粘附性。

公开(公告)号：US20070287279A1

公开(公告)日：2007-12-13

申请号：US11422988

申请日：2006-06-08

申请人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Santer

发明人： Timothy H. Daubenspeck ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Santer

IPC分类号： H01L21/44

CPC分类号： H01L24/11 ,  H01L24/05 ,  H01L24/12 ,  H01L2224/02126 ,  H01L2224/0401 ,  H01L2224/05018 ,  H01L2224/05022 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/1147 ,  H01L2224/11912 ,  H01L2224/13006 ,  H01L2224/13018 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2224/29099

摘要： A method for forming solder connections using dummy vias and the device. The dummy vias are formed prior to the application of ball limiting metals or solder material. After placing the under ball materials and the solder materials, the material covering the dummy vias has an increased surface contact and thus provide improved robustness and lifetime of the solder connection. Structures of implementation of the method are provided with either completely or partially filled dummy vias.

摘要翻译： 一种使用虚拟通孔和器件形成焊接连接​​的方法。 虚拟通孔在施加球限制金属或焊料材料之前形成。 在放置球底材料和焊料材料之后，覆盖虚拟通孔的材料具有增加的表面接触，从而提供改善的焊接连接的坚固性和寿命。 该方法的实现结构具有完全或部分填充的虚拟通孔。

公开(公告)号：US07265452B2

公开(公告)日：2007-09-04

申请号：US11073073

申请日：2005-03-04

申请人： Anthony M. Chiu

发明人： Anthony M. Chiu

IPC分类号： H01L29/40

CPC分类号： H01L24/85 ,  H01L24/03 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02126 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05009 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48472 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/4943 ,  H01L2224/73265 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85207 ,  H01L2224/85365 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/10157 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2924/00012

摘要： A system and method is disclosed for increasing the strength of a bond made by a small diameter wire in ball bonding. In one embodiment of the invention a structure for receiving a ball bond comprises substrate material that has portions that form a substrate cavity and a wire bond pad that covers and fills the substrate cavity. The wire bond pad also has portions that form a wire bond cavity for receiving the ball bond. The ball is wirebonded to the sides and bottom of the wire bond cavity. The sides of the wire bond cavity provide additional strength to the bond to resist shear and tensile forces that may act on the wire.

摘要翻译： 公开了一种用于增加由球形接合中的小直径线制成的接合强度的系统和方法。 在本发明的一个实施例中，用于接收球接合的结构包括具有形成衬底空腔的部分和覆盖并填充衬底腔的引线接合焊盘的衬底材料。 引线接合焊盘还具有形成用于接收球接合的引线接合腔的部分。 球与引线接合腔的侧面和底部引线键合。 引线接合腔的侧面为接合提供额外的强度，以抵抗可能作用在电线上的剪切力和拉力。

公开(公告)号：US20070117368A1

公开(公告)日：2007-05-24

申请号：US11601684

申请日：2006-11-20

申请人： Chi-Long Tsai ,  Wan-Huei Lu

发明人： Chi-Long Tsai ,  Wan-Huei Lu

IPC分类号： H01L21/44 ,  H01L23/48

CPC分类号： H01L24/11 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/02126 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05001 ,  H01L2224/0554 ,  H01L2224/10126 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01327 ,  H01L2924/014

摘要： The present invention relates to a structure of bumps forming on an under bump metallurgy layer (UBM layer) and a method for making the same. The structure comprises a wafer, a UBM layer, a second photo resist and a bump. The wafer has a plurality of solder pads and a protection layer, and the protection layer covers the surface of the wafer and exposes parts of the solder pads. The UBM layer is disposed on the solder pads and the protection layer and has an undercut structure. The second photo resist is disposed in the undercut structure. The bump is disposed on the UMB layer. Whereby, the UMB layer will not be reacted with bump in a reflow process and the problem of stress concentration will be avoided so as to make the bump more stable.

摘要翻译： 本发明涉及在凸块下冶金层（UBM层）上形成的凸块的结构及其制造方法。 该结构包括晶片，UBM层，第二光致抗蚀剂和凸块。 晶片具有多个焊盘和保护层，并且保护层覆盖晶片的表面并暴露部分焊盘。 UBM层设置在焊盘和保护层上并具有底切结构。 第二光刻胶设置在底切结构中。 凸块设置在UMB层上。 因此，在回流工艺中，UMB层不会与凸起反应，并且将避免应力集中的问题，以使凸块更稳定。

公开(公告)号：US20070052110A1

公开(公告)日：2007-03-08

申请号：US11306160

申请日：2005-12-19

申请人： Su-Tsai Lu

发明人： Su-Tsai Lu

IPC分类号： H01L23/48

CPC分类号： H01L24/16 ,  H01L23/3192 ,  H01L24/11 ,  H01L24/12 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/02126 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05684 ,  H01L2224/1147 ,  H01L2224/13016 ,  H01L2224/13019 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2224/16225 ,  H01L2224/26145 ,  H01L2224/27013 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/32225 ,  H01L2224/325 ,  H01L2224/73204 ,  H01L2224/81203 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/81903 ,  H01L2224/83051 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/83851 ,  H01L2924/00011 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/29075 ,  H01L2924/00014 ,  H01L2224/05552 ,  H01L2924/013

摘要： A chip structure including a chip, a passivation layer, an elastic layer and a metal layer is provided, with a bump disposed on the metal layer for electrically connecting a bonding pad of the chip. The passivation layer and the elastic layer are covering an active surface of the chip, and have an opening respectively for exposing top surface of the bonding pad, wherein the elastic layer is utilized to make the bump being heat-pressed onto a contact of a substrate with an enhanced electrical performance, and the elastic layer is made of for example polyimide or other macromolecule polymer. Moreover, the chip structure further includes a plurality of elastic granular structures at the bottom of the bump to enhance the bonding reliability of the bump.

摘要翻译： 提供了包括芯片，钝化层，弹性层和金属层的芯片结构，其中设置在金属层上的凸块用于电连接芯片的焊盘。 钝化层和弹性层覆盖芯片的有效表面，并且具有分别用于暴露焊盘顶表面的开口，其中弹性层用于使凸块被热压到基板的触点上 具有增强的电性能，并且弹性层由例如聚酰亚胺或其它高分子聚合物制成。 此外，芯片结构还包括在凸块的底部的多个弹性粒状结构，以增强凸块的结合可靠性。

公开(公告)号：US20050215048A1

公开(公告)日：2005-09-29

申请号：US10806519

申请日：2004-03-23

申请人： Lei Li ,  Edgardo Hortaleza

发明人： Lei Li ,  Edgardo Hortaleza

IPC分类号： H01L21/44 ,  H01L21/4763 ,  H01L21/66 ,  H01L23/485 ,  H01L29/40

CPC分类号： H01L24/05 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02126 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05147 ,  H01L2224/05157 ,  H01L2224/05166 ,  H01L2224/0518 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/85201 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01061 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L2924/00

摘要： A metal structure for a contact pad of an integrated circuit (IC), which has copper interconnecting metallization (311). A portion (301) of this metallization is exposed to provide a contact pad to the IC. A conductive barrier layer (330) is positioned on the exposed portion of the copper metallization. A plug (350) of bondable metal, preferably aluminum between about 0.4 and 1.4 μm thick, is positioned on the barrier layer. A protective overcoat layer (320) surrounds the plug and has a thickness (320b) so that the exposed surface (322) of the plug lies at or below the exposed surface (320a) of the overcoat layer. Optionally, a portion (321) of the overcoat layer between about 0.1 and 0.3 μm wide may overlap the perimeter of the plug.

摘要翻译： 一种用于集成电路（IC）的接触焊盘的金属结构，其具有铜互连金属化（311）。 暴露该金属化部分（301）以向IC提供接触焊盘。 导电阻挡层（330）位于铜金属化的暴露部分上。 可粘合金属的塞子（350）优选地在约0.4至1.4μm厚的铝之间，位于阻挡层上。 保护性外涂层（320）围绕塞子并具有厚度（320b），使得塞子的暴露表面（322）位于外涂层的暴露表面（320a）处或下方。 任选地，外涂层的约0.1至0.3μm宽的部分（321）可以与插塞的周边重叠。

公开(公告)号：US06940160B1

公开(公告)日：2005-09-06

申请号：US09700464

申请日：2000-03-08

申请人： Terunao Hanaoka ,  Haruki Ito ,  Kazuhiko Nozawa

发明人： Terunao Hanaoka ,  Haruki Ito ,  Kazuhiko Nozawa

IPC分类号： H01L21/60 ,  H01L21/768 ,  H01L23/31 ,  H01L23/485 ,  H01L23/48

CPC分类号： H01L21/76804 ,  H01L23/3114 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02126 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05018 ,  H01L2224/05548 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05562 ,  H01L2224/10126 ,  H01L2224/11474 ,  H01L2224/13007 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2924/0002 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/351 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device comprising: a semiconductor element (10) having a plurality of electrodes (12); an interconnect pattern (20) electrically connected to the electrodes (12); a plurality of laminated insulating layers (41, 42 and 43); and a plurality of external terminals (30) electrically connected to the interconnect pattern (20). A plurality of holes (44, 46, and 48) are respectively formed in the insulating layers (41, 42, and 43) to form an opening portion (40) communicating from the hole (48) in the highest insulating layer (43) to the hole (44) in the lowest insulating layer (41). An external terminal (30) is provided within the opening portion (40), and the second hole (46) formed in the higher positioned second insulating layer (42) is larger than the first hole (44) formed in the lower positioned first insulating layer (41).

摘要翻译： 一种半导体器件，包括：具有多个电极（12）的半导体元件（10）。 电连接到电极（12）的互连图案（20）; 多个层叠绝缘层（41,42和43）; 以及电连接到所述互连图案（20）的多个外部端子（30）。 在绝缘层（41,42和43）中分别形成有多个孔（44,46,48），以形成从最高绝缘层（43）中的孔（48）连通的开口部分（40） 到最低绝缘层（41）中的孔（44）。 在开口部（40）内设置有外部端子（30），形成在高位置的第二绝缘层（42）中的第二孔（46）比形成在下部的第一绝缘体（42）中的第一孔 层（41）。

公开(公告)号：US20050133914A1

公开(公告)日：2005-06-23

申请号：US11016504

申请日：2004-12-17

申请人： Haruki Ito

发明人： Haruki Ito

IPC分类号： H01L23/12 ,  H01L21/56 ,  H01L23/28 ,  H01L23/31 ,  H01L21/44 ,  H01L23/52

CPC分类号： H01L23/5226 ,  H01L23/293 ,  H01L23/3114 ,  H01L23/3192 ,  H01L23/49816 ,  H01L23/5329 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L24/17 ,  H01L2224/02125 ,  H01L2224/02126 ,  H01L2224/02331 ,  H01L2224/0236 ,  H01L2224/02373 ,  H01L2224/02375 ,  H01L2224/02377 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/024 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/13014 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/14131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/94 ,  H01L2924/0002 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/013 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/186 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2224/11

摘要： A semiconductor device is provided comprising: a semiconductor element including a plurality of electrodes; first wirings coupled to the electrodes and directed toward a center of the semiconductor element from a portion coupled to the electrodes; second wirings coupled between the first wirings and external terminals, the second wirings being directed to an outer area of the semiconductor element relative to the center; and at least one resin layer formed between the first wirings and the second wirings.

摘要翻译： 提供一种半导体器件，包括：包括多个电极的半导体元件; 第一布线耦合到电极并且从耦合到电极的部分引导到半导体元件的中心; 耦合在第一布线和外部端子之间的第二布线，第二布线相对于中心引导到半导体元件的外部区域; 以及形成在第一布线和第二布线之间的至少一个树脂层。

公开(公告)号：US06802945B2

公开(公告)日：2004-10-12

申请号：US10336871

申请日：2003-01-06

申请人： Hsien-Tsung Liu ,  Chien-Kang Chou ,  Ching-San Lin

发明人： Hsien-Tsung Liu ,  Chien-Kang Chou ,  Ching-San Lin

IPC分类号： C23C1434

CPC分类号： C23C14/564 ,  C23C14/022 ,  H01L21/0206 ,  H01L21/2855 ,  H01L21/316 ,  H01L21/32051 ,  H01L24/11 ,  H01L2224/02126 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05166 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/013

摘要： A method of forming a device, comprising the following steps. A wafer holder and inner walls of a chamber are coated with a seasoning layer The wafer is placed upon the wafer holder and is cleaned wherein a portion of the seasoning layer is re-deposited upon the wafer over and between adjacent wafer conductive structures. The wafer is removed from the chamber and at least two adjacent upper metal structures are formed over at least one portion of a metal barrier layer. The exposed portions of the metal barrier layer are etched and removed, exposing portions of the re-deposited seasoning layer portions using the metal barrier layer etch process which also removes any exposed portions of the re-deposited seasoning layer portions that are comprised of a material etchable in the metal barrier layer etch process.

摘要翻译： 一种形成装置的方法，包括以下步骤。 晶片保持器和腔室的内壁涂覆有调味剂层。晶片被放置在晶片保持器上并且被清洁，其中一部分调味剂层被重新沉积在晶片上并在相邻的晶片导电结构之间。 将晶片从腔室中取出，并且至少两个相邻的上部金属结构形成在金属阻挡层的至少一部分上。 蚀刻和去除金属阻挡层的暴露部分，使用金属阻挡层蚀刻工艺暴露重新沉积的调节层部分的部分，其还去除由材料构成的再沉积调理层部分的任何暴露部分 可在金属阻挡层蚀刻工艺中蚀刻。

公开(公告)号：US20030151141A1

公开(公告)日：2003-08-14

申请号：US10374965

申请日：2003-02-28

申请人： Fujitsu Limited

发明人： Hirohisa Matsuki ,  Yutaka Makino ,  Masamitsu Ikumo ,  Mitsutaka Sato ,  Tetsuya Fujisawa ,  Yoshitaka Aiba

IPC分类号： H01L023/48

CPC分类号： H01L24/05 ,  H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/94 ,  H01L24/96 ,  H01L2224/02126 ,  H01L2224/03462 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05 ,  H01L2224/05554 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/13006 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13099 ,  H01L2224/1358 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2224/814 ,  H01L2924/0001 ,  H01L2924/00011 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/351 ,  H05K3/244 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2224/81805

摘要： There is provided a structure in which a phosphorus-nickel layer, a rich phosphorus nickel layer that contains phosphorus or boron higher than this phosphorus-nickel layer, a nickel-tin ally layer, a tin-rich tin alloy layer, and a tin alloy solder layer are formed in sequence on an electrode. Accordingly, adhesiveness between a metal pattern used as the electrode, the wiring, or the pad and the solder can be improved.