公开(公告)号：US12021527B2

公开(公告)日：2024-06-25

申请号：US17170887

申请日：2021-02-08

Applicant: SeeQC, Inc.

Inventor： Oleg A. Mukhanov ,  Alexander F. Kirichenko ,  Dmitri Kirichenko

IPC: H03K19/195 ,  H01B12/02 ,  H01B12/16 ,  H03K3/38 ,  H10N60/10 ,  H10N60/12 ,  H10N69/00

CPC classification number: H03K19/195 ,  H01B12/02 ,  H01B12/16 ,  H03K3/38 ,  H10N60/10 ,  H10N60/12 ,  H10N69/00 ,  Y10T29/49124

Abstract: A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit element, wherein each respective bias circuit is superconducting during at least one time portion of the operation of a respective superconducting circuit element, and is configured to supply the variation in operating voltage over time to the respective superconducting circuit element.

公开(公告)号：US10014244B2

公开(公告)日：2018-07-03

申请号：US15214532

申请日：2016-07-20

Applicant: Dai Nippon Printing Co., Ltd.

Inventor： Takamasa Takano

IPC: H05K1/16 ,  H01L23/498 ,  H01L21/48 ,  H01L21/768 ,  H01L23/14 ,  H01L23/48 ,  H05K1/11 ,  H05K3/42 ,  H01L23/00 ,  H05K3/44

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49866 ,  H01L23/49894 ,  H01L24/17 ,  H01L2224/05647 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/01024 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/15786 ,  H01L2924/1579 ,  H05K1/113 ,  H05K3/426 ,  H05K3/445 ,  H05K2201/09436 ,  H05K2201/09581 ,  H05K2201/09609 ,  H05K2201/09836 ,  H05K2201/09854 ,  H05K2201/10378 ,  H05K2203/0733 ,  H05K2203/1178 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49165

Abstract: A method of manufacturing a through-hole electrode substrate includes forming a plurality of through-holes in a substrate, forming a plurality of through-hole electrodes by filling a conductive material into the plurality of through-holes, forming a first insulation layer on one surface of the substrate, forming a plurality of first openings which expose the plurality of through-hole electrodes corresponding to each of the plurality of through-hole electrodes, on the first insulation layer and correcting a position of the plurality of first openings using the relationship between a misalignment amount of a measured distance value of an open position of a leaning through-hole among the plurality of through-holes and of a design distance value of the open position of the leaning through-hole among the plurality of through-holes with respect to a center position of the substrate.

公开(公告)号：US10010279B2

公开(公告)日：2018-07-03

申请号：US15488886

申请日：2017-04-17

Applicant: Ascensia Diabetes Care Holdings AG

Inventor： Allen J Brenneman ,  Mihailo V. Rebec

IPC: A61B5/1477 ,  A61B5/1468 ,  A61B5/145 ,  C12Q1/00

CPC classification number: A61B5/1477 ,  A61B5/14507 ,  A61B5/14532 ,  A61B5/14546 ,  A61B5/1468 ,  C12Q1/006 ,  Y10T29/49124

Abstract: An electrochemical sensor system is adapted to assist in determining an analyte concentration of a fluid. The electrochemical sensor system comprises a substrate, conductive material and a hydrogel or liquid. The substrate having porosity therethrough. The conductive material includes at least one electrode. The at least one electrode is coupled to the substrate. The at least one electrode has a first surface and an opposing second surface. The hydrogel or liquid is adapted to assist in carrying the analyte of the fluid to the first and second surfaces of the at least one electrode.

公开(公告)号：US09992895B2

公开(公告)日：2018-06-05

申请号：US14804351

申请日：2015-07-21

Applicant: HTC Corporation

Inventor： I-Cheng Chuang ,  Yu-Jing Liao ,  Ying-Yen Cheng ,  Yin-Chou Chen

IPC: H05K3/30 ,  H05K7/06 ,  G06F1/16 ,  H04M1/02 ,  H05K13/00

CPC classification number: H05K7/06 ,  G06F1/1626 ,  H04M1/0202 ,  H04M1/0262 ,  H04M1/0266 ,  H04M1/0277 ,  H05K13/00 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128

Abstract: An electronic apparatus including a housing, a motherboard, a battery and a display module is provided. The housing has at least an opening and an accommodating space. The motherboard is disposed in the accommodating space. The battery is disposed in the accommodating space and stacked over the motherboard. The motherboard is located between the housing and the battery. The display module is disposed in the accommodating space and stacked over the battery. The battery is located between the motherboard and the display module. At least one edge of the battery in a width direction of the battery is closer to a corresponding side of the housing than a corresponding edge of the motherboard in a width direction of the motherboard.

公开(公告)号：US09961777B2

公开(公告)日：2018-05-01

申请号：US14112233

申请日：2012-04-17

Applicant: Bernhard Stering

Inventor： Bernhard Stering

IPC: H05K3/00 ,  H01L21/48 ,  H01L23/00 ,  H01L21/683 ,  H05K1/18 ,  H01L21/56

CPC classification number: H05K3/0052 ,  H01L21/481 ,  H01L21/561 ,  H01L21/6835 ,  H01L24/81 ,  H01L24/97 ,  H01L2221/68331 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/97 ,  H01L2924/00013 ,  H05K1/181 ,  Y10T29/49124 ,  H01L2224/81 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2924/014

Abstract: A trench (20) is introduced into a carrier (10) for electrical components (30) on a first surface (O10a) of the carrier into the material of the carrier (10). The carrier (10) is cut through by a cut (60) being introduced into the material of the carrier from a second surface (O10b) of the carrier (10), said second surface being situated opposite the first surface. The cut is implemented in such a way that the cut (60) runs through the trench (20) on the first surface (O10a) of the carrier. By providing a trench (20) in the material layers of the carrier (10) which are near the surface, it is possible to prevent material from breaking out of the carrier during the singulation of devices (1, 2).

公开(公告)号：US09907180B2

公开(公告)日：2018-02-27

申请号：US14737645

申请日：2015-06-12

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yoshihito Otsubo ,  Nobuaki Ogawa

IPC: H05K1/11 ,  H05K1/18 ,  H01L25/065 ,  H05K3/36 ,  H05K3/46 ,  H05K1/02 ,  H05K1/14 ,  H01L23/31 ,  H01L25/16 ,  H05K3/28

CPC classification number: H05K1/183 ,  H01L23/3121 ,  H01L25/0657 ,  H01L25/16 ,  H01L2224/16225 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06572 ,  H01L2924/1531 ,  H01L2924/19105 ,  H05K1/0298 ,  H05K1/144 ,  H05K3/284 ,  H05K3/36 ,  H05K3/4614 ,  H05K2201/042 ,  H05K2201/10242 ,  H05K2203/0156 ,  H05K2203/1316 ,  H05K2203/1327 ,  Y10T29/49124

Abstract: The present disclosure enhances the design flexibility of a multilayer electronic device. A multilayer electronic device is formed by alternately stacking, in a top-bottom direction, substrate layers in which substrates are disposed and a component layer in which at least one component is disposed. A non-superposing region in which a substrate of a first substrate layer positioned on the upper side of a first component layer is not superposed on a substrate of a second substrate layer positioned on the lower side of the first component layer, as viewed from above, is formed in the substrate. Accordingly, within the multilayer electronic device, a space in which the substrate of the second substrate layer is not located can be formed in a region under the non-superposing region of the substrate of the first substrate layer. By using this space, the design flexibility of the multilayer electronic device can be enhanced.

公开(公告)号：US09905303B2

公开(公告)日：2018-02-27

申请号：US15133217

申请日：2016-04-19

Applicant: Virident Systems, Inc.

Inventor： Ruban Kanapathippillai ,  Kenneth Alan Okin

IPC: G11C5/04 ,  G11C16/08 ,  G11C16/30 ,  G11C5/14 ,  H05K1/18 ,  H01R12/72 ,  H05K1/02

CPC classification number: G11C16/30 ,  G11C5/04 ,  G11C5/14 ,  G11C16/08 ,  H01R12/725 ,  H05K1/0286 ,  H05K1/181 ,  H05K2201/10159 ,  H05K2201/10212 ,  Y02P70/611 ,  Y10T29/49002 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/49169

Abstract: In one implementation, flash memory chips are provided with an operating power supply voltage to substantially match a power supply voltage expected at an edge connector of a dual inline memory module. The one or more of the flash memory chips and a memory support application integrated circuit (ASIC) may be mounted together into a multi-chip package for integrated circuits. The one or more flash memory chips and the memory support ASIC may be electrically coupled together by routing one or more conductors between each in the multi-chip package. The multi-chip package may be mounted onto a printed circuit board (PCB) of a flash memory DIMM to reduce the number of packages mounted thereto and reduce the height of the flash memory DIMM. The number of printed circuit board layers may also be reduced, such as by integrating address functions into the memory support ASIC.

公开(公告)号：US20180051484A1

公开(公告)日：2018-02-22

申请号：US15799491

申请日：2017-10-31

Applicant: Sargent Manufacturing Company

Inventor： Daniel J. Picard ,  Robert C. Hunt ,  Scott B. Lowder

IPC: E05B63/08 ,  G08B15/00 ,  E05B47/00 ,  H05K7/14

CPC classification number: E05B63/08 ,  E05B9/02 ,  E05B15/10 ,  E05B17/22 ,  E05B47/00 ,  E05B47/0012 ,  E05B47/0046 ,  E05B2047/0048 ,  E05B2047/0072 ,  G08B15/005 ,  H05K3/0058 ,  H05K7/1427 ,  H05K13/00 ,  H05K13/04 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T70/5155 ,  Y10T70/7062 ,  Y10T292/102 ,  Y10T292/1021

Abstract: Electrified access-control technology devices for a door, particularly electrified locks for a door, having embedded circuitry therein, and methods of making the same. One or more printed circuit boards (PCBs) having various electronic circuitry are secured inside a housing that encases an access-control device, particularly a lock, for a door. The one or more PCB(s) may be embedded on an internal surface of the housing such that the embedded PCB resides inside the housing along with the lock itself. The embedded PCB(s) avoid interference of both any working components of the lock inside the housing and any openings residing in the housing.

公开(公告)号：US20180023839A1

公开(公告)日：2018-01-25

申请号：US15714778

申请日：2017-09-25

Applicant: Honeywell International Inc.

Inventor： Petr Adamik ,  Tarik Khoury ,  Steven J. McPherson ,  Arnie Kalla ,  Eugene J. Takach ,  Mohammad Aljabari ,  Tracy Lentz ,  David Mulhouse

IPC: F24F11/00 ,  G05D23/32 ,  H01R4/34 ,  H02H9/00 ,  H05K13/00 ,  H05K1/11 ,  H05K3/32 ,  H05K5/00 ,  H05K7/14 ,  H05K9/00 ,  G02F1/1333 ,  H02H9/04

CPC classification number: F24F11/30 ,  F24F11/52 ,  G01K7/42 ,  G02F1/133308 ,  G02F2001/133314 ,  G05D23/1904 ,  G05D23/32 ,  H01R4/34 ,  H02G3/10 ,  H02G3/14 ,  H02H9/005 ,  H02H9/04 ,  H05F3/00 ,  H05K1/0254 ,  H05K1/111 ,  H05K3/32 ,  H05K5/0017 ,  H05K7/1422 ,  H05K7/1427 ,  H05K9/0037 ,  H05K9/0054 ,  H05K13/00 ,  H05K13/0015 ,  Y10T29/49002 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T29/49826

Abstract: An electronic assembly may have a display, a display holder, and a printed circuit board (PCB). The display may have a front side for viewing the display, a back side, and side walls extending between the front side and the back side. The display holder may have a recess for receiving at least part of the display, where the display holder may extend adjacent part of the front side of the display and adjacent at least part of the side walls of the display. The PCB may be secured relative to the display holder and adjacent the back side of the display. The PCB may be in operative communication with the display. In some cases, a spacer may be situated between the back side of the display and the PCB.

公开(公告)号：US09863942B2

公开(公告)日：2018-01-09

申请号：US12563091

申请日：2009-09-18

Applicant: Alastair McIndoe Hodges ,  Ronald Chatelier ,  Dennis Rylatt

Inventor： Alastair McIndoe Hodges ,  Ronald Chatelier ,  Dennis Rylatt

IPC: G01N33/53 ,  G01N33/543

CPC classification number: G01N33/5438 ,  G01N33/53 ,  G01N33/543 ,  G01N33/54326 ,  Y10T29/49124

Abstract: Disclosed herein are methods and devices for detecting the presence of an analyte of interest. A biosensor device can include a reaction chamber and an electrochemical detection chamber. The reaction chamber can include at least one immobilized binding site and a probe conjugate adapted to bind to at least one of the target analyte and the immobilized binding site while the detection chamber can include electrodes for detecting an electrochemical reaction. If present, the target analyte in the fluid sample results in a change in the amount of probe conjugate bound in the reaction chamber, which can be detected electrochemically in the detection chamber.