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公开(公告)号:US20230407522A1
公开(公告)日:2023-12-21
申请号:US18337493
申请日:2023-06-20
申请人: AXT, Inc.
发明人: Rajaram Shetty , Weiguo Liu , Morris Young
CPC分类号: C30B29/42 , C30B11/006 , H01L29/36 , H01L29/20 , H01L29/32 , C30B11/002 , H01L29/30
摘要: Methods and systems for low etch pit density 6 inch semi-insulating gallium arsenide wafers may include a semi-insulating gallium arsenide single crystal wafer having a diameter of 6 inches or greater without intentional dopants for reducing dislocation density, an etch pit density of less than 1000 cm−2, and a resistivity of 1×107 Ω-cm or more. The wafer may have an optical absorption of less than 5 cm−1 less than 4 cm−1 or less than 3 cm−1 at 940 nm wavelength. The wafer may have a carrier mobility of 3000 cm2/V-sec or higher. The wafer may have a thickness of 500 μm or greater. Electronic devices may be formed on a first surface of the wafer. The wafer may have a carrier concentration of 1.1×107 cm−3 or less.
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公开(公告)号:US11781241B2
公开(公告)日:2023-10-10
申请号:US17385925
申请日:2021-07-27
发明人: Ching-Shan Lin
IPC分类号: C30B23/02 , C30B29/36 , C30B23/06 , C01B32/956 , H01L29/30
CPC分类号: C30B23/025 , C30B23/066 , C30B29/36 , C01B32/956 , H01L29/30
摘要: A silicon carbide seed crystal and method of manufacturing the same, and method of manufacturing silicon carbide ingot are provided. The silicon carbide seed crystal has a silicon surface and a carbon surface opposite to the silicon surface. A difference D between a basal plane dislocation density BPD1 of the silicon surface BPD1 and a basal plane dislocation density BPD2 of the carbon surface satisfies the following formula (1):
D=(BPD1−BPD2)/BPD1≤25% (1).-
3.
公开(公告)号:US20180118568A9
公开(公告)日:2018-05-03
申请号:US14860226
申请日:2015-09-21
CPC分类号: C01B21/0632 , C01P2006/40 , C01P2006/90 , C30B23/02 , C30B29/403 , C30B29/406 , H01L21/0237 , H01L21/0254 , H01L21/02631 , H01L21/2056 , H01L29/2003 , H01L29/30
摘要: Systems and methods for MBE growing of group-III Nitride alloys, comprising establishing an average reaction temperature range from about 250 C to about 850 C; introducing a nitrogen flux at a nitrogen flow rate; introducing a first metal flux at a first metal flow rate; and periodically stopping and restarting the first metal flux according to a first flow duty cycle. According to another embodiment, the system comprises a nitrogen source that provides nitrogen at a nitrogen flow rate, and, a first metal source comprising a first metal effusion cell that provides a first metal at a first metal flow rate, and a first metal shutter that periodically opens and closes according to a first flow duty cycle to abate and recommence the flow of the first metal from the first metal source. Produced alloys include AN, InN, GaN, InGaN, and AlInGaN.
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公开(公告)号:US20170194137A1
公开(公告)日:2017-07-06
申请号:US14983586
申请日:2015-12-30
申请人: Siltronic AG
发明人: Wilhelmus Aarts , Jason Van Horn , Randal Gieker
IPC分类号: H01L21/02 , H01L29/30 , H01L21/3065
CPC分类号: H01L21/0262 , H01L21/02532 , H01L21/02576 , H01L21/02661 , H01L21/3065 , H01L29/30
摘要: A method for depositing a layer on a semiconductor wafer by vapor deposition in a process chamber, involves removing native oxide from a surface of the wafer; and then depositing an epitaxial layer with a thickness of at least 40 μm on the surface of the wafer by introducing a silicon containing gas and a carrier gas into the process chamber, wherein the flow rate of the silicon containing gas is lower than 10 standard liters per minute and the flow rate of the carrier gas is at least 40 standard liters per minute.
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公开(公告)号:US09401414B2
公开(公告)日:2016-07-26
申请号:US14547068
申请日:2014-11-18
发明人: Tsan-Chun Wang , Ziwei Fang
IPC分类号: H01L21/82 , H01L29/66 , H01L27/092 , H01L21/8238 , H01L21/265 , H01L29/78 , H01L29/165
CPC分类号: H01L29/7848 , H01L21/26506 , H01L21/26513 , H01L21/26586 , H01L21/26593 , H01L21/324 , H01L21/823807 , H01L21/823814 , H01L27/092 , H01L29/0847 , H01L29/165 , H01L29/30 , H01L29/66477 , H01L29/66492 , H01L29/66545 , H01L29/6656 , H01L29/6659 , H01L29/66636 , H01L29/78 , H01L29/7833 , H01L29/7847
摘要: A method of forming a semiconductor device includes forming a NMOS gate structure over a substrate. The method further includes forming an amorphized region in the substrate adjacent to the NMOS gate structure. The method also includes forming a lightly doped source/drain (LDD) region in the amorphized region. The method further includes depositing a stress film over the NMOS gate structure, performing an annealing process, and removing the stress film.
摘要翻译: 形成半导体器件的方法包括在衬底上形成NMOS栅极结构。 该方法还包括在与NMOS栅极结构相邻的衬底中形成非晶化区域。 该方法还包括在非晶化区域中形成轻掺杂的源极/漏极(LDD)区域。 该方法还包括在NMOS栅极结构上沉积应力膜,执行退火工艺和去除应力膜。
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公开(公告)号:US09337013B2
公开(公告)日:2016-05-10
申请号:US14122356
申请日:2012-05-14
申请人: Izumi Fusegawa , Ryoji Hoshi , Susumu Sonokawa , Hisayuki Saito
发明人: Izumi Fusegawa , Ryoji Hoshi , Susumu Sonokawa , Hisayuki Saito
IPC分类号: C30B15/00 , C30B15/14 , C30B15/20 , H01L21/02 , H01L21/322 , H01L29/30 , C30B29/06 , C30B33/00 , C30B33/02 , H01L29/34
CPC分类号: H01L21/02024 , C30B15/00 , C30B15/14 , C30B15/20 , C30B15/203 , C30B29/06 , C30B33/00 , C30B33/02 , H01L21/3221 , H01L29/30 , H01L29/34
摘要: Methods for producing a silicon wafer from a defect-free silicon single crystal grown by a Czochralski (CZ) method are provided. The methods comprise: preparing a silicon wafer obtained by slicing the defect-free silicon single crystal and subjected to mirror-polishing; then performing a heat treatment step of subjecting the mirror-polished silicon wafer to heat treatment at a temperature of 500° C. or higher but 600° C. or lower for 4 hours or more but 6 hours or less; and performing a repolishing step of repolishing the silicon wafer after the heat treatment step such that a polishing amount becomes 1.5 μm or more. Therefore, it is an object to provide a method by which a silicon wafer can be produced at a high yield, the silicon wafer in which Light Point Defects (LPDs) are reduced to a minimum, the silicon wafer with a low failure-incidence rate in an inspection step and a shipment stage.
摘要翻译: 提供了通过Czochralski(CZ)方法生长的无缺陷硅单晶制造硅晶片的方法。 所述方法包括:制备通过将无缺陷的硅单晶切片并进行镜面抛光获得的硅晶片; 然后进行热处理步骤,使经镜面抛光的硅晶片在500℃以上但600℃以下的温度下进行4小时以上6小时以下的热处理; 并且在热处理步骤之后执行重新抛光硅晶片的重新抛光步骤,使得抛光量变为1.5μm以上。 因此,本发明的目的是提供一种以高产率制造硅晶片的方法,将光点缺陷(LPD)降低到最小的硅晶片,故障发生率低的硅晶片 在检查步骤和出货阶段。
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公开(公告)号:US20160043182A1
公开(公告)日:2016-02-11
申请号:US14824880
申请日:2015-08-12
申请人: Avogy, Inc.
发明人: David P. Bour , Thomas R. Prunty , Linda Romano , Andrew P. Edwards , Isik C. Kizilyalli , Hui Nie , Richard J. Brown , Mahdan Raj
IPC分类号: H01L29/20 , H01L21/225 , H01L29/36 , H01L29/207 , H01L29/30
CPC分类号: H01L29/2003 , H01L21/0254 , H01L21/02579 , H01L21/02639 , H01L21/02647 , H01L21/2255 , H01L29/207 , H01L29/30 , H01L29/36 , H01L29/66204 , H01L29/8083 , H01L29/8611
摘要: A semiconductor device includes a III-nitride substrate having a first conductivity type and a first electrode electrically coupled to the III-nitride substrate. The semiconductor device also includes a III-nitride material having a second conductivity type coupled to the III-nitride substrate at a regrowth interface and a p-n junction disposed between the III-nitride substrate and the regrowth interface.
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公开(公告)号:US09165779B2
公开(公告)日:2015-10-20
申请号:US14644980
申请日:2015-03-11
发明人: Mark Loboda , Christopher Parfeniuk
IPC分类号: H01L29/15 , H01L21/306 , H01L21/02 , H01L29/16
CPC分类号: H01L21/30625 , B24B1/00 , B24B7/228 , B24B9/065 , B24B37/28 , C30B29/36 , C30B33/00 , H01L21/02008 , H01L21/02013 , H01L21/02019 , H01L21/02021 , H01L21/02024 , H01L21/02035 , H01L21/02378 , H01L21/0243 , H01L21/02529 , H01L21/02658 , H01L29/1608 , H01L29/30
摘要: Methods for manufacturing silicon carbide wafers having superior specifications for bow, warp, total thickness variation (TTV), local thickness variation (LTV), and site front side least squares focal plane range (SFQR). The resulting SiC wafer has a mirror-like surface that is fit for epitaxial deposition of SiC. The specifications for bow, warp, total thickness variation (TTV), local thickness variation (LTV), and site front side least squares focal plane range (SFQR) of the wafer are preserved following the addition of the epitaxy layer.
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公开(公告)号:US09035429B2
公开(公告)日:2015-05-19
申请号:US13681049
申请日:2012-11-19
发明人: Takayuki Nishiura , Keiji Ishibashi
IPC分类号: H01L29/20 , H01L29/04 , H01L21/306 , C09G1/02 , C30B29/40 , C30B33/00 , H01L21/02 , H01L29/30
CPC分类号: H01L21/30625 , C09G1/02 , C30B29/403 , C30B33/00 , H01L21/02024 , H01L29/30
摘要: There is provided a method of processing a surface of a group III nitride crystal, that includes the steps of: polishing a surface of a group III nitride crystal with a polishing slurry containing abrasive grains; and thereafter polishing the surface of the group III nitride crystal with a polishing liquid at least once, and each step of polishing with the polishing liquid employs a basic polishing liquid or an acidic polishing liquid as the polishing liquid. The step of polishing with the basic or acidic polishing liquid allows removal of impurity such as abrasive grains remaining on the surface of the group III nitride crystal after it is polished with the slurry containing the abrasive grains.
摘要翻译: 提供一种处理III族氮化物晶体的表面的方法,其包括以下步骤:用含有磨粒的抛光浆料抛光III族氮化物晶体的表面; 然后用研磨液将III族氮化物晶体的表面抛光至少一次,并且用抛光液研磨的每个步骤都使用碱性研磨液或酸性研磨液作为研磨液。 用碱性或酸性抛光液抛光的步骤允许在含有磨料颗粒的浆料抛光后,去除残留在III族氮化物晶体表面上的杂质,例如磨粒。
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公开(公告)号:US20140151762A1
公开(公告)日:2014-06-05
申请号:US13693954
申请日:2012-12-04
发明人: Tsan-Chun Wang , Ziwei Fang
IPC分类号: H01L29/78 , H01L27/092 , H01L29/66
CPC分类号: H01L29/7848 , H01L21/26506 , H01L21/26513 , H01L21/26586 , H01L21/26593 , H01L21/324 , H01L21/823807 , H01L21/823814 , H01L27/092 , H01L29/0847 , H01L29/165 , H01L29/30 , H01L29/66477 , H01L29/66492 , H01L29/66545 , H01L29/6656 , H01L29/6659 , H01L29/66636 , H01L29/78 , H01L29/7833 , H01L29/7847
摘要: A method of forming a semiconductor device includes forming a NMOS gate structure over a substrate. The method further includes forming an amorphized region in the substrate adjacent to the NMOS gate structure. The method also includes forming a lightly doped source/drain (LDD) region in the amorphized region. The method further includes depositing a stress film over the NMOS gate structure, performing an annealing process, and removing the stress film.
摘要翻译: 形成半导体器件的方法包括在衬底上形成NMOS栅极结构。 该方法还包括在与NMOS栅极结构相邻的衬底中形成非晶化区域。 该方法还包括在非晶化区域中形成轻掺杂的源极/漏极(LDD)区域。 该方法还包括在NMOS栅极结构上沉积应力膜,执行退火工艺和去除应力膜。
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