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47 条记录 (耗时 0.026 秒)

    HEAT CONTROLLED SWITCH
    1.
    发明公开
    HEAT CONTROLLED SWITCH 审中-公开

    公开(公告)号：US20230402241A1

    公开(公告)日：2023-12-14

    申请号：US17834944

    申请日：2022-06-08

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Yu-Wei Ting ,  Kuo-Pin Chang ,  Hung-Ju Li ,  Kuo-Ching Huang

    IPC分类号： H01H37/12 ,  H01H37/32

    CPC分类号： H01H37/12 ,  H01L35/12 ,  H01H37/32

    摘要： A semiconductor device is disclosed. The semiconductor device includes a semiconductor substrate, and a heater element on the semiconductor substrate, the heater element configured to generate heat in response to a current flowing therethrough. The semiconductor device also includes a conductor material having a programmable conductivity, and an insulator layer between the heater element and the conductor material, where the conductor material is configured to be programmed by applying one or more voltage differences to one or more of the heater element and the conductor material, and where a capacitance between the conductor material and the heater element is configured to be controlled by the voltage differences such that the capacitance is lower while the conductor material is being programmed than while the conductor material is not being programmed.

    Method of Forming an Embedded Memory Device
    3.
    发明申请
    Method of Forming an Embedded Memory Device 审中-公开
    形成嵌入式存储器件的方法

    公开(公告)号：US20150318292A1

    公开(公告)日：2015-11-05

    申请号：US14798743

    申请日：2015-07-14

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Yu-Wei Ting ,  Kuo-Ching Huang ,  Chih-Yang Pai

    IPC分类号： H01L27/115 ,  H01L29/423

    CPC分类号： H01L27/11521 ,  H01L29/40117 ,  H01L29/42324 ,  H01L29/42344 ,  H01L29/42356 ,  H01L29/66833 ,  H01L29/792

    摘要： The present disclosure describes a method of forming a memory device. The method includes receiving a wafer substrate, forming a poly stack pattern on the wafer substrate, performing an ion implantation process to form a source and a drain in the wafer substrate, forming a memory gate and a control gate in the defined poly stack pattern, and forming a control gate in the control poly stack pattern. Forming the memory gate further includes performing a memory gate recess to bury the memory gate in an oxide layer.

    摘要翻译： 本公开描述了形成存储器件的方法。 该方法包括接收晶片衬底，在晶片衬底上形成多晶堆叠图案，执行离子注入工艺以在晶片衬底中形成源极和漏极，在限定的多晶堆叠图案中形成存储栅极和控制栅极， 以及在所述控制多晶堆叠图案中形成控制栅极。 形成存储器栅极还包括执行存储器栅极凹槽以将存储栅极埋入氧化物层中。

    CROSS-POINT ARCHITECTURE FOR PCRAM
    9.
    发明公开
    CROSS-POINT ARCHITECTURE FOR PCRAM 审中-公开

    公开(公告)号：US20230380194A1

    公开(公告)日：2023-11-23

    申请号：US17751638

    申请日：2022-05-23

    申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

    发明人： Kuo-Pin Chang ,  Kuo-Ching Huang

    IPC分类号： H01L27/24 ,  H01L45/00 ,  G11C5/06

    CPC分类号： H01L27/249 ,  H01L27/2436 ,  H01L45/06 ,  G11C5/063 ,  H01L45/1608

    摘要： A cell array of a memory device includes: a first deck of memory cells arranged in a first row and a second row extending in a first horizontal direction and a plurality of columns extending in a second horizontal direction, wherein the memory cells in the second row in the first deck is displaced in the first horizontal direction with respect to the memory cells in the first row in the first deck; a first common word line metal track extending in the first horizontal direction, wherein both the memory cells in the first row and the memory cells in the second row are disposed on the first common word line metal track; and a plurality of first bit line metal tracks extending in the second horizontal direction, wherein each of the plurality of first bit line metal tracks is disposed on one of the first deck of memory cells.