公开(公告)号：US11894461B2

公开(公告)日：2024-02-06

申请号：US17537339

申请日：2021-11-29

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hsiang-Pi Chang ,  Yen-Tien Tung ,  Dawei Heh ,  Chung-Liang Cheng ,  I-Ming Chang ,  Yao-Sheng Huang ,  Tzer-Min Shen ,  Huang-Lin Chao

IPC分类号： H01L29/78 ,  H01L29/51 ,  H01L29/66 ,  H01L29/40

CPC分类号： H01L29/78391 ,  H01L29/401 ,  H01L29/516 ,  H01L29/6684 ,  H01L29/66545

摘要： A semiconductor device includes a semiconductor substrate, an interfacial layer formed on the semiconductor substrate, a high-k dielectric layer formed on the interfacial layer, and a conductive gate electrode layer formed on the high-k dielectric layer. At least one of the high-k dielectric layer and the interfacial layer is doped with: a first dopant species, a second dopant species, and a third dopant species. The first dopant species and the second dopant species form a plurality of first dipole elements having a first polarity. The third dopant species forms a plurality of second dipole elements having a second polarity, and the first and second polarities are opposite.

公开(公告)号：US11978674B2

公开(公告)日：2024-05-07

申请号：US17497128

申请日：2021-10-08

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： I-Ming Chang ,  Jung-Hung Chang ,  Chung-Liang Cheng ,  Hsiang-Pi Chang ,  Yao-Sheng Huang ,  Huang-Lin Chao

IPC分类号： H01L21/8234 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L21/823481 ,  H01L21/823418 ,  H01L21/823431 ,  H01L29/0665 ,  H01L29/42392 ,  H01L29/66742 ,  H01L29/785 ,  H01L29/78618 ,  H01L29/7869

摘要： A semiconductor device structure is provided. The semiconductor device structure includes a first source/drain epitaxial feature formed over a substrate, a second source/drain epitaxial feature formed over the substrate, two or more semiconductor layers disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature, a gate electrode layer surrounding a portion of one of the two or more semiconductor layers, a first dielectric region disposed in the substrate and in contact with a first side of the first source/drain epitaxial feature, and a second dielectric region disposed in the substrate and in contact with a first side of the second source/drain epitaxial feature, the second dielectric region being separated from the first dielectric region by a substrate.

公开(公告)号：US20240297244A1

公开(公告)日：2024-09-05

申请号：US18177381

申请日：2023-03-02

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： I-Ming Chang ,  Yao-Sheng Huang ,  Hsiang-Pi Chang ,  Yi-Ruei Jhan ,  Huang-Lin Chao

IPC分类号： H01L29/775 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66

CPC分类号： H01L29/775 ,  H01L21/823481 ,  H01L27/088 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545

摘要： A method for fabricating semiconductor devices includes forming a stack structure protruding from a substrate and including a plurality of first semiconductor layers and a plurality of second semiconductor layers stacked on top of one another. The method includes forming an isolation structure overlaying the substrate and a lower portion of the stack structure. The method includes implanting dopants into at least an upper portion of the isolation structure.

公开(公告)号：US20240178319A1

公开(公告)日：2024-05-30

申请号：US18431921

申请日：2024-02-02

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hsiang-Pi Chang ,  Yen-Tien Tung ,  Dawei Heh ,  Chung-Liang Cheng ,  I-Ming Chang ,  Yao-Sheng Huang ,  Tzer-Min Shen ,  Huang-Lin Chao

IPC分类号： H01L29/78 ,  H01L29/40 ,  H01L29/51 ,  H01L29/66

CPC分类号： H01L29/78391 ,  H01L29/401 ,  H01L29/516 ,  H01L29/66545 ,  H01L29/6684

摘要： A semiconductor device includes a substrate, an interfacial layer formed on the semiconductor substrate, and a high-k dielectric layer formed on the interfacial layer. At least one of the high-k dielectric layer and the interfacial layer is doped with: a first dopant species, a second dopant species, and a third dopant species. The first dopant species and the second dopant species form a plurality of first dipole elements having a first polarity. The third dopant species forms a plurality of second dipole elements having a second polarity. A first concentration ratio of the first concentration of the first dopant species to the second concentration of the second dopant species of the p-type transistor is different from a second concentration ratio of the first concentration of the first dopant species to the second concentration of the second dopant species of the n-type transistor.

公开(公告)号：US11842927B2

公开(公告)日：2023-12-12

申请号：US17330272

申请日：2021-05-25

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： I-Ming Chang ,  Chung-Liang Cheng ,  Hsiang-Pi Chang ,  Hung-Chang Sun ,  Yao-Sheng Huang ,  Yu-Wei Lu ,  Fang-Wei Lee ,  Ziwei Fang ,  Huang-Lin Chao

IPC分类号： H01L27/088 ,  H01L21/8234 ,  H01L21/324 ,  H01L21/768 ,  H01L29/66 ,  H01L29/78 ,  H01L29/161 ,  H01L21/02 ,  H01L29/423 ,  H01L21/8238

CPC分类号： H01L21/823431 ,  H01L21/02532 ,  H01L21/324 ,  H01L21/76832 ,  H01L21/823418 ,  H01L21/823437 ,  H01L21/823462 ,  H01L21/823857 ,  H01L27/0886 ,  H01L29/161 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

摘要： A semiconductor structure includes a substrate including a first region and a second region, a first channel layer disposed in the first region and a second channel layer disposed in the second region, a first dielectric layer disposed on the first channel layer and a second dielectric layer disposed on the second channel layer, and a first gate electrode disposed on the first dielectric layer and a second gate electrode disposed on the second dielectric layer. The first channel layer in the first region includes Ge compound of a first Ge concentration, the second channel layer in the second region includes Ge compound of a second Ge concentration. The first Ge concentration in the first channel layer is greater than the second Ge concentration in the second channel layer.

公开(公告)号：US20220278002A1

公开(公告)日：2022-09-01

申请号：US17187283

申请日：2021-02-26

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Yao-Sheng Huang ,  I-MING CHANG ,  Huang-Lin Chao

IPC分类号： H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/161 ,  H01L29/24 ,  H01L29/423 ,  H01L29/417 ,  H01L29/786 ,  H01L21/02 ,  H01L29/66

摘要： Embodiments of the present disclosure provide a method of forming N-type and P-type source/drain features using one patterned mask and one self-aligned mask to increase windows of error tolerance and provide flexibilities for source/drain features of various shapes and/or volumes. In some embodiments, after forming a first type of source/drain features, a self-aligned mask layer is formed over the first type of source/drain features without using photolithography process, thus, avoid damaging the first type of source/drain features in the patterning process.

公开(公告)号：US20240150192A1

公开(公告)日：2024-05-09

申请号：US18411962

申请日：2024-01-12

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hsiang-Pi CHANG ,  Chung-Liang Cheng ,  I-Ming Chang ,  Yao-Sheng Huang ,  Huang-Lin Chao

IPC分类号： C01F17/235

CPC分类号： C01F17/235 ,  B82Y40/00

摘要： A semiconductor device with different configurations of gate structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a gate opening on the fin structure, forming a metallic oxide layer within the gate opening, forming a first dielectric layer on the metallic oxide layer, forming a second dielectric layer on the first dielectric layer, forming a work function metal (WFM) layer on the second dielectric layer, and forming a gate metal fill layer on the WFM layer. The forming the first dielectric layer includes depositing an oxide material with an oxygen areal density less than an oxygen areal density of the metallic oxide layer.

公开(公告)号：US20230395433A1

公开(公告)日：2023-12-07

申请号：US18214558

申请日：2023-06-27

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Yao-Sheng Huang ,  I-Ming Chang ,  Huang-Lin Chao

IPC分类号： H01L21/8238 ,  H01L29/66 ,  H01L29/06 ,  H01L29/161 ,  H01L29/24 ,  H01L29/423 ,  H01L29/417 ,  H01L29/786 ,  H01L21/02 ,  H01L27/092

CPC分类号： H01L21/823814 ,  H01L29/66742 ,  H01L29/0665 ,  H01L29/161 ,  H01L29/24 ,  H01L29/42392 ,  H01L29/41733 ,  H01L29/78618 ,  H01L29/78696 ,  H01L21/0259 ,  H01L21/02521 ,  H01L21/02532 ,  H01L21/02236 ,  H01L21/02252 ,  H01L21/823807 ,  H01L21/823864 ,  H01L21/823871 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66636 ,  H01L27/092

摘要： Embodiments of the present disclosure provide a method of forming N-type and P-type source/drain features using one patterned mask and one self-aligned mask to increase windows of error tolerance and provide flexibilities for source/drain features of various shapes and/or volumes. In some embodiments, after forming a first type of source/drain features, a self-aligned mask layer is formed over the first type of source/drain features without using photolithography process, thus, avoid damaging the first type of source/drain features in the patterning process.

公开(公告)号：US11735483B2

公开(公告)日：2023-08-22

申请号：US17187283

申请日：2021-02-26

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Yao-Sheng Huang ,  I-Ming Chang ,  Huang-Lin Chao

IPC分类号： H01L21/8238 ,  H01L29/423 ,  H01L21/02 ,  H01L29/161 ,  H01L29/66 ,  H01L29/06 ,  H01L29/24 ,  H01L29/417 ,  H01L29/786 ,  H01L27/092

CPC分类号： H01L21/823814 ,  H01L21/0259 ,  H01L21/02236 ,  H01L21/02252 ,  H01L21/02521 ,  H01L21/02532 ,  H01L21/823807 ,  H01L21/823864 ,  H01L21/823871 ,  H01L27/092 ,  H01L29/0665 ,  H01L29/161 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66636 ,  H01L29/66742 ,  H01L29/78618 ,  H01L29/78696

摘要： Embodiments of the present disclosure provide a method of forming N-type and P-type source/drain features using one patterned mask and one self-aligned mask to increase windows of error tolerance and provide flexibilities for source/drain features of various shapes and/or volumes. In some embodiments, after forming a first type of source/drain features, a self-aligned mask layer is formed over the first type of source/drain features without using photolithography process, thus, avoid damaging the first type of source/drain features in the patterning process.

公开(公告)号：US20220310846A1

公开(公告)日：2022-09-29

申请号：US17537339

申请日：2021-11-29

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hsiang-Pi Chang ,  Yen-Tien Tung ,  Dawei Heh ,  Chung-Liang Cheng ,  I-Ming Chang ,  Yao-Sheng Huang ,  Tzer-Min Shen ,  Huang-Lin Chao

IPC分类号： H01L29/78 ,  H01L29/51 ,  H01L29/40 ,  H01L29/66

摘要： A semiconductor device includes a semiconductor substrate, an interfacial layer formed on the semiconductor substrate, a high-k dielectric layer formed on the interfacial layer, and a conductive gate electrode layer formed on the high-k dielectric layer. At least one of the high-k dielectric layer and the interfacial layer is doped with: a first dopant species, a second dopant species, and a third dopant species. The first dopant species and the second dopant species form a plurality of first dipole elements having a first polarity. The third dopant species forms a plurality of second dipole elements having a second polarity, and the first and second polarities are opposite.