公开(公告)号：US10079305B2

公开(公告)日：2018-09-18

申请号：US14861748

申请日：2015-09-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byeongchan Lee ,  Nam-Kyu Kim ,  JinBum Kim ,  Kwan Heum Lee ,  Choeun Lee ,  Sujin Jung

IPC: H01L29/06 ,  H01L29/165 ,  H01L29/78 ,  H01L21/02 ,  H01L21/76 ,  H01L29/08 ,  H01L29/66

CPC classification number: H01L29/7851 ,  H01L29/0649 ,  H01L29/0688 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/7848

Abstract: Provided are a semiconductor device and a method of fabricating the same. The device may include an active pattern protruding from a substrate, gate structures crossing the active pattern, and a source/drain region provided between adjacent ones of the gate structures. The source/drain region may include a source/drain epitaxial layer in a recessed region, which is formed in the active pattern between the adjacent ones of the gate structures. Further, an impurity diffusion region may be provided in the active pattern to enclose the source/drain epitaxial layer along inner surfaces of the recessed region.

公开(公告)号：US09853160B2

公开(公告)日：2017-12-26

申请号：US15135566

申请日：2016-04-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sujin Jung ,  JinBum Kim ,  Kang Hun Moon ,  Kwan Heum Lee ,  Byeongchan Lee ,  Choeun Lee ,  Yang Xu

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/08 ,  H01L29/66

CPC classification number: H01L29/7851 ,  H01L29/0847 ,  H01L29/66795 ,  H01L29/7848

Abstract: A semiconductor device is disclosed. The device includes a substrate including an active region defined by a device isolation layer, a fin pattern protruding from the substrate and extending in a first direction, the fin pattern including a gate fin region and a source/drain fin region, a gate pattern disposed on the gate fin region to extend in a second direction crossing the first direction, and a source/drain portion provided on a sidewall of the source/drain fin region. When measured in the second direction, a width of the source/drain fin region is different from a width in the second direction of the gate fin region.

公开(公告)号：US11705503B2

公开(公告)日：2023-07-18

申请号：US17038004

申请日：2020-09-30

Applicant: Samsung Electronics Co., Ltd. ,  Research & Business Foundation Sungkyunkwan University

Inventor： Jin Bum Kim ,  MunHyeon Kim ,  Hyoung Sub Kim ,  Tae Jin Park ,  Kwan Heum Lee ,  Chang Woo Noh ,  Maria Toledano Lu Que ,  Hong Bae Park ,  Si Hyung Lee ,  Sung Man Whang

IPC: H01L29/66 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786

CPC classification number: H01L29/66545 ,  H01L29/42392 ,  H01L29/6656 ,  H01L29/66439 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/78696

Abstract: A semiconductor device includes a substrate, a gate electrode on the substrate, a gate spacer on a sidewall of the gate electrode, an active pattern penetrating the gate electrode and the gate spacer, and an epitaxial pattern contacting the active pattern and the gate spacer. The gate electrode extends in a first direction. The gate spacer includes a semiconductor material layer. The active pattern extends in a second direction crossing the first direction.

公开(公告)号：US20160322495A1

公开(公告)日：2016-11-03

申请号：US15138840

申请日：2016-04-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kanghun Moon ,  JinBum Kim ,  Kwan Heum Lee ,  Choeun Lee ,  Sujin Jung ,  Yang Xu

IPC: H01L29/78 ,  H01L29/167 ,  H01L29/165 ,  H01L29/08 ,  H01L29/161

CPC classification number: H01L29/7848 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7851

Abstract: A semiconductor device includes an active pattern protruding from a substrate and extending in a first direction, first and second gate electrodes intersecting the active pattern in a second direction intersecting the first direction, and a source/drain region disposed on the active pattern between the first and second gate electrodes. The source/drain region includes a first part adjacent to an uppermost surface of the active pattern and provided at a level lower than the uppermost surface of the active pattern, and a second part disposed under the first part so as to be in contact with the first part. A width of the first part along the first direction decreases in a direction away from the substrate, and a width of the second part along the first direction increases in a direction away from the substrate.

Abstract translation: 半导体器件包括从衬底突出并沿第一方向延伸的有源图案，在与第一方向相交的第二方向上与有源图案相交的第一和第二栅电极以及设置在第一和第二方向上的有源图案之间的源/漏区域 和第二栅电极。 源极/漏极区域包括与有源图案的最上表面相邻并且设置在比有源图案的最上表面低的水平面处的第一部分，以及设置在第一部分下方以与第一部分接触的第二部分 第一部分。 沿着第一方向的第一部分的宽度沿离开基板的方向减小，并且沿着第一方向的第二部分的宽度在远离基板的方向上增加。

公开(公告)号：US11476327B2

公开(公告)日：2022-10-18

申请号：US17176667

申请日：2021-02-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong Hyuk Yeom ,  Kwan Heum Lee ,  Jun Kyum Kim ,  Seong Hwa Park ,  So Hyun Seo

IPC: H01L29/06 ,  H01L29/786 ,  H01L29/423 ,  H01L21/8238 ,  H01L29/10 ,  H01L29/08 ,  H01L27/092

Abstract: A semiconductor device includes a gate electrode extending in a first direction, on a substrate, first outer spacers extending along side surfaces of the gate electrode, a first active pattern extending in a second direction, which intersects the first direction, to penetrate the gate electrode and the first outer spacers, epitaxial patterns on the first active pattern and on side surfaces of the first outer spacers, second outer spacers between the first outer spacers and the epitaxial patterns and inner spacers between the substrate and the first active pattern and between the gate electrode and the epitaxial patterns, wherein in a cross section that intersects the second direction, at least parts of the second outer spacers are on side surfaces of the first active pattern and side surfaces of the inner spacers.

公开(公告)号：US09761719B2

公开(公告)日：2017-09-12

申请号：US14741454

申请日：2015-06-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Nam Kyu Kim ,  Dong Chan Suh ,  Kwan Heum Lee ,  Byeong Chan Lee ,  Cho Eun Lee ,  Su Jin Jung ,  Gyeom Kim ,  Ji Eon Yoon

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/417 ,  H01L29/08 ,  H01L29/165

CPC classification number: H01L29/7848 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/41766 ,  H01L29/7834

Abstract: A semiconductor device may include: a semiconductor substrate, a device isolating layer embedded within the semiconductor substrate and defining an active region, a channel region formed in the active region, a gate electrode disposed above the channel region, a gate insulating layer provided between the channel region and the gate electrode, and a silicon germanium epitaxial layer adjacent to the channel region within the active region and including a first epitaxial layer containing a first concentration of germanium, a second epitaxial layer containing a second concentration of germanium, higher than the first concentration, and a third epitaxial layer containing a third concentration of germanium, lower than the second concentration, the first to third epitaxial layers being sequentially stacked on one another in that order.

公开(公告)号：US20160027902A1

公开(公告)日：2016-01-28

申请号：US14805876

申请日：2015-07-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jieon Yoon ,  Seokhoon Kim ,  Gyeom Kim ,  Nam-Kyu Kim ,  JinBum Kim ,  Dong Chan Suh ,  Kwan Heum Lee ,  Byeongchan Lee ,  Choeun Lee ,  Sujin Jung

IPC: H01L29/66 ,  H01L29/08 ,  H01L21/02 ,  H01L29/78 ,  H01L29/04 ,  H01L21/265

CPC classification number: H01L29/66795 ,  H01L21/26506 ,  H01L21/30608 ,  H01L21/3247 ,  H01L21/823425 ,  H01L29/045 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7848

Abstract: Provided is a method of fabricating a semiconductor device. The method includes forming a gate pattern on a semiconductor substrate, injecting amorphization elements into the semiconductor substrate to form an amorphous portion at a side of the gate pattern, removing the amorphous portion to form a recess region, and forming a source/drain pattern in the recess region. When the recess region is formed, an etch rate of the amorphous portion is substantially the same in two different directions (e.g., and any other direction) of the semiconductor substrate.

Abstract translation: 提供一种制造半导体器件的方法。 该方法包括在半导体衬底上形成栅极图案，将非晶化元件注入到半导体衬底中以在栅极图案的一侧形成非晶部分，去除非晶部分以形成凹陷区域，并且形成源极/漏极图案 凹陷区域。 当形成凹陷区域时，非晶部分的蚀刻速率在半导体衬底的两个不同方向（例如，<111>和任何其它方向）上基本相同。

公开(公告)号：US20160020301A1

公开(公告)日：2016-01-21

申请号：US14707144

申请日：2015-05-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hong Bum Park ,  Dong Chan Suh ,  Kwan Heum Lee

IPC: H01L29/66

CPC classification number: H01L29/66636 ,  H01L29/165 ,  H01L29/665 ,  H01L29/66795 ,  H01L29/7834 ,  H01L29/7848

Abstract: Provided is a method of manufacturing a semiconductor device including: forming a gate electrode structure on an active region of a semiconductor substrate; forming recesses in regions positioned on both sides of the gate electrode structure on the active region; performing a pre-treatment on the recesses using an inert gas plasma; growing epitaxial layers for a source and a drain on the pre-treated recesses; and forming a source electrode structure and a drain electrode structure in the epitaxial layers for the source and the drain, respectively. Also provided is a method in which, after an etching process for forming recesses and/or after an etching process for forming a contact hole, an etched surface may be treated with an inert gas plasma before growing an epitaxial layer. Thus, one or two types of plasma treatment may be employed in the method.

Abstract translation: 提供一种制造半导体器件的方法，包括：在半导体衬底的有源区上形成栅电极结构; 在所述有源区上形成位于所述栅电极结构两侧的区域中的凹槽; 使用惰性气体等离子体对凹部进行预处理; 在预处理的凹槽上生长用于源极和漏极的外延层; 以及在源极和漏极的外延层中分别形成源极结构和漏极结构。 还提供了一种方法，其中在用于形成凹陷的蚀刻工艺和/或用于形成接触孔的蚀刻工艺之后，可以在生长外延层之前用惰性气体等离子体处理蚀刻表面。 因此，在该方法中可以采用一种或两种类型的等离子体处理。

公开(公告)号：US10319859B2

公开(公告)日：2019-06-11

申请号：US15844863

申请日：2017-12-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sujin Jung ,  JinBum Kim ,  Kang Hun Moon ,  Kwan Heum Lee ,  Byeongchan Lee ,  Choeun Lee ,  Yang Xu

IPC: H01L21/336 ,  H01L29/78 ,  H01L29/08 ,  H01L29/66 ,  H01L21/8234

Abstract: A semiconductor device is disclosed. The device includes a substrate including an active region defined by a device isolation layer, a fin pattern protruding from the substrate and extending in a first direction, the fin pattern including a gate fin region and a source/drain fin region, a gate pattern disposed on the gate fin region to extend in a second direction crossing the first direction, and a source/drain portion provided on a sidewall of the source/drain fin region. When measured in the second direction, a width of the source/drain fin region is different from a width in the second direction of the gate fin region.

公开(公告)号：US09881838B2

公开(公告)日：2018-01-30

申请号：US15413472

申请日：2017-01-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yoon Hae Kim ,  Jin Wook Lee ,  Jong Ki Jung ,  Myung Il Kang ,  Kwang Yong Yang ,  Kwan Heum Lee ,  Byeong Chan Lee

IPC: H01L21/82 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/308 ,  H01L29/08 ,  H01L21/311 ,  H01L21/3105 ,  H01L29/78 ,  H01L27/088 ,  H01L29/165 ,  H01L27/11 ,  H01L21/8238 ,  H01L27/092

CPC classification number: H01L21/823431 ,  H01L21/308 ,  H01L21/31053 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/823418 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823864 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/1104 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7848

Abstract: A semiconductor device includes a substrate having a first region and a second region, a plurality of first gate structures in the first region, the first gate structures being spaced apart from each other by a first distance, a plurality of second gate structures in the second region, the second gate structures being spaced apart from each other by a second distance, a first spacer on sidewalls of the first gate structures, a dielectric layer on the first spacer, a second spacer on sidewalls of the second gate structures, and a third spacer on the second spacer.