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    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    2.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20160322495A1

    公开(公告)日：2016-11-03

    申请号：US15138840

    申请日：2016-04-26

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kanghun Moon ,  JinBum Kim ,  Kwan Heum Lee ,  Choeun Lee ,  Sujin Jung ,  Yang Xu

    IPC: H01L29/78 ,  H01L29/167 ,  H01L29/165 ,  H01L29/08 ,  H01L29/161

    CPC classification number: H01L29/7848 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7851

    Abstract: A semiconductor device includes an active pattern protruding from a substrate and extending in a first direction, first and second gate electrodes intersecting the active pattern in a second direction intersecting the first direction, and a source/drain region disposed on the active pattern between the first and second gate electrodes. The source/drain region includes a first part adjacent to an uppermost surface of the active pattern and provided at a level lower than the uppermost surface of the active pattern, and a second part disposed under the first part so as to be in contact with the first part. A width of the first part along the first direction decreases in a direction away from the substrate, and a width of the second part along the first direction increases in a direction away from the substrate.

    Abstract translation: 半导体器件包括从衬底突出并沿第一方向延伸的有源图案，在与第一方向相交的第二方向上与有源图案相交的第一和第二栅电极以及设置在第一和第二方向上的有源图案之间的源/漏区域 和第二栅电极。 源极/漏极区域包括与有源图案的最上表面相邻并且设置在比有源图案的最上表面低的水平面处的第一部分，以及设置在第一部分下方以与第一部分接触的第二部分 第一部分。 沿着第一方向的第一部分的宽度沿离开基板的方向减小，并且沿着第一方向的第二部分的宽度在远离基板的方向上增加。

    Semiconductor devices
    4.
    发明授权
    Semiconductor devices 有权

    公开(公告)号：US11670638B2

    公开(公告)日：2023-06-06

    申请号：US17348962

    申请日：2021-06-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yang Xu ,  Hyunkwan Yu ,  Namkyu Cho ,  Dongmyoung Kim ,  Kanghun Moon ,  Sanggil Lee ,  Sihyung Lee

    IPC: H01L27/092 ,  H01L29/78

    CPC classification number: H01L27/0924 ,  H01L29/7851

    Abstract: A semiconductor device includes a plurality of active fins extending in a first direction, and spaced apart from each other in a second direction, the plurality of active fins having upper surfaces of different respective heights, a gate structure extending in the second across the plurality of active fins, a device isolation film on the substrate, a source/drain region on the plurality of active fins, and including an epitaxial layer on the plurality of active fins, an insulating spacer on an upper surface of the device isolation film and having a lateral asymmetry with respect to a center line of the source/drain region in a cross section taken along the second direction, an interlayer insulating region on the device isolation film and on the gate structure and the source/drain region, and a contact structure in the interlayer insulating region and electrically connected to the source/drain region.

    Semiconductor devices
    7.
    发明授权
    Semiconductor devices 有权

    公开(公告)号：US12062662B2

    公开(公告)日：2024-08-13

    申请号：US18142210

    申请日：2023-05-02

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yang Xu ,  Hyunkwan Yu ,  Namkyu Cho ,  Dongmyoung Kim ,  Kanghun Moon ,  Sanggil Lee ,  Sihyung Lee

    IPC: H01L27/092 ,  H01L29/78

    CPC classification number: H01L27/0924 ,  H01L29/7851

    Abstract: A semiconductor device includes a plurality of active fins extending in a first direction, and spaced apart from each other in a second direction, the plurality of active fins having upper surfaces of different respective heights, a gate structure extending in the second across the plurality of active fins, a device isolation film on the substrate, a source/drain region on the plurality of active fins, and including an epitaxial layer on the plurality of active fins, an insulating spacer on an upper surface of the device isolation film and having a lateral asymmetry with respect to a center line of the source/drain region in a cross section taken along the second direction, an interlayer insulating region on the device isolation film and on the gate structure and the source/drain region, and a contact structure in the interlayer insulating region and electrically connected to the source/drain region.

    SEMICONDUCTOR DEVICES
    8.
    发明公开
    SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20230420535A1

    公开(公告)日：2023-12-28

    申请号：US18195074

    申请日：2023-05-09

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kanghun Moon ,  Kyungho Kim ,  Kihwan Kim ,  Choeun Lee ,  Yonguk Jeon

    IPC: H01L29/423 ,  H01L29/66 ,  H01L29/417 ,  H01L29/786 ,  H01L29/06 ,  H01L29/775

    CPC classification number: H01L29/42392 ,  H01L29/66545 ,  H01L29/41775 ,  H01L29/78696 ,  H01L29/0673 ,  H01L29/775

    Abstract: A semiconductor device includes: an active region on a substrate extending in a first direction; a plurality of semiconductor layers spaced apart from each in a vertical direction on the active region, the plurality of semiconductor layers including lower and upper semiconductor layers; a gate structure on the substrate extending in a second direction to intersect the active region and the plurality of semiconductor layers; and a source/drain region on the active region and contacting the plurality of semiconductor layers. The source/drain region includes first epitaxial layers, including first layers on a side surface of the lower semiconductor layer and a second layer provided on and contacting the active region, and a second epitaxial layer contacts a side surface of the upper semiconductor layer in the first direction, and the first layer is between the second epitaxial layer and the side surface of the lower semiconductor layer.

    SEMICONDUCTOR DEVICES
    9.
    发明公开
    SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20230275091A1

    公开(公告)日：2023-08-31

    申请号：US18142210

    申请日：2023-05-02

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yang Xu ,  Hyunkwan Yu ,  Namkyu Cho ,  Dongmyoung Kim ,  Kanghun Moon ,  Sanggil Lee ,  Sihyung Lee

    IPC: H01L27/092 ,  H01L29/78

    CPC classification number: H01L27/0924 ,  H01L29/7851

    Abstract: A semiconductor device includes a plurality of active fins extending in a first direction, and spaced apart from each other in a second direction, the plurality of active fins having upper surfaces of different respective heights, a gate structure extending in the second across the plurality of active fins, a device isolation film on the substrate, a source/drain region on the plurality of active fins, and including an epitaxial layer on the plurality of active fins, an insulating spacer on an upper surface of the device isolation film and having a lateral asymmetry with respect to a center line of the source/drain region in a cross section taken along the second direction, an interlayer insulating region on the device isolation film and on the gate structure and the source/drain region, and a contact structure in the interlayer insulating region and electrically connected to the source/drain region.

    SEMICONDUCTOR DEVICES
    10.
    发明申请
    SEMICONDUCTOR DEVICES 有权

    公开(公告)号：US20220115375A1

    公开(公告)日：2022-04-14

    申请号：US17348962

    申请日：2021-06-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yang Xu ,  Hyunkwan Yu ,  Namkyu Cho ,  Dongmyoung Kim ,  Kanghun Moon ,  Sanggil Lee ,  Sihyung Lee

    IPC: H01L27/092 ,  H01L29/78

    Abstract: A semiconductor device includes a plurality of active fins extending in a first direction, and spaced apart from each other in a second direction, the plurality of active fins having upper surfaces of different respective heights, a gate structure extending in the second across the plurality of active fins, a device isolation film on the substrate, a source/drain region on the plurality of active fins, and including an epitaxial layer on the plurality of active fins, an insulating spacer on an upper surface of the device isolation film and having a lateral asymmetry with respect to a center line of the source/drain region in a cross section taken along the second direction, an interlayer insulating region on the device isolation film and on the gate structure and the source/drain region, and a contact structure in the interlayer insulating region and electrically connected to the source/drain region.

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