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    SEMICONDUCTOR PROCESS CHAMBER INCLUDING LOWER VOLUME UPPER DOME
    1.
    发明申请
    SEMICONDUCTOR PROCESS CHAMBER INCLUDING LOWER VOLUME UPPER DOME 审中-公开

    公开(公告)号：US20180355510A1

    公开(公告)日：2018-12-13

    申请号：US15869905

    申请日：2018-01-12

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Keum Seok Park ,  Gyeom Kim ,  Yi Hwan Kim ,  Sun Jung Kim ,  Pan Kwi Park ,  Jeong Ho Yoo

    IPC: C30B25/12 ,  C23C16/458

    CPC classification number: C30B25/12 ,  C23C16/4585 ,  H01L29/0847 ,  H01L29/66795

    Abstract: A semiconductor process chamber includes a susceptor, a base plate surrounding the susceptor, a liner on an inner sidewall of the base plate, and a preheat ring between the susceptor and the base plate and coplanar with the susceptor. The process chamber further includes an upper dome coupled to the base plate and covering an upper surface of the susceptor. The upper dome includes a first section on an upper surface of the base plate and a second section extending from the first section and overlapping the susceptor. The first section includes a first region on the upper surface of the base plate, a second region extending from the first region past the base plate, and a third region extending from the second region with a decreasing thickness to contact the second section.

    Method of fabricating semiconductor device
    2.
    发明授权
    Method of fabricating semiconductor device 有权

    公开(公告)号：US10128112B2

    公开(公告)日：2018-11-13

    申请号：US15595945

    申请日：2017-05-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Cho Eun Lee ,  Jin Bum Kim ,  Kang Hun Moon ,  Jae Myung Choe ,  Sun Jung Kim ,  Dong Suk Shin ,  Il Gyou Shin ,  Jeong Ho Yoo

    IPC: H01L21/336 ,  H01L21/02 ,  H01L21/223 ,  H01L29/66

    Abstract: A method of fabricating a semiconductor device is provided. The method includes forming a dummy gate electrode on a substrate, forming a trench on a side surface of the dummy gate electrode, performing a bake process of removing an impurity from the trench and forming a source/drain in the trench, wherein the bake process comprises a first stage and a second stage following the first stage, an air pressure in which the substrate is disposed during the first stage is different from an air pressure in which the substrate is disposed during the second stage, and the bake process is performed while the substrate is on a stage rotating the substrate, wherein a revolution per minute (RPM) of the substrate during the first stage is different from a revolution per minute (RPM) of the substrate during the second stage.

    Semiconductor device
    5.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US12245440B2

    公开(公告)日：2025-03-04

    申请号：US17692369

    申请日：2022-03-11

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Ki Hwan Kim ,  Jeong Ho Yoo ,  Cho Eun Lee ,  Yong Uk Jeon ,  Young Dae Cho

    IPC: H01L29/786 ,  H01L29/417 ,  H01L29/66 ,  H10D30/67 ,  H10D64/01

    Abstract: A semiconductor includes an active pattern with a lower pattern and sheet patterns spaced apart from the lower pattern in a first direction, a source/drain pattern on the lower pattern, the source/drain pattern being in contact with the sheet patterns, and gate structures on opposite sides of the source/drain pattern, the gate structures being spaced apart from each other along a second direction and including gate electrodes that surround the sheet patterns, wherein the source/drain pattern includes a first epitaxial region having at least one of antimony and bismuth, the first epitaxial region having a bottom part in contact with the lower pattern, but not with the sheet patterns, and a thickness of the bottom part increasing and decreasing away from the gate structures in the second direction, and a second epitaxial region on the first epitaxial region, the second epitaxial region including phosphorus.

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