公开(公告)号：US11821106B2

公开(公告)日：2023-11-21

申请号：US15869905

申请日：2018-01-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keum Seok Park ,  Gyeom Kim ,  Yi Hwan Kim ,  Sun Jung Kim ,  Pan Kwi Park ,  Jeong Ho Yoo

IPC: C30B25/12 ,  C23C16/458 ,  H01L29/66 ,  H01L29/08

CPC classification number: C30B25/12 ,  C23C16/4585 ,  H01L29/0847 ,  H01L29/66636 ,  H01L29/66795

Abstract: A semiconductor process chamber includes a susceptor, a base plate surrounding the susceptor, a liner on an inner sidewall of the base plate, and a preheat ring between the susceptor and the base plate and coplanar with the susceptor. The process chamber further includes an upper dome coupled to the base plate and covering an upper surface of the susceptor. The upper dome includes a first section on an upper surface of the base plate and a second section extending from the first section and overlapping the susceptor. The first section includes a first region on the upper surface of the base plate, a second region extending from the first region past the base plate, and a third region extending from the second region with a decreasing thickness to contact the second section.

公开(公告)号：US10084049B2

公开(公告)日：2018-09-25

申请号：US15685255

申请日：2017-08-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Bum Kim ,  Gyeom Kim ,  Seok Hoon Kim ,  Tae Jin Park ,  Jeong Ho Yoo ,  Cho Eun Lee ,  Hyun Jung Lee ,  Sun Jung Kim ,  Dong Suk Shin

IPC: H01L27/12 ,  H01L29/417 ,  H01L27/092 ,  H01L29/51 ,  H01L29/423 ,  H01L21/02 ,  H01L21/3205

CPC classification number: H01L29/41725 ,  H01L21/02425 ,  H01L21/28518 ,  H01L21/32053 ,  H01L21/823814 ,  H01L21/823821 ,  H01L23/485 ,  H01L27/0924 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/41791 ,  H01L29/42356 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/7848 ,  H01L2924/0002

Abstract: A semiconductor device includes: a substrate having an active region; a gate structure disposed in the active region; source/drain regions respectively formed within portions of the active region disposed on both sides of the gate structure; a metal silicide layer disposed on a surface of each of the source/drain regions; and contact plugs disposed on the source/drain regions and electrically connected to the source/drain regions through the metal silicide layer, respectively. The metal silicide layer is formed so as to have a monocrystalline structure.

公开(公告)号：US12206026B2

公开(公告)日：2025-01-21

申请号：US18207274

申请日：2023-06-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Hun Lee ,  Dong Woo Kim ,  Dong Chan Suh ,  Sun Jung Kim

IPC: H01L29/78 ,  B82Y10/00 ,  H01L21/02 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device includes a drain, a source, a gate electrode, and a nanowire between the source and drain. The nanowire has a first section with a first thickness and a second section with a second thickness greater than the first thickness. The second section is between the first section and at least one of the source or drain. The first nanowire includes a channel when a voltage is applied to the gate electrode.

公开(公告)号：US10790133B2

公开(公告)日：2020-09-29

申请号：US15416408

申请日：2017-01-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keum Seok Park ,  Sun Jung Kim ,  Yi Hwan Kim ,  Pan Kwi Park ,  Dong Suk Shin ,  Hyun Kwan Yu ,  Seung Hun Lee

IPC: B08B7/00 ,  B08B7/04 ,  H01L21/02 ,  H01L21/67 ,  H01L21/687 ,  H01L29/66 ,  H01J37/32 ,  H01L21/683 ,  H01L29/78 ,  H01L29/165

Abstract: A precleaning apparatus includes a chamber having an internal space in which a substrate is cleaned, a substrate support disposed in the chamber and configured to support the substrate, a plasma generation unit disposed in the chamber and configured to generate plasma gas, a heating unit configured to heat the substrate on the substrate support, a cleaning gas supply unit configured to supply gas for oxide etching to the internal space of the chamber, and a hydrogen gas supply unit configured to supply hydrogen gas to the internal space of the chamber.

公开(公告)号：US20160366359A1

公开(公告)日：2016-12-15

申请号：US14989220

申请日：2016-01-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Han Soo Lee ,  Hee Sung Chae ,  Kyung Min Kim ,  Dah Som Kim ,  Sun Jung Kim ,  Seung Hoon Jung

IPC: H04N5/378 ,  H04N5/232

CPC classification number: H04N5/378 ,  H03M1/00 ,  H03M1/123 ,  H03M1/56 ,  H04N5/357

Abstract: The image sensor includes a first analog-to-digital converter configured to convert a first analog pixel signal output from a first pixel in a row into first digital signals, a second analog-to-digital converter configured to convert a second analog pixel signal output from a second pixel in the row into second digital signals, a first output circuit configured to output a first bit value at a first position in the first digital signals in response to a first enable control signal, and a second output circuit configured to output a second bit value at a second position in the second digital signals in response to a second enable control signal, the second position in the second digital signals corresponding to the first position in the first digital signals, wherein the second enable control signal is activated with a delay from the activation of the first enable control signal.

Abstract translation: 图像传感器包括：第一模数转换器，被配置为将从行中的第一像素输出的第一模拟像素信号转换为第一数字信号;第二模数转换器，被配置为将第二模拟像素信号输出 从所述行中的第二像素转换为第二数字信号，第一输出电路，被配置为响应于第一使能控制信号而在第一数字信号中的第一位置处输出第一位值，以及第二输出电路， 响应于第二使能控制信号在第二数字信号中的第二位置处的第二位值，第二数字信号中的第二位置对应于第一数字信号中的第一位置，其中第二使能控制信号由 从第一使能控制信号的激活延迟。

公开(公告)号：US11004985B2

公开(公告)日：2021-05-11

申请号：US16793162

申请日：2020-02-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Hun Lee ,  Dong Woo Kim ,  Dong Chan Suh ,  Sun Jung Kim

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786 ,  H01L21/02 ,  H01L21/8238 ,  H01L29/66 ,  B82Y10/00 ,  H01L27/092

Abstract: A semiconductor device includes a drain, a source, a gate electrode, and a nanowire between the source and drain. The nanowire has a first section with a first thickness and a second section with a second thickness greater than the first thickness. The second section is between the first section and at least one of the source or drain. The first nanowire includes a channel when a voltage is applied to the gate electrode.

公开(公告)号：US10693017B2

公开(公告)日：2020-06-23

申请号：US16435263

申请日：2019-06-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Hun Lee ,  Dong Woo Kim ,  Dong Chan Suh ,  Sun Jung Kim

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L27/092 ,  B82Y10/00 ,  H01L29/786 ,  H01L21/02 ,  H01L21/8238

Abstract: A semiconductor device includes a drain, a source, a gate electrode, and a nanowire between the source and drain. The nanowire has a first section with a first thickness and a second section with a second thickness greater than the first thickness. The second section is between the first section and at least one of the source or drain. The first nanowire includes a channel when a voltage is applied to the gate electrode.

公开(公告)号：US20190177845A1

公开(公告)日：2019-06-13

申请号：US16039565

申请日：2018-07-19

Applicant: Samsung Electronics Co., Ltd. ,  Tokyo Electron Limited

Inventor： Seung Jae Baek ,  Hyun Namkoong ,  Tae Jong Lee ,  Sun Jung Kim ,  Ju Yeon Kim ,  Noriaki Fukiage ,  Masahide Iwasaki ,  Yuta Sorita

IPC: C23C16/455 ,  H01L21/687 ,  C23C16/50 ,  C23C16/458

Abstract: A semiconductor process chamber is provided. The semiconductor process chamber includes a susceptor on which a plurality of wafers are disposed; a showerhead structure opposing the susceptor and disposed to be spaced apart from the susceptor; a plurality of plates opposing the susceptor and disposed to be spaced apart from the susceptor; and a blocking structure disposed between plates, among the plurality of plates, disposed adjacent to each other, wherein a distance between the showerhead structure and the susceptor is less than a distance between the plurality of plates and the susceptor, and a distance between the blocking structure and the susceptor is less than the distance between the plurality of plates and the susceptor.

公开(公告)号：US20180355510A1

公开(公告)日：2018-12-13

申请号：US15869905

申请日：2018-01-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keum Seok Park ,  Gyeom Kim ,  Yi Hwan Kim ,  Sun Jung Kim ,  Pan Kwi Park ,  Jeong Ho Yoo

IPC: C30B25/12 ,  C23C16/458

CPC classification number: C30B25/12 ,  C23C16/4585 ,  H01L29/0847 ,  H01L29/66795

Abstract: A semiconductor process chamber includes a susceptor, a base plate surrounding the susceptor, a liner on an inner sidewall of the base plate, and a preheat ring between the susceptor and the base plate and coplanar with the susceptor. The process chamber further includes an upper dome coupled to the base plate and covering an upper surface of the susceptor. The upper dome includes a first section on an upper surface of the base plate and a second section extending from the first section and overlapping the susceptor. The first section includes a first region on the upper surface of the base plate, a second region extending from the first region past the base plate, and a third region extending from the second region with a decreasing thickness to contact the second section.

公开(公告)号：US10128112B2

公开(公告)日：2018-11-13

申请号：US15595945

申请日：2017-05-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Cho Eun Lee ,  Jin Bum Kim ,  Kang Hun Moon ,  Jae Myung Choe ,  Sun Jung Kim ,  Dong Suk Shin ,  Il Gyou Shin ,  Jeong Ho Yoo

IPC: H01L21/336 ,  H01L21/02 ,  H01L21/223 ,  H01L29/66

Abstract: A method of fabricating a semiconductor device is provided. The method includes forming a dummy gate electrode on a substrate, forming a trench on a side surface of the dummy gate electrode, performing a bake process of removing an impurity from the trench and forming a source/drain in the trench, wherein the bake process comprises a first stage and a second stage following the first stage, an air pressure in which the substrate is disposed during the first stage is different from an air pressure in which the substrate is disposed during the second stage, and the bake process is performed while the substrate is on a stage rotating the substrate, wherein a revolution per minute (RPM) of the substrate during the first stage is different from a revolution per minute (RPM) of the substrate during the second stage.