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公开(公告)号：US20160057896A1
公开(公告)日：2016-02-25
申请号：US14722310
申请日：2015-05-27
发明人： Tadahiro SASAKI , Hiroshi YAMADA
CPC分类号： H05K5/0239 , H01P1/2005 , H05K9/0056 , H05K9/0081
摘要： According to an embodiment, an electronic device includes a housing, metal patches, and a first metal member. The housing includes a bottom, a lid, and a side unit. The side unit is disposed to enclose a space between the bottom and the lid. A circuit substrate is disposed on a bottom surface of the bottom. The side unit is conductive and connected to a ground potential. The metal patches are disposed on a lid surface of the lid. The metal patches are arranged periodically in a first direction and a second direction. The second direction intersects the first direction. The metal patches are connected to the ground potential. The first metal member is disposed on the lid surface. The first metal member is connected to the ground potential. The first metal member includes a first portion. The first portion contacts a first surface of the side unit.
摘要翻译： 根据实施例，电子设备包括壳体，金属贴片和第一金属构件。 壳体包括底部，盖子和侧部单元。 侧面单元设置成包围底部和盖子之间的空间。 电路基板设置在底部的底面上。 侧面单元导电并连接到地电位。 金属贴片设置在盖的盖表面上。 金属贴片沿第一方向和第二方向周期性地布置。 第二个方向与第一个方向相交。 金属贴片连接到地电位。 第一金属构件设置在盖表面上。 第一金属构件连接到地电位。 第一金属构件包括第一部分。 第一部分接触侧单元的第一表面。
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2.发明申请METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR INTEGRATED DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开制造半导体器件的方法，半导体集成器件及其制造方法公开(公告)号：US20150123275A1
公开(公告)日：2015-05-07
申请号：US14593773
申请日：2015-01-09
发明人： Hiroshi YAMADA , Yutaka Onozuka , Atsuko Iida , Kazuhiko Itaya
CPC分类号： H01L25/105 , H01L21/56 , H01L21/561 , H01L21/563 , H01L21/568 , H01L21/76802 , H01L21/78 , H01L23/3114 , H01L23/3135 , H01L23/481 , H01L23/495 , H01L23/49572 , H01L23/49838 , H01L23/5226 , H01L24/14 , H01L24/24 , H01L24/82 , H01L24/96 , H01L24/97 , H01L25/16 , H01L25/50 , H01L2224/04105 , H01L2224/12105 , H01L2224/13023 , H01L2224/13024 , H01L2224/24137 , H01L2224/24195 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/49171 , H01L2224/73267 , H01L2224/97 , H01L2225/1035 , H01L2225/1064 , H01L2924/181 , H01L2924/3511 , H01L2924/00014 , H01L2924/00 , H01L2224/85 , H01L2924/00012
摘要： A reconfigured wafer of resin-encapsulated semiconductor packages is obtained by supporting with a resin, thereafter, a grinding process is performed on top and backside surfaces to expose only a bump interconnection electrode on a surface of a semiconductor chip. Further, a chip-scale package is obtained by a dicing process along a periphery of the chip.
摘要翻译： 树脂封装的半导体封装的重新配置的晶片通过用树脂支撑获得，然后在顶面和背面进行研磨处理，仅露出半导体芯片的表面上的凸块互连电极。 此外，通过沿着芯片的周边的切割工艺获得芯片级封装。
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公开(公告)号：US20150348937A1
公开(公告)日：2015-12-03
申请号：US14692108
申请日：2015-04-21
发明人： Yutaka ONOZUKA , Hiroshi YAMADA , Nobuto MANAGAKI
IPC分类号： H01L25/065 , H01L23/00 , H01L23/31 , H01L21/768 , H01L21/288 , H01L23/48 , H01L23/538
CPC分类号： H01L21/288 , H01L23/13 , H01L23/3128 , H01L23/49811 , H01L23/5389 , H01L24/19 , H01L2224/04105 , H01L2224/12105 , H01L2224/24137
摘要： According to one embodiment, a semiconductor device includes an insulative resin, an interconnect, a plurality of semiconductor elements, and a first metal member. The insulative resin includes a first region and a second region. The interconnect is arranged with the first region in a first direction. The first direction intersects a direction from the first region toward the second region. The plurality of semiconductor elements is provided between the first region and the interconnect. At least one of the plurality of semiconductor elements is electrically connected to the interconnect. The first metal member includes a first through-portion and a first end portion. The first through-portion pierces the second region in the first direction. The first end portion is connected to the first through-portion. A width of the first end portion is wider than a width of the first through-portion in a second direction intersecting the first direction.
摘要翻译： 根据一个实施例，半导体器件包括绝缘树脂，互连件，多个半导体元件和第一金属构件。 绝缘树脂包括第一区域和第二区域。 互连以第一方向布置有第一区域。 第一方向与从第一区域朝向第二区域的方向相交。 多个半导体元件设置在第一区域和互连之间。 多个半导体元件中的至少一个电连接到互连。 第一金属构件包括第一贯通部和第一端部。 第一贯穿部分沿第一方向刺穿第二区域。 第一端部连接到第一贯通部。 所述第一端部的宽度比所述第一贯通部的与所述第一方向交叉的第二方向的宽度宽。
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公开(公告)号：US20150201488A1
公开(公告)日：2015-07-16
申请号：US14585657
申请日：2014-12-30
CPC分类号： H05K1/0222 , H05K1/162 , H05K1/165 , H05K1/167 , H05K2201/0187 , H05K2201/0195
摘要： A wiring board of an embodiment includes a through via, a first insulating film disposed around the through via, a second insulating film disposed around the first insulating film, a third insulating film disposed around the second insulating film and a resin disposed around the third insulating film. The resin includes fillers. The second insulating film has a relative permittivity lower than a relative permittivity of the first insulating film. The third insulating film has a relative permittivity higher than a relative permittivity of the second insulating film.
摘要翻译： 实施方式的布线基板包括通孔，设置在贯通通孔周围的第一绝缘膜，设置在第一绝缘膜周围的第二绝缘膜，设置在第二绝缘膜周围的第三绝缘膜，以及设置在第三绝缘膜周围的树脂 电影。 树脂包括填料。 第二绝缘膜的相对介电常数低于第一绝缘膜的相对介电常数。 第三绝缘膜的相对介电常数高于第二绝缘膜的相对介电常数。
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公开(公告)号：US20160218076A1
公开(公告)日：2016-07-28
申请号：US14870377
申请日：2015-09-30
发明人： Nobuto MANAGAKI , Hiroshi YAMADA
IPC分类号： H01L23/00 , H01L23/522 , H01L21/48 , H01L23/538
CPC分类号： H01L24/13 , H01L21/4857 , H01L21/486 , H01L23/49816 , H01L23/5226 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/5389 , H01L24/11 , H01L24/19 , H01L24/20 , H01L24/24 , H01L24/82 , H01L25/105 , H01L2224/04105 , H01L2224/1146 , H01L2224/11823 , H01L2224/1183 , H01L2224/11848 , H01L2224/12105 , H01L2224/13009 , H01L2224/13011 , H01L2224/13025 , H01L2224/13553 , H01L2224/13564 , H01L2224/1357 , H01L2224/24195 , H01L2225/1035 , H01L2225/1041 , H01L2225/1058 , H01L2924/19105
摘要： According to one embodiment, a semiconductor device includes a first conductive portion, a second conductive portion, a first layer, and a second layer. The first conductive portion includes a first end portion and a first extending portion. The first extending portion extends in a first direction. The length of the first extending portion in a second direction is shorter than a length of at least a part of the first end portion in the second direction. The first layer includes multiple semiconductor chips, multiple passive chip components, and a resin. The first extending portion includes a first portion and a second portion. The first layer is provided around the first portion. The first layer expands along a first plane. The first plane intersects the first direction. The second layer includes a first multilayer wiring. The second layer expands along a second plane intersecting the first direction.
摘要翻译： 根据一个实施例，半导体器件包括第一导电部分，第二导电部分，第一层和第二层。 第一导电部分包括第一端部和第一延伸部分。 第一延伸部分在第一方向上延伸。 第一延伸部分在第二方向上的长度短于第一端部在第二方向上的至少一部分的长度。 第一层包括多个半导体芯片，多个无源芯片组件和树脂。 第一延伸部分包括第一部分和第二部分。 第一层围绕第一部分设置。 第一层沿第一平面扩展。 第一个平面与第一个方向相交。 第二层包括第一多层布线。 第二层沿与第一方向相交的第二平面膨胀。
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公开(公告)号：US20150270245A1
公开(公告)日：2015-09-24
申请号：US14641864
申请日：2015-03-09
发明人： Hiroshi YAMADA
IPC分类号： H01L25/065 , H01L23/538 , H01L23/31 , H01L23/04 , H01L23/00 , H01L23/29
CPC分类号： H01L23/5386 , H01L21/568 , H01L23/295 , H01L23/36 , H01L23/4334 , H01L23/49816 , H01L23/5389 , H01L24/19 , H01L24/96 , H01L25/0652 , H01L2224/0401 , H01L2224/04105 , H01L2224/05568 , H01L2224/0558 , H01L2224/05644 , H01L2224/05655 , H01L2224/05666 , H01L2224/12105 , H01L2224/13111 , H01L2224/13116 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13166 , H01L2224/13184 , H01L2224/1403 , H01L2224/14135 , H01L2224/16225 , H01L2224/24137 , H01L2224/24195 , H01L2224/32225 , H01L2224/73204 , H01L2224/94 , H01L2924/01029 , H01L2924/01047 , H01L2924/1424 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H01L2924/0105 , H01L2924/00 , H01L2224/11
摘要： A semiconductor device according to an embodiment includes a first semiconductor unit including a plurality of first semiconductor chips, an organic resin provided between the first semiconductor chips, a wiring layer provided above the first semiconductor chips to electrically connect the first semiconductor chips to each other, and a plurality of connecting terminals provided on an upper portion of the wiring layer and a second semiconductor unit fixed to a wiring layer side of the first semiconductor unit, the second semiconductor unit fixed to a region sandwiched between the connecting terminals, the second semiconductor unit having a second semiconductor chip, the second semiconductor unit electrically connected to the first semiconductor unit.
摘要翻译： 根据实施例的半导体器件包括：第一半导体单元，包括多个第一半导体芯片;设置在第一半导体芯片之间的有机树脂，设置在第一半导体芯片上方以将第一半导体芯片彼此电连接的布线层， 以及设置在所述布线层的上部的多个连接端子和固定到所述第一半导体单元的布线层侧的第二半导体单元，所述第二半导体单元固定在夹在所述连接端子之间的区域，所述第二半导体单元 具有第二半导体芯片，所述第二半导体单元电连接到所述第一半导体单元。
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公开(公告)号：US20150022416A1
公开(公告)日：2015-01-22
申请号：US14332781
申请日：2014-07-16
发明人： Tadahiro SASAKI , Kazuhiko ITAYA , Hiroshi YAMADA , Yutaka ONOZUKA , Nobuto Managaki , Atsuko IIDA
IPC分类号： H01Q1/52
CPC分类号： H01Q9/0407 , H01Q15/008 , H01Q23/00
摘要： An antenna device of the present embodiment includes: a first conductive layer connected to a ground potential, a semiconductor device provided above the first conductive layer, a second conductive layer provided above the semiconductor device, a first via connecting the second conductive layer and the first conductive layer, a third conductive layer provided above the second conductive layer, a second via passing through the first opening, and an antenna provided above the third conductive layer. A dielectric is provided between the second conductive layer and the semiconductor device, between the third conductive layer and the second conductive layer, and between the antenna and the third conductive layer. The second conductive layer includes a first opening. The second via connects the third conductive layer and the first conductive layer.
摘要翻译： 本实施例的天线装置包括：连接到接地电位的第一导电层，设置在第一导电层上方的半导体器件，设置在半导体器件上方的第二导电层，连接第二导电层和第一导电层的第一导电层 导电层，设置在第二导电层上方的第三导电层，穿过第一开口的第二通孔，以及设置在第三导电层上方的天线。 在第二导电层和半导体器件之间，在第三导电层和第二导电层之间以及天线和第三导电层之间提供电介质。 第二导电层包括第一开口。 第二通孔连接第三导电层和第一导电层。
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公开(公告)号：US20150084167A1
公开(公告)日：2015-03-26
申请号：US14460694
申请日：2014-08-15
发明人： Tadahiro SASAKI , Hiroshi YAMADA
CPC分类号： H05K1/0236 , H01L23/49822 , H01L23/49838 , H01L24/19 , H01L2224/04105 , H01L2224/16225 , H01L2224/16235 , H01L2224/24137 , H01L2924/1531 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19105 , H05K1/0225 , H05K1/0231 , H05K1/0233 , H05K1/0242 , H05K1/0243 , H05K1/0298 , H05K2201/0715 , H05K2201/09254 , H05K2201/0969 , H05K2201/09727
摘要： An EBG structure of an embodiment includes an electrode plane, a first insulating layer provided on the electrode plane, a first metal patch provided on the first insulating layer, a second metal patch provided on the first insulating layer, a second insulating layer provided on the first and second metal patches, an interconnect layer provided on the second insulating layer, a third insulating layer provided on the interconnect layer, a first via connected to the electrode plane and the first metal patch, and a second via connected to the electrode plane and the second metal patch. The second metal patch is separately adjacent to the first metal patch. The interconnect layer has a first opening and a second opening. The first via penetrates through the first opening. The second via penetrates through the second opening.
摘要翻译： 实施例的EBG结构包括电极平面，设置在电极平面上的第一绝缘层，设置在第一绝缘层上的第一金属贴片，设置在第一绝缘层上的第二金属贴片，设置在第一绝缘层上的第二绝缘层 第一和第二金属贴片，设置在第二绝缘层上的互连层，设置在互连层上的第三绝缘层，连接到电极平面和第一金属贴片的第一通孔，以及连接到电极平面的第二通孔和 第二个金属贴片。 第二金属贴片与第一金属贴片分开相邻。 互连层具有第一开口和第二开口。 第一个通孔穿过第一个开口。 第二通孔穿过第二开口。
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