公开(公告)号：US20180033879A1

公开(公告)日：2018-02-01

申请号：US15591643

申请日：2017-05-10

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Sung-Bum BAE ,  Sung Bock KIM

IPC: H01L29/778 ,  H01L29/66 ,  H01L29/20

CPC classification number: H01L29/7787 ,  H01L21/762 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7786

Abstract: A method for manufacturing a semiconductor device includes sequentially stacking a first epitaxial layer, a sacrificial layer, a second epitaxial layer, and a third epitaxial layer on a first substrate, forming a trench which penetrates the third epitaxial layer, the second epitaxial layer, and the sacrificial layer, forming a structure layer on an upper surface of the third epitaxial layer, forming a metal film which covers an inner surface of the trench and the structure layer, forming a second substrate which fills the trench and covers the metal film, and separating the second epitaxial layer, the third epitaxial layer, and the structure layer from the first epitaxial layer.

公开(公告)号：US20160380119A1

公开(公告)日：2016-12-29

申请号：US15084874

申请日：2016-03-30

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Dong Yun JUNG ,  Hyun Soo LEE ,  Sang Choon KO ,  Jeong-Jin KIM ,  Zin-Sig KIM ,  Jeho NA ,  Eun Soo NAM ,  Jae Kyoung MUN ,  Young Rak PARK ,  Sung-Bum BAE ,  Hyung Seok LEE ,  Woojin CHANG ,  Hyungyu JANG ,  Chi Hoon JUN

IPC: H01L29/872 ,  H01L29/205 ,  H01L29/45 ,  H01L21/02 ,  H01L23/29 ,  H01L29/47 ,  H01L29/66 ,  H01L21/306 ,  H01L29/20 ,  H01L23/31

CPC classification number: H01L21/0228 ,  H01L23/291 ,  H01L23/3178 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66212 ,  H01L29/872

Abstract: A first nitride semiconductor layer of a semiconductor device is provided on a substrate, a second nitride semiconductor layer is provided on the first nitride semiconductor layer, a first ohmic metal and a second ohmic metal are provided on the second nitride semiconductor layer, a recess region is provided in the second nitride semiconductor layer between the first ohmic metal and the second ohmic metal, a passivation layer covers side of the first ohmic metal and a bottom surface and sides of the recess region, and a Schottky electrode is provided on the first ohmic metal and extends into the recess region.

Abstract translation: 半导体器件的第一氮化物半导体层设置在衬底上，第二氮化物半导体层设置在第一氮化物半导体层上，第一欧姆金属和第二欧姆金属设置在第二氮化物半导体层上，凹部 在所述第一欧姆金属和所述第二欧姆金属之间的所述第二氮化物半导体层中设置钝化层，所述钝化层覆盖所述第一欧姆金属的一侧，并且所述钝化层覆盖所述凹部区域的底表面和所述侧面，并且所述第一欧姆金属的肖特基电极 金属并延伸到凹陷区域中。

公开(公告)号：US20150194363A1

公开(公告)日：2015-07-09

申请号：US14324724

申请日：2014-07-07

Applicant: Electronics and Telecommunications Research Institute

Inventor： Chi Hoon JUN ,  Sang Choon KO ,  Seok-Hwan MOON ,  Woojin CHANG ,  Sung-Bum BAE ,  Young Rak PARK ,  Je Ho NA ,  Jae Kyoung MUN ,  Eun Soo NAM

IPC: H01L23/367 ,  H01L21/3205 ,  H01L23/467 ,  H01L21/3065 ,  H01L21/308 ,  H01L23/473

CPC classification number: H01L21/3065 ,  H01L21/3081 ,  H01L21/32051 ,  H01L23/367 ,  H01L23/467 ,  H01L23/473 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: an active region provided on a substrate; an inlet channel formed as a single cavity buried in one side of the substrate; an outlet channel formed as a single cavity buried in the other side of the substrate; a micro channel array comprising a plurality of micro channels, wherein the plurality of micro channels are formed as a plurality of cavities buried in the substrate, and one end of the micro channel array is connected to a side of the inlet channel and the other end of the micro channel array is connected to a side of the outlet channel; and a micro heat sink array separating the micro channels from one another.

Abstract translation: 提供半导体器件及其制造方法。 半导体器件包括：设置在衬底上的有源区; 入口通道形成为隐藏在所述基板的一侧中的单个腔; 出口通道形成为埋在基板的另一侧中的单个腔; 微通道阵列，其包括多个微通道，其中所述多个微通道形成为埋在所述衬底中的多个空腔，并且所述微通道阵列的一端连接到所述入口通道的一侧，而另一端 的微通道阵列连接到出口通道的一侧; 以及将微通道彼此分离的微型散热器阵列。

公开(公告)号：US20140179088A1

公开(公告)日：2014-06-26

申请号：US13897706

申请日：2013-05-20

Applicant: Electronics and Telecommunications Research Institute

Inventor： Sung-Bum BAE ,  Sung Bock Kim ,  Jae Kyoung Mun ,  Eun Soo Nam

IPC: H01L21/02

CPC classification number: H01L21/0254 ,  H01L21/02458 ,  H01L21/02496 ,  H01L21/0262 ,  H01L21/02664 ,  H01L21/32

Abstract: The inventive concept provides methods for manufacturing a semiconductor substrate. The method may include forming a stop pattern surrounding an edge of a substrate, forming a transition layer an entire top surface of the substrate except the stop pattern, and forming an epitaxial semiconductor layer on the transition layer and the stop pattern. The epitaxial semiconductor layer may not be grown from the stop pattern. That is, the epitaxial semiconductor layer may be isotropically grown from a top surface and a sidewall of the transition layer by a selective isotropic growth method, so that the epitaxial semiconductor layer may gradually cover the stop pattern.

Abstract translation: 本发明构思提供了制造半导体衬底的方法。 该方法可以包括形成围绕衬底的边缘的停止图案，在除了停止图案之外的基板的整个顶表面上形成过渡层，以及在过渡层和停止图案上形成外延半导体层。 外延半导体层可能不会从停止图案生长。 也就是说，外延半导体层可以通过选择性各向同性生长方法从过渡层的顶表面和侧壁各向同性地生长，使得外延半导体层可以逐渐覆盖停止图案。

公开(公告)号：US20210143182A1

公开(公告)日：2021-05-13

申请号：US17094931

申请日：2020-11-11

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Sung-Jae CHANG ,  Dong Min KANG ,  Sung-Bum BAE ,  Hyung Sup YOON ,  Kyu Jun CHO

IPC: H01L27/12 ,  H01L21/84 ,  H01L21/683

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes a substrate having a first region and a second region, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a barrier layer disposed on the semiconductor layer, a first source electrode, a first drain electrode, and a first gate electrode disposed therebetween, which are disposed on the barrier layer in the first region, a second source electrode, a second drain electrode, and a second gate electrode disposed therebetween, which are disposed on the barrier layer in the second region, and a ferroelectric pattern interposed between the first gate electrode and the barrier layer.

公开(公告)号：US20190096782A1

公开(公告)日：2019-03-28

申请号：US16134286

申请日：2018-09-18

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Hyung Seok LEE ,  Zin-Sig KIM ,  Sung-Bum BAE

IPC: H01L23/367 ,  H01L25/065 ,  H01L29/20 ,  H01L23/538 ,  H01L23/373

Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes a heat dissipation plate including a first region and a second region, a first element disposed on the heat dissipation plate in the first region, and a second element disposed on the heat dissipation plate in the second region. The first element includes a first substrate, the second element includes a second substrate, the first substrate includes a material different from a material of the second substrate, the first substrate contacts the heat dissipation plate, and the second element is bonded to the heat dissipation plate in a flip-chip bonding manner.

公开(公告)号：US20180254337A1

公开(公告)日：2018-09-06

申请号：US15966879

申请日：2018-04-30

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Sung-Bum BAE ,  Sung Bock KIM

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/66

CPC classification number: H01L29/7787 ,  H01L21/762 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7786

Abstract: A semiconductor device includes a first semiconductor layer. A second semiconductor layer is disposed on the first semiconductor layer. A structure layer is disposed on the second semiconductor layer. A metal film covers a side surface of the first semiconductor layer, a side surface of the second semiconductor layer, and an upper surface of the structure layer. A flexible substrate covers the metal film.

公开(公告)号：US20200235028A1

公开(公告)日：2020-07-23

申请号：US16839964

申请日：2020-04-03

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Hyung Seok LEE ,  Zin-Sig KIM ,  Sung-Bum BAE

IPC: H01L23/367 ,  H01L23/00 ,  H01L23/538 ,  H01L25/065

Abstract: Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes a heat dissipation plate including a first region and a second region, a first element disposed on the heat dissipation plate in the first region, and a second element disposed on the heat dissipation plate in the second region. The first element includes a first substrate, the second element includes a second substrate, the first substrate includes a material different from a material of the second substrate, the first substrate contacts the heat dissipation plate, and the second element is bonded to the heat dissipation plate in a flip-chip bonding manner

公开(公告)号：US20160225631A1

公开(公告)日：2016-08-04

申请号：US15093814

申请日：2016-04-08

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Chi Hoon JUN ,  Sang Choon KO ,  Seok-Hwan MOON ,  Woojin CHANG ,  Sung-Bum BAE ,  Young Rak PARK ,  Je Ho NA ,  Jae Kyoung MUN ,  Eun Soo NAM

IPC: H01L21/3065 ,  H01L21/308 ,  H01L21/3205 ,  H01L23/367

CPC classification number: H01L21/3065 ,  H01L21/3081 ,  H01L21/32051 ,  H01L23/367 ,  H01L23/467 ,  H01L23/473 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: an active region provided on a substrate; an inlet channel formed as a single cavity buried in one side of the substrate; an outlet channel formed as a single cavity buried in the other side of the substrate; a micro channel array comprising a plurality of micro channels, wherein the plurality of micro channels are formed as a plurality of cavities buried in the substrate, and one end of the micro channel array is connected to a side of the inlet channel and the other end of the micro channel array is connected to a side of the outlet channel; and a micro heat sink array separating the micro channels from one another.

公开(公告)号：US20150187886A1

公开(公告)日：2015-07-02

申请号：US14311675

申请日：2014-06-23

Applicant: Electronics and Telecommunications Research Institute

Inventor： Young Rak PARK ,  Sang Choon KO ,  Woojin CHANG ,  Jae Kyoung MUN ,  Sung-Bum BAE

IPC: H01L29/20 ,  H01L29/49 ,  H01L29/417 ,  H01L29/205

CPC classification number: H01L29/66462 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/4236 ,  H01L29/66431 ,  H01L29/737 ,  H01L29/778 ,  H01L29/7786

Abstract: Provided is a nitride semiconductor device including: a substrate having through via holes; first and second nitride semiconductor layers sequentially stacked on the substrate; drain electrodes and source electrodes provided on the second nitride semiconductor layer; and an insulating pattern provided on the second nitride semiconductor layer, the insulating pattern having upper via holes provided on the drain electrodes, wherein the through via holes are extended into the first and second nitride semiconductor layers and expose a bottom of each of the source electrodes.

Abstract translation: 提供一种氮化物半导体器件，包括：具有通孔的衬底; 顺序堆叠在基板上的第一和第二氮化物半导体层; 设置在第二氮化物半导体层上的漏电极和源电极; 以及设置在所述第二氮化物半导体层上的绝缘图案，所述绝缘图案具有设置在所述漏电极上的上通孔，所述贯通通孔延伸到所述第一氮化物半导体层和所述第二氮化物半导体层中，并暴露出每个所述源电极的底部 。