公开(公告)号：US09209120B2

公开(公告)日：2015-12-08

申请号：US14205323

申请日：2014-03-11

Applicant: Kong Bee Tiu ,  Chee Seng Foong ,  Wai Yew Lo

Inventor： Kong Bee Tiu ,  Chee Seng Foong ,  Wai Yew Lo

IPC: H01L23/495 ,  H01L23/00

CPC classification number: H01L23/49558 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49551 ,  H01L23/49586 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

Abstract: A semiconductor package includes a lead frame having an interior region and leads surrounding the interior region, an integrated circuit, a region of insulating material, and a power bar. The integrated circuit, which is disposed in the interior region, has bond pads and electrical couplings (e.g., bond wires) between the bond pads and the leads. The region of insulating material is disposed on at least some of the lead frame leads and the power bar is disposed on the region of insulating material. There also are electrical couplings between the power bar and at least some of the bond pads.

Abstract translation: 半导体封装包括具有内部区域和围绕内部区域的引线的引线框架，集成电路，绝缘材料区域和电源条。 设置在内部区域中的集成电路在接合焊盘和引线之间具有接合焊盘和电耦合（例如，接合线）。 绝缘材料的区域设置在引线框架引线的至少一些上，并且功率条设置在绝缘材料的区域上。 在电源杆和至少一些接合焊盘之间还存在电耦合。

公开(公告)号：US07261230B2

公开(公告)日：2007-08-28

申请号：US10652434

申请日：2003-08-29

Applicant: Fuaida Harun ,  Chiaw Mong Chan ,  Lan Chu Tan ,  Lau Teck Beng ,  Kong Bee Tiu ,  Soo San Yong

Inventor： Fuaida Harun ,  Chiaw Mong Chan ,  Lan Chu Tan ,  Lau Teck Beng ,  Kong Bee Tiu ,  Soo San Yong

IPC: B23K1/06

CPC classification number: H01L24/85 ,  B23K20/005 ,  B23K2101/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/78 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45169 ,  H01L2224/45565 ,  H01L2224/45669 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/78301 ,  H01L2224/85181 ,  H01L2224/85201 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2924/00015 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/01004 ,  H01L2924/00014 ,  H01L2924/00011 ,  H01L2924/00 ,  H01L2924/2075

Abstract: An improved method of bonding an insulated wire (14) that has one end connected to a first bond pad (16) to a second bond pad (18) includes moving a tip of a capillary (20) holding the bond wire (14) over the surface of the second bond pad (18) such that the bond wire (14) is rubbed between the capillary tip (20) and the second bond pad (18), which tears the bond wire insulation so that at least a portion of a metal core of the wire (14) contacts the second bond pad (18). The wire (14) is then bonded to the second pad (18) using thermocompression bonding. The tip of the capillary (20) is roughened to enhance the tearing of the bond wire insulation.

Abstract translation: 将具有一端连接到第一接合焊盘（16）的绝缘电线（14）的改进方法连接到第二接合焊盘（18）包括将保持接合线（14）的毛细管（20）的尖端移动到 所述第二接合焊盘（18）的表面使得所述接合线（14）在所述毛细管尖端（20）和所述第二接合焊盘（18）之间摩擦，所述接合焊盘撕裂所述接合线绝缘体，使得至少一部分 金属丝（14）的金属芯与第二接合焊盘（18）接触。 然后使用热压接将导线（14）接合到第二焊盘（18）。 毛细管（20）的尖端被粗糙化以增强接合线绝缘层的撕裂。

公开(公告)号：US07211466B2

公开(公告)日：2007-05-01

申请号：US11047173

申请日：2005-01-31

Applicant: Wai Yew Lo ,  Azhar Bin Aripin ,  Kong Bee Tiu

Inventor： Wai Yew Lo ,  Azhar Bin Aripin ,  Kong Bee Tiu

IPC: H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC classification number: H01L25/0657 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83139 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A stacked multichip package (100) has a base carrier (102) having a top side (108) and a bottom side (110), a bottom integrated circuit die (104) having a bottom surface (112) attached to the base carrier top side (108), and an opposing, top surface (114). The top surface (114) has a peripheral area including a plurality of first bonding pads and a central area (120). A bead (124) is formed on the top surface (114) of the bottom die (104) between the peripheral area and the central area (120). A top integrated circuit die (106) having a bottom surface is positioned over the bottom die (104) and the bottom surface of the top die (106) is attached to the top surface (114) of the bottom die (104) via the bead (124). The bead (124) maintains a predetermined spacing between the bottom die (104) and the top die (106) so that wirebonds of first wires (122) connecting the bottom die (104) to the base carrier (102) are not damaged when the top die (106) is attached to the bottom die (104).

Abstract translation: 堆叠的多芯片封装（100）具有具有顶侧（108）和底侧（110）的底座（102），底部集成电路模具（104），底部表面（112）附接到基座托顶 （108）和相对的顶表面（114）。 顶表面（114）具有包括多个第一接合焊盘和中心区域（120）的外围区域。 在周边区域和中心区域（120）之间的底模（104）的顶表面（114）上形成有珠（124）。 具有底表面的顶部集成电路管芯（106）位于所述底部模具（104）上方，并且所述顶部模具（106）的底部表面经由所述底部模具（104）的顶部表面（114）经由所述底部模具 珠（124）。 胎圈（124）在底模（104）和顶模（106）之间保持预定间隔，使得连接底模（104）与底架（102）的第一线（122）的引线不会被损坏， 顶模（106）附接到底模（104）。

公开(公告)号：US06854637B2

公开(公告)日：2005-02-15

申请号：US10372061

申请日：2003-02-20

Applicant: Fuaida Harun ,  Kong Bee Tiu

Inventor： Fuaida Harun ,  Kong Bee Tiu

IPC: B23K20/00 ,  B23K31/00 ,  B23K31/02

CPC classification number: H01L24/48 ,  B23K20/004 ,  B23K2101/38 ,  H01L24/45 ,  H01L24/85 ,  H01L2224/45015 ,  H01L2224/45016 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/45169 ,  H01L2224/4556 ,  H01L2224/45565 ,  H01L2224/4569 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/78301 ,  H01L2224/85043 ,  H01L2224/85205 ,  H01L2224/85951 ,  H01L2224/85986 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01005 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/20754 ,  H01L2224/85181 ,  H01L2924/01004 ,  H01L2224/78 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/2075 ,  H01L2924/01049 ,  H01L2924/01006 ,  H01L2224/85399 ,  H01L2224/05599

Abstract: An electrical connection for connecting a bond pad of a first device and a bond pad of a second device with an insulated or coated wire. The electrical connection includes a first wirebond securing a first portion of the insulated bond wire to the first device bond pad. A second wirebond secures a second portion of the insulated bond wire to the second device bond pad. A bump is formed over the second wirebond, and the bump is offset from the second wirebond. The offset bump enhances the second bond, providing it with increased wire peel strength.

Abstract translation: 一种用于连接第一装置的接合焊盘和第二装置的焊盘与绝缘或涂覆电线的电连接。 电连接包括将绝缘接合线的第一部分固定到第一器件接合焊盘的第一引线键。 第二引线键将绝缘接合线的第二部分固定到第二器件接合焊盘。 凸起形成在第二引线键上，并且凸块与第二引线键偏移。 偏移凸块增强了第二粘结，提供了增加的线剥离强度。

公开(公告)号：US09305898B2

公开(公告)日：2016-04-05

申请号：US14161706

申请日：2014-01-23

Applicant: Kong Bee Tiu ,  Ruzaini B. Ibrahim ,  Wen Shi Koh

Inventor： Kong Bee Tiu ,  Ruzaini B. Ibrahim ,  Wen Shi Koh

IPC: H01L23/00 ,  H01L23/495

CPC classification number: H01L24/85 ,  H01L23/49527 ,  H01L23/49551 ,  H01L23/49558 ,  H01L23/49562 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/05014 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/291 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4554 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/49109 ,  H01L2224/4911 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/85 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/85464 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/07802 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/1576 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/0665 ,  H01L2224/85399

Abstract: A semiconductor device includes a lead frame, and an integrated circuit die. The lead frame has a flag for supporting the die and leads that surround that flag and die. The lead frame also has ground ring that surrounds the flag and die. First bond wires electrically connect the die to the lead frame leads. An insulating layer is disposed on the ground ring, and a power layer is disposed on the insulating layer. The semiconductor device further includes second bond wires that connect the die to the ground ring and third bond wires that connect the die to the power layer.

Abstract translation: 半导体器件包括引线框架和集成电路管芯。 引线框架具有用于支撑芯片的标志，并且引线围绕该标记并死亡。 引线框架还具有围绕标志并死亡的接地环。 第一接合线将管芯电连接到引线框架引线。 绝缘层设置在接地环上，功率层设置在绝缘层上。 半导体器件还包括将管芯连接到接地环的第二接合线和将管芯连接到功率层的第三接合线。

公开(公告)号：US20150014833A1

公开(公告)日：2015-01-15

申请号：US13938231

申请日：2013-07-10

Applicant: Kong Bee Tiu ,  Ruzaini B. Ibrahim ,  Wai Yew Lo

Inventor： Kong Bee Tiu ,  Ruzaini B. Ibrahim ,  Wai Yew Lo

IPC: H01L23/495 ,  H01L23/00

CPC classification number: H01L23/49575 ,  H01L21/4842 ,  H01L21/561 ,  H01L23/49541 ,  H01L23/49551 ,  H01L23/49555 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4909 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/8385 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00

Abstract: A Quad Flat Package (QFP) semiconductor device has a multi-stepped lead frame for forming rows of external contacts. A semiconductor die is attached to a die pad of the lead frame and electrically connected to lead with bond wires. The die and bond wires are encapsulated with a mold compound and then multiple cuts are made to the lead frame to form the rows of external contacts.

Abstract translation: 四边形扁平封装（QFP）半导体器件具有用于形成行外部触点的多级引线框架。 将半导体管芯附接到引线框架的管芯焊盘并且用接合线电连接以引线。 管芯和接合线用模具化合物封装，然后对引线框架进行多个切割以形成一排外部触点。

公开(公告)号：US20140374848A1

公开(公告)日：2014-12-25

申请号：US13924628

申请日：2013-06-24

Applicant: Wen Shi Koh ,  Wai Yew Lo ,  Kong Bee Tiu

Inventor： Wen Shi Koh ,  Wai Yew Lo ,  Kong Bee Tiu

IPC: H01L41/053

CPC classification number: H01L24/97 ,  G01L19/148 ,  H01L23/315 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor sensor device is packaged using a lid in which one or more dies are mounted to a substrate within the lid housing and one or more other dies are mounted to the substrate outside of the lid housing. The dies located outside of the lid housing may be encapsulated in a molding compound. In one embodiment, the lid has a vent hole and an active region of a pressure-sensing die located inside the lid housing is covered by a pressure-sensitive gel that together enable ambient atmospheric pressure immediately outside the sensor device to reach the active region of the pressure-sensing die. The sensor device may also have one or more other types of sensor dies, such as an acceleration-sensing die, to form a multi-sensor device.

Abstract translation: 使用盖子封装半导体传感器装置，其中一个或多个管芯安装到盖壳体内的基板上，并且一个或多个其它管芯安装到盖壳体外部的基板。 位于盖壳体外部的模具可以封装在模塑料中。 在一个实施例中，盖具有通气孔，并且位于盖壳体内部的压力感测模具的有源区域被压敏胶体覆盖，该压敏胶体使得能够在传感器装置正前方的环境大气压力达到 压力感测模具。 传感器装置还可以具有一个或多个其它类型的传感器模具，例如加速度感测模头，以形成多传感器装置。

公开(公告)号：US06885093B2

公开(公告)日：2005-04-26

申请号：US10085869

申请日：2002-02-28

Applicant: Wai Yew Lo ,  Azhar Bin Aripin ,  Kong Bee Tiu

Inventor： Wai Yew Lo ,  Azhar Bin Aripin ,  Kong Bee Tiu

IPC: H01L25/18 ,  H01L25/065 ,  H01L25/07 ,  H01L23/02

CPC classification number: H01L25/0657 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83139 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2225/06586 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A stacked multichip package (100) has a base carrier (102) having a top side (108) and a bottom side (110), a bottom integrated circuit die (104) having a bottom surface (112) attached to the base carrier top side (108), and an opposing, top surface (114). The top surface (114) has a peripheral area including a plurality of first bonding pads and a central area (120). A bead (124) is formed on the top surface (114) of the bottom die (104) between the peripheral area and the central area (120). A top integrated circuit die (106) having a bottom surface is positioned over the bottom die (104) and the bottom surface of the top die (106) is attached to the top surface (114) of the bottom die (104) via the bead (124). The bead (124) maintains a predetermined spacing between the bottom die (104) and the top die (106) so that wirebonds of first wires (122) connecting the bottom die (104) to the base carrier (102) are not damaged when the top die (106) is attached to the bottom die (104).

Abstract translation: 堆叠的多芯片封装（100）具有具有顶侧（108）和底侧（110）的底座（102），底部集成电路模具（104），底部表面（112）附接到基座托顶 （108）和相对的顶表面（114）。 顶表面（114）具有包括多个第一接合焊盘和中心区域（120）的外围区域。 在周边区域和中心区域（120）之间的底模（104）的顶表面（114）上形成有珠（124）。 具有底表面的顶部集成电路管芯（106）位于所述底部模具（104）上方，并且所述顶部模具（106）的底部表面经由所述底部模具（104）的顶部表面（114）经由所述底部模具 珠（124）。 胎圈（124）在底模（104）和顶模（106）之间保持预定间隔，使得连接底模（104）与底架（102）的第一线（122）的引线不会被损坏， 顶模（106）附接到底模（104）。

公开(公告)号：US20150137279A1

公开(公告)日：2015-05-21

申请号：US14086942

申请日：2013-11-21

Applicant: Kong Bee Tiu ,  Teck Beng Lau ,  Wai Yew Lo

Inventor： Kong Bee Tiu ,  Teck Beng Lau ,  Wai Yew Lo

IPC: H01L23/495 ,  H01L23/00

CPC classification number: H01L23/49575 ,  G01L19/141 ,  H01L23/24 ,  H01L23/3107 ,  H01L23/315 ,  H01L23/49551 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/16151 ,  H01L2924/16195 ,  H01L2924/167 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device includes a lead frame having a flag and leads that surround the flag. The leads include a dummy lead that has first and second wire bonding areas. A first die is attached on the flag and electrically connected to the first wire bonding area. The first die and the first wire bonding area are encapsulated with a molding material and a cavity with an opening is formed above the first die. The second wire bonding area is exposed in the cavity. A second die is placed in the cavity and electrically connected to the second wire bonding area such that the second die is electrically connected to the first die by way of the dummy lead.

Abstract translation: 半导体器件包括具有标志的引线框和围绕该标记的引线。 引线包括具有第一和第二引线接合区域的虚拟引线。 第一管芯附接在标记上并电连接到第一引线接合区域。 第一管芯和第一引线接合区域用模制材料封装，并且在第一管芯上形成具有开口的空腔。 第二引线接合区域暴露在空腔中。 第二管芯被放置在腔中并电连接到第二引线接合区域，使得第二管芯通过虚拟引线电连接到第一管芯。

公开(公告)号：US08981541B2

公开(公告)日：2015-03-17

申请号：US13938231

申请日：2013-07-10

Applicant: Kong Bee Tiu ,  Ruzaini B. Ibrahim ,  Wai Yew Lo

Inventor： Kong Bee Tiu ,  Ruzaini B. Ibrahim ,  Wai Yew Lo

IPC: H01L23/495 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/00

CPC classification number: H01L23/49575 ,  H01L21/4842 ,  H01L21/561 ,  H01L23/49541 ,  H01L23/49551 ,  H01L23/49555 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/4909 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2224/83101 ,  H01L2224/8385 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00

Abstract: A Quad Flat Package (QFP) semiconductor device has a multi-stepped lead frame for forming rows of external contacts. A semiconductor die is attached to a die pad of the lead frame and electrically connected to lead with bond wires. The die and bond wires are encapsulated with a mold compound and then multiple cuts are made to the lead frame to form the rows of external contacts.

Abstract translation: 四边形扁平封装（QFP）半导体器件具有用于形成行外部触点的多级引线框架。 将半导体管芯附接到引线框架的管芯焊盘并且用接合线电连接以引线。 管芯和接合线用模具化合物封装，然后对引线框架进行多个切割以形成一排外部触点。