Abstract:
Embodiments of the current invention describe a method of plating platinum selectively on a copper film using a self-initiated electroless process. In particular, platinum films are plated onto very thin copper films having a thickness of less than 300 angstroms. The electroless plating solution and the resulting structure are also described. This process has applications in the semiconductor processing of logic devices, memory devices, and photovoltaic devices.
Abstract:
Processes for minimizing contact resistance when using nickel silicide (NiSi) and other similar contact materials are described. These processes include optimizing silicide surface cleaning, silicide surface passivation against oxidation and techniques for diffusion barrier/catalyst layer deposition. Additionally, processes for generating a noble metal (for example platinum, iridium, rhenium, ruthenium, and alloys thereof) activation layer that enables the electroless barrier layer deposition on a NiSi-based contact material are described. The processes may be employed when using NiSi-based materials in other end products. The processes may be employed on silicon-based materials.
Abstract:
Processes for minimizing contact resistance when using nickel silicide (NiSi) and other similar contact materials are described. These processes include optimizing silicide surface cleaning, silicide surface passivation against oxidation and techniques for diffusion barrier/catalyst layer deposition. Additionally, processes for generating a noble metal (for example platinum, iridium, rhenium, ruthenium, and alloys thereof) activation layer that enables the electroless barrier layer deposition on a NiSi-based contact material are described. The processes may be employed when using NiSi-based materials in other end products. The processes may be employed on silicon-based materials
Abstract:
Processes for minimizing contact resistance when using nickel silicide (NiSi) and other similar contact materials are described. These processes include optimizing silicide surface cleaning, silicide surface passivation against oxidation and techniques for diffusion barrier/catalyst layer deposition. Additionally, processes for generating a noble metal (for example platinum, iridium, rhenium, ruthenium, and alloys thereof) activation layer that enables the electroless barrier layer deposition on a NiSi-based contact material are described. The processes may be employed when using NiSi-based materials in other end products. The processes may be employed on silicon-based materials.
Abstract:
An electroless plating system includes a plating solution, and controlling reducing agents in the plating solution for deposition over outlier features smaller than about five hundred nanometers and isolated by about one thousand nanometers.
Abstract:
The present invention discloses a station, e.g., for IC fabrication with a flexible configuration. It consists of an array of processing chambers, which are grouped into processing modules and arranged in a two-dimensional fashion, in vertical levels and horizontal rows, and is capable of operating independent of each other. Each processing chamber can perform electroless deposition and other related processing steps sequentially on a wafer with more than one processing fluid without having to remove it from the chamber. The system is served by a single common industrial robot, which may have a random to access to all the working chambers and cells of the storage unit for transporting wafers between the wafer cassettes and inlet/outlets ports of any of the chemical processing chambers. The station occupies a service-room floor space and a clean-room floor space. The processing modules and the main chemical management unit connected to the local chemical supply unit occupy a service-room floor space, while the robot and the wafer storage cassettes are located in a clean room. Thus, in distinction to the known cluster-tool machines, the station of the invention makes it possible to transfer part of the units from the expensive clean-room area to less-expensive service area.
Abstract:
A method is provided which includes dispensing and removing different deposition solutions during an electroless deposition process to form different sub-films of a composite layer. Another method includes forming a film by an electroless deposition process and subsequently annealing the microelectronic topography to induce diffusion of an element within the film. Yet another method includes reiterating different mechanisms of deposition growth, namely interfacial electroless reduction and chemical adsorption, from a single deposition solution to form different sub-films of a composite layer. A microelectronic topography resulting from one or more of the methods includes a film formed in contact with a structure having a bulk concentration of a first element. The film has periodic successions of regions each comprising a region with a concentration of a second element greater than a set amount and a region with a concentration of the second element less than the set amount.
Abstract:
Methods and systems are provided which are adapted to process a microelectronic topography, particularly in association with an electroless deposition process. In general, the methods may include loading the topography into a chamber, closing the chamber to form an enclosed area, and supplying fluids to the enclosed area. In some embodiments, the fluids may fill the enclosed area. In addition or alternatively, a second enclosed area may be formed about the topography. As such, the provided system may be adapted to form different enclosed areas about a substrate holder. In some cases, the method may include agitating a solution to minimize the accumulation of bubbles upon a wafer during an electroless deposition process. As such, the system provided herein may include a means for agitating a solution in some embodiments. Such a means for agitation may be distinct from the inlet/s used to supply the solution to the chamber.
Abstract:
Non-volatile resistive-switching memories formed using anodization are described. A method for forming a resistive-switching memory element using anodization includes forming a metal containing layer, anodizing the metal containing layer at least partially to form a resistive switching metal oxide, and forming a first electrode over the resistive switching metal oxide. In some examples, an unanodized portion of the metal containing layer may be a second electrode of the memory element.
Abstract:
The present invention provides derivatives of pyrido[2,3-d]pyrimidin-7-one. These compounds are inhibitors or kinases such as Raf, including compounds that show anti-proliferative activity, including against tumor cells, and are useful in the treatment of diseases including cancer.