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公开(公告)号:US20240282631A1
公开(公告)日:2024-08-22
申请号:US18419526
申请日:2024-01-22
Applicant: Applied Materials, Inc.
Inventor: Xi CEN , Kai WU , Yao XU , Yang LI , Meng ZHU , Insu HA , Jianqiu GUO , Chao LI , Rongjun WANG , Xianmin TANG
IPC: H01L21/768 , H01L21/02 , H01L21/285
CPC classification number: H01L21/76879 , H01L21/02068 , H01L21/28568 , H01L21/76843
Abstract: A method of filling a via having a necking point includes performing a pre-clean process to remove residues from an exposed surface of a metal layer at a bottom of a via and recover inner surfaces of the via, wherein the via is formed within a dielectric layer and has a necking point protruding within the via, performing a selective deposition process to partially fill the via with metal fill material from the exposed surface of the metal layer below the necking point, performing a liner deposition process to form a liner layer on exposed inner surfaces of the via, and performing a metal fill process to fill the via with the metal fill material.
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公开(公告)号:US20240178062A1
公开(公告)日:2024-05-30
申请号:US18083075
申请日:2022-12-16
Applicant: Applied Materials, Inc.
Inventor: Yi XU , Yu LEI , Aixi ZHANG , Rongjun WANG
IPC: H01L21/768 , H01L21/285
CPC classification number: H01L21/76877 , H01L21/28556
Abstract: A method of gap fill may include depositing a sacrificial Si layer in an opening of a feature and on a field of a substrate. In addition, the method may include depositing a metal layer in the opening and on the field, where at least a portion of the sacrificial Si layer is replaced with the metal layer. The method may also include depositing a metal gapfill material in the opening and on the field directly over the metal layer, where the metal gapfill material completely fills the opening.
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公开(公告)号:US20240088071A1
公开(公告)日:2024-03-14
申请号:US17944596
申请日:2022-09-14
Applicant: Applied Materials, Inc.
Inventor: Yi XU , Yu LEI , Zhimin QI , Aixi ZHANG , Xianyuan ZHAO , Wei LEI , Xingyao GAO , Shirish A. PETHE , Tao HUANG , Xiang CHANG , Patrick Po-Chun LI , Geraldine VASQUEZ , Dien-yeh WU , Rongjun WANG
IPC: H01L23/00
CPC classification number: H01L24/03 , H01L24/05 , H01L2224/03452 , H01L2224/03845 , H01L2224/05026 , H01L2224/05082 , H01L2224/05157 , H01L2224/05184 , H01L2924/01027 , H01L2924/01074 , H01L2924/04941 , H01L2924/0496 , H01L2924/059 , H01L2924/35121
Abstract: Methods for reducing resistivity of metal gapfill include depositing a conformal layer in an opening of a feature and on a field of a substrate with a first thickness of the conformal layer of approximately 10 microns or less, depositing a non-conformal metal layer directly on the conformal layer at a bottom of the opening and directly on the field using an anisotropic deposition process. A second thickness of the non-conformal metal layer on the field and on the bottom of the feature is approximately 30 microns or greater. And depositing a metal gapfill material in the opening of the feature and on the field where the metal gapfill material completely fills the opening without any voids.
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公开(公告)号:US20240014072A1
公开(公告)日:2024-01-11
申请号:US18212352
申请日:2023-06-21
Applicant: Applied Materials, Inc.
Inventor: Tsung-Han YANG , Zhimin QI , Yongqian GAO , Rongjun WANG , Yi XU , Yu LEI , Xingyao GAO , Chih-Hsun HSU , Xi CEN , Wei LEI , Shiyu YUE , Aixi ZHANG , Kai WU , Xianmin TANG
IPC: H01L21/768 , H01J37/32
CPC classification number: H01L21/76879 , H01J37/32449 , H01J37/32816 , H01J37/32422 , H01J2237/2001 , H01J37/321 , H01J2237/332
Abstract: A method of forming a semiconductor device structure includes forming a nucleation layer within at least one feature. The method includes exposing the nucleation layer to a nitrogen plasma treatment. The nitrogen plasma treatment preferentially treats the top field and sidewalls while leaving the bottom surface substantially untreated to encourage bottom up metal growth.
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公开(公告)号:US20230420295A1
公开(公告)日:2023-12-28
申请号:US18133102
申请日:2023-04-11
Applicant: Applied Materials, Inc.
Inventor: Tsung-Han YANG , Xingyao GAO , Shiyu YUE , Chih-Hsun HSU , Shirish PETHE , Rongjun WANG , Yi XU , Wei LEI , Yu LEI , Aixi ZHANG , Xianyuan ZHAO , Zhimin QI , Jiang LU , Xianmin TANG
IPC: H01L21/768 , H01L21/285 , H01J37/32
CPC classification number: H01L21/76877 , H01L21/76876 , H01L21/76865 , H01L21/2855 , H01J2237/338 , H01L21/76856 , H01L21/76861 , H01J37/32899 , H01L21/76843
Abstract: A method and apparatus for tungsten gap-fill in semiconductor devices are provided. The method includes performing a gradient oxidation process to oxidize exposed portions of a liner layer, wherein the gradient oxidation process preferentially oxidizes an overhang portion of the liner layer, which obstructs or blocks top openings of one or more features formed within a field region of a substrate. The method further includes performing an etchback process to remove or reduce the oxidized overhang portion of the liner layer, exposing the liner layer to a chemical vapor transport (CVT) process to remove metal oxide remaining from the gradient oxidation process and the etchback process, and performing a tungsten gap-fill process to fill or partially fill the one or more features.
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公开(公告)号:US20230257868A1
公开(公告)日:2023-08-17
申请号:US18169065
申请日:2023-02-14
Applicant: Applied Materials, Inc.
Inventor: Zihao YANG , Mingwei ZHU , Bharatwaj RAMAKRISHNAN , Rongjun WANG , Robert Jan VISSER , Patibandla NAG
CPC classification number: C23C14/3464 , C23C14/5806 , C23C14/541 , C23C14/082 , C23C14/086 , C23C14/085 , C23C14/5873 , G03F7/0035
Abstract: Embodiments described herein relate to a method of fabricating a perovskite film device. The method includes heating and degassing a substrate within a processing system; depositing a first perovskite film layer over a surface of the substrate using multi-cathode sputtering deposition within a processing chamber; depositing a second perovskite film layer over the first perovskite film layer using multi-cathode sputtering deposition within a processing chamber; and annealing the substrate with the first perovskite film layer and second perovskite film layer disposed thereon. The first perovskite film layer includes a first perovskite material. The second perovskite film layer includes a second perovskite material.
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公开(公告)号:US20230073011A1
公开(公告)日:2023-03-09
申请号:US17900318
申请日:2022-08-31
Applicant: Applied Materials, Inc.
Inventor: Zhiyong WANG , Halbert CHONG , Irena H. WYSOK , Jianxin LEI , Rongjun WANG , Lei ZHOU , Kirankumar Neelasandra SAVANDAIAH , Sundarapandian Ramalinga Vijayalakshmi REDDY
Abstract: Methods and apparatus reduce defects in substrates processed in a physical vapor (PVD) chamber. In some embodiments, a method for cleaning a process kit disposed in an inner volume of a process chamber includes positioning a non-sputtering shutter disk on a substrate support of the PVD chamber; energizing an oxygen-containing cleaning gas disposed in the inner volume of the PVD chamber to create a plasma reactive with carbon-based materials; and heating the process kit having a carbon-based material adhered thereto while exposed to the plasma to remove at least a portion of the carbon-based material adhered to the process kit.
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公开(公告)号:US20220310364A1
公开(公告)日:2022-09-29
申请号:US17838860
申请日:2022-06-13
Applicant: APPLIED MATERIALS, INC.
Inventor: Halbert CHONG , Rong TAO , Jianxin LEI , Rongjun WANG , Keith A. Miller , Irena H. Wysok , Tza-Jing Gung , Xing Chen
Abstract: Methods and apparatus for cleaning a process kit configured for processing a substrate are provided. For example, a process chamber for processing a substrate can include a chamber wall; a sputtering target disposed in an upper section of the inner volume; a pedestal including a substrate support having a support surface to support a substrate below the sputtering target; a power source configured to energize sputtering gas for forming a plasma in the inner volume; a process kit surrounding the sputtering target and the substrate support; and an ACT connected to the pedestal and a controller configured to tune the pedestal using the ACT to maintain a predetermined potential difference between the plasma in the inner volume and the process kit, wherein the predetermined potential difference is based on a percentage of total capacitance of the ACT and a stray capacitance associated with a grounding path of the process chamber.
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公开(公告)号:US20220081758A1
公开(公告)日:2022-03-17
申请号:US17019949
申请日:2020-09-14
Applicant: APPLIED MATERIALS, INC.
Inventor: Xiaodong WANG , Michael Charles KUTNEY , Varoujan CHAKARIAN , Jianxin LEI , Rongjun WANG
Abstract: Methods and apparatus that monitors deposition on a shutter disk in-situ. In some embodiments that apparatus may include a process chamber with an internal processing volume, an enclosure disposed external to the internal processing volume where the enclosure accepts a shutter disk when the shutter disk is not in use in the internal processing volume, a shutter disk arm that moves the shutter disk back and forth from the enclosure to the internal processing volume, and at least one sensor integrated into the enclosure. The at least one sensor is configured to determine at least one film property of a material deposited on the shutter disk after a pasting process in the internal processing volume.
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公开(公告)号:US20190027169A1
公开(公告)日:2019-01-24
申请号:US15862301
申请日:2018-01-04
Applicant: Applied Materials, Inc.
Inventor: Lin XUE , Chi Hong CHING , Jaesoo AHN , Mahendra PAKALA , Rongjun WANG
Abstract: Embodiments herein provide film stacks utilized to form a magnetic tunnel junction (MTJ) structure on a substrate, comprising: a buffer layer; a seed layer disposed over the buffer layer; a first pinning layer disposed over the seed layer; a synthetic ferrimagnet (SyF) coupling layer disposed over the first pinning layer; a second pinning layer disposed over the SyF coupling layer; a structure blocking layer disposed over the second pinning layer; a magnetic reference layer disposed over the structure blocking layer; a tunnel barrier layer disposed over the magnetic reference layer; a magnetic storage layer disposed over the tunnel barrier layer; a capping layer disposed over the magnetic storage layer, wherein the capping layer comprises one or more layers; and a hard mask disposed over the capping layer, wherein at least one of the capping layer, the buffer layer, and the SyF coupling layer is not fabricated from Ru.
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