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公开(公告)号:US11689436B2
公开(公告)日:2023-06-27
申请号:US17531494
申请日:2021-11-19
申请人: Intel Corporation
IPC分类号: H04L43/08 , G06F16/901 , H04B10/25 , G02B6/38 , G02B6/42 , G02B6/44 , G06F1/18 , G06F1/20 , G06F3/06 , G06F8/65 , G06F9/30 , G06F9/4401 , G06F9/54 , G06F12/109 , G06F12/14 , G06F13/16 , G06F13/40 , G08C17/02 , G11C5/02 , G11C7/10 , G11C11/56 , G11C14/00 , H03M7/30 , H03M7/40 , H04L41/14 , H04L43/0817 , H04L43/0876 , H04L43/0894 , H04L49/00 , H04L49/25 , H04L49/356 , H04L49/45 , H04L67/02 , H04L67/306 , H04L69/04 , H04L69/329 , H04Q11/00 , H05K7/14 , G06F15/16 , G06F9/38 , G06F9/50 , H04L41/12 , H04L41/5019 , H04L43/16 , H04L47/24 , H04L47/38 , H04L67/1004 , H04L67/1034 , H04L67/1097 , H04L67/12 , H05K5/02 , H04W4/80 , G06Q10/087 , G06Q10/20 , G06Q50/04 , H04L43/065 , H04J14/00 , H04L61/00 , H04L67/51 , H04L41/147 , H04L67/1008 , H04L41/0813 , H04L67/1029 , H04L41/0896 , H04L47/70 , H04L47/78 , H04L41/082 , H04L67/00 , H04L67/1012 , B25J15/00 , B65G1/04 , H05K7/20 , H04L49/55 , H04L67/10 , H04W4/02 , H04L45/02 , G06F13/42 , H05K1/18 , G05D23/19 , G05D23/20 , H04L47/80 , H05K1/02 , H04L45/52 , H04Q1/04 , G06F12/0893 , H05K13/04 , G11C5/06 , G06F11/14 , G06F11/34 , G06F12/0862 , G06F15/80 , H04L47/765 , H04L67/1014 , G06F12/10 , G06Q10/06 , G06Q10/0631 , G07C5/00 , H04L12/28 , H04L41/02 , H04L9/06 , H04L9/14 , H04L9/32 , H04L41/046 , H04L49/15
CPC分类号: H04L43/08 , G02B6/3882 , G02B6/3893 , G02B6/3897 , G02B6/4292 , G02B6/4452 , G06F1/183 , G06F1/20 , G06F3/064 , G06F3/0613 , G06F3/0625 , G06F3/0653 , G06F3/0655 , G06F3/0664 , G06F3/0665 , G06F3/0673 , G06F3/0679 , G06F3/0683 , G06F3/0688 , G06F3/0689 , G06F8/65 , G06F9/30036 , G06F9/4401 , G06F9/544 , G06F12/109 , G06F12/1408 , G06F13/1668 , G06F13/409 , G06F13/4022 , G06F13/4068 , G06F15/161 , G06F16/9014 , G08C17/02 , G11C5/02 , G11C7/1072 , G11C11/56 , G11C14/0009 , H03M7/3086 , H03M7/4056 , H03M7/4081 , H04B10/25891 , H04L41/145 , H04L43/0817 , H04L43/0876 , H04L43/0894 , H04L49/00 , H04L49/25 , H04L49/357 , H04L49/45 , H04L67/02 , H04L67/306 , H04L69/04 , H04L69/329 , H04Q11/0003 , H05K7/1442 , B25J15/0014 , B65G1/0492 , G05D23/1921 , G05D23/2039 , G06F3/061 , G06F3/067 , G06F3/0611 , G06F3/0616 , G06F3/0619 , G06F3/0631 , G06F3/0638 , G06F3/0647 , G06F3/0658 , G06F3/0659 , G06F9/3887 , G06F9/505 , G06F9/5016 , G06F9/5044 , G06F9/5072 , G06F9/5077 , G06F11/141 , G06F11/3414 , G06F12/0862 , G06F12/0893 , G06F12/10 , G06F13/161 , G06F13/1694 , G06F13/42 , G06F13/4282 , G06F15/8061 , G06F2209/5019 , G06F2209/5022 , G06F2212/1008 , G06F2212/1024 , G06F2212/1041 , G06F2212/1044 , G06F2212/152 , G06F2212/202 , G06F2212/401 , G06F2212/402 , G06F2212/7207 , G06Q10/06 , G06Q10/06314 , G06Q10/087 , G06Q10/20 , G06Q50/04 , G07C5/008 , G08C2200/00 , G11C5/06 , H03M7/30 , H03M7/3084 , H03M7/40 , H03M7/4031 , H03M7/6005 , H03M7/6023 , H04B10/25 , H04J14/00 , H04L9/0643 , H04L9/14 , H04L9/3247 , H04L9/3263 , H04L12/2809 , H04L41/024 , H04L41/046 , H04L41/082 , H04L41/0813 , H04L41/0896 , H04L41/12 , H04L41/147 , H04L41/5019 , H04L43/065 , H04L43/16 , H04L45/02 , H04L45/52 , H04L47/24 , H04L47/38 , H04L47/765 , H04L47/782 , H04L47/805 , H04L47/82 , H04L47/823 , H04L49/15 , H04L49/555 , H04L61/00 , H04L67/10 , H04L67/1004 , H04L67/1008 , H04L67/1012 , H04L67/1014 , H04L67/1029 , H04L67/1034 , H04L67/1097 , H04L67/12 , H04L67/34 , H04L67/51 , H04Q1/04 , H04Q11/00 , H04Q11/0005 , H04Q11/0062 , H04Q11/0071 , H04Q2011/0037 , H04Q2011/0041 , H04Q2011/0052 , H04Q2011/0073 , H04Q2011/0079 , H04Q2011/0086 , H04Q2213/13523 , H04Q2213/13527 , H04W4/023 , H04W4/80 , H05K1/0203 , H05K1/181 , H05K5/0204 , H05K7/1418 , H05K7/1421 , H05K7/1422 , H05K7/1447 , H05K7/1461 , H05K7/1485 , H05K7/1487 , H05K7/1489 , H05K7/1491 , H05K7/1492 , H05K7/1498 , H05K7/2039 , H05K7/20709 , H05K7/20727 , H05K7/20736 , H05K7/20745 , H05K7/20836 , H05K13/0486 , H05K2201/066 , H05K2201/10121 , H05K2201/10159 , H05K2201/10189 , Y02D10/00 , Y02P90/30 , Y04S10/50 , Y04S10/52 , Y10S901/01
摘要: Embodiments are generally directed apparatuses, methods, techniques and so forth to select two or more processing units of the plurality of processing units to process a workload, and configure a circuit switch to link the two or more processing units to process the workload, the two or more processing units each linked to each other via paths of communication and the circuit switch.
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公开(公告)号:US20230096061A1
公开(公告)日:2023-03-30
申请号:US17953350
申请日:2022-09-27
申请人: ARTERIS, INC.
发明人: Benoit de LESCURE , Moez CHERIF
IPC分类号: H04L49/55 , H04L49/109 , H04L49/25
摘要: Design of a network-on-chip (NoC) includes searching for a potential deadlock in a topology of the NoC, where the potential deadlock is caused by an external dependency in which input of data into the NoC is dependent on output of data from the NoC. The NoC design further includes modifying the NoC topology to resolve the potential deadlock.
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公开(公告)号:US20230083347A1
公开(公告)日:2023-03-16
申请号:US18058015
申请日:2022-11-22
发明人: Riaz Khan , Atri Indiresan , Manas Pati
摘要: An embodiment is directed to switchover operations with a mobile virtualized network device in a mobile device. The mobile virtualized hardware switchover operations may be used to selectively and temporarily provide virtualized control-plane operations to the data-plane of a non-redundant network device undergoing an upgrade or a reboot of its control plane. A non-redundant network device may operate hitless, or near hitless, operation even when its control plane is unavailable.
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公开(公告)号:US11595277B2
公开(公告)日:2023-02-28
申请号:US17404749
申请日:2021-08-17
申请人: Intel Corporation
发明人: Matthew Adiletta , Aaron Gorius , Myles Wilde , Michael Crocker
IPC分类号: H04L43/08 , G06F16/901 , H04B10/25 , G02B6/38 , G02B6/42 , G02B6/44 , G06F1/18 , G06F1/20 , G06F3/06 , G06F8/65 , G06F9/30 , G06F9/4401 , G06F9/54 , G06F12/109 , G06F12/14 , G06F13/16 , G06F13/40 , G08C17/02 , G11C5/02 , G11C7/10 , G11C11/56 , G11C14/00 , H03M7/30 , H03M7/40 , H04L41/14 , H04L43/0817 , H04L43/0876 , H04L43/0894 , H04L49/00 , H04L49/25 , H04L49/356 , H04L49/45 , H04L67/02 , H04L67/306 , H04L69/04 , H04L69/329 , H04Q11/00 , H05K7/14 , G06F15/16 , G06F9/38 , G06F9/50 , H04L41/12 , H04L41/5019 , H04L43/16 , H04L47/24 , H04L47/38 , H04L67/1004 , H04L67/1034 , H04L67/1097 , H04L67/12 , H05K5/02 , H04W4/80 , G06Q10/087 , G06Q10/20 , G06Q50/04 , H04L43/065 , H04J14/00 , H04L61/00 , H04L67/51 , H04L41/147 , H04L67/1008 , H04L41/0813 , H04L67/1029 , H04L41/0896 , H04L47/70 , H04L47/78 , H04L41/082 , H04L67/00 , H04L67/1012 , B25J15/00 , B65G1/04 , H05K7/20 , H04L49/55 , H04L67/10 , H04W4/02 , H04L45/02 , G06F13/42 , H05K1/18 , G05D23/19 , G05D23/20 , H04L47/80 , H05K1/02 , H04L45/52 , H04Q1/04 , G06F12/0893 , H05K13/04 , G11C5/06 , G06F11/14 , G06F11/34 , G06F12/0862 , G06F15/80 , H04L47/765 , H04L67/1014 , G06F12/10 , G06Q10/06 , G06Q10/0631 , G07C5/00 , H04L12/28 , H04L41/02 , H04L9/06 , H04L9/14 , H04L9/32 , H04L41/046 , H04L49/15
摘要: Technologies for switching network traffic include a network switch. The network switch includes one or more processors and communication circuitry coupled to the one or more processors. The communication circuitry is capable of switching network traffic of multiple link layer protocols. Additionally, the network switch includes one or more memory devices storing instructions that, when executed, cause the network switch to receive, with the communication circuitry through an optical connection, network traffic to be forwarded, and determine a link layer protocol of the received network traffic. The instructions additionally cause the network switch to forward the network traffic as a function of the determined link layer protocol. Other embodiments are also described and claimed.
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公开(公告)号:US11570040B2
公开(公告)日:2023-01-31
申请号:US16945912
申请日:2020-08-02
申请人: Nicira, Inc.
发明人: Jin Liu , Hua Wang , Ziyou Wang , Bolt Zhang , Pradeep Singh , Anupam Chanda
IPC分类号: H04L41/0677 , H04L49/55 , H04L12/18 , H04L12/46
摘要: For a network with host machines that are hosting virtual machines, a method for facilitating BUM (broadcast, unknown unicast, and multicast) traffic between a hardware switch (e.g., ToR switch) and the host machines is provided. The network has a set of host machines configured as a cluster of replicators for replicating BUM traffic from the hardware switch to the host machines. A set of network controllers establishes failure-detection tunnels for links between the hardware switch and the replicator cluster. The replicator cluster informs the set of controllers of a change in the membership of the replicator cluster to initiate an update to the active failure-detection sessions. The set of network controllers communicates with the replicator cluster and a ToR switch to establish bidirectional forwarding detection (BFD) sessions between one or more replicator nodes in the replicator cluster and the ToR switch.
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公开(公告)号:US11368565B1
公开(公告)日:2022-06-21
申请号:US17088564
申请日:2020-11-03
IPC分类号: H04L29/14 , H04L69/40 , H04L67/145 , H04L49/55 , H04L41/0654 , G06F9/455 , H04L43/0811 , H04L41/0893 , H04L43/10
摘要: An example operation may include a system, comprising one or more of receiving a heartbeat message from a peer virtualization network function component interface (VFCNI) indicating a current operational state of active when a VNFCI is in an active state, sending a first heartbeat message to the peer VNFCI indicating a current operational state as active, sending a next state request with an active state and split-brain condition to a virtual network function manager (VNFM), starting a response timer, sending a second heartbeat message to the peer VNFCI indicating the current operational state as active and a desired operational state as active when one or more of: the VNFCI is not a preferred standby instance, the response timer expires, stopping the response timer when a next state response message is received, sending a third heartbeat message to the peer VNFCI indicating the current operational state as active and a desired operational state as active when and an active state is contained in the next state response message, and transitioning a state of the VNFCI to a deactivating state when one or more of: the VCNFI is the preferred standby instance, and a standby state is contained in the next state response message.
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公开(公告)号:US20220190956A1
公开(公告)日:2022-06-16
申请号:US17684729
申请日:2022-03-02
发明人: Qing Chen , Jiyuan Shi , Jie Chen
摘要: A packet processing method includes generating, by a processor of a network device, a first encoding task based on M original packets in a to-be-processed first data stream, where M is a positive integer, and where the first encoding task instructs to encode the M original packets; and performing, by a target hardware engine of the network device and based on the first encoding task, forward error correction (FEC) encoding on the M original packets to obtain R redundant packets, where R is a positive integer.
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公开(公告)号:US11329910B2
公开(公告)日:2022-05-10
申请号:US16151872
申请日:2018-10-04
申请人: FUJITSU LIMITED
发明人: Takashi Kuwabara
IPC分类号: H04L45/28 , H04L41/0668 , H04L69/22 , H04L49/25 , H04L49/55 , H04L41/0803
摘要: A transmission apparatus, includes a plurality of input circuits, N+1 switches (N is a natural number of 2 or larger), and a plurality of output circuits, wherein a first input circuit divides inputted data into partial data in a predetermined length, and distributes to the N+1 switches continuous M pieces of partial data (M is a natural number of 2 or larger and N or smaller) and horizontal parities calculated over the M pieces of partial data for every the continuous M pieces of partial data obtained from the division, and a first output circuit restores the data inputted to the first input circuit and outputs the restored data using at least any of the M pieces of partial data and the horizontal parities which are distributed by the first input circuit to the N+1 switches and are transferred by the N+1 switches.
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公开(公告)号:US11303515B2
公开(公告)日:2022-04-12
申请号:US15845332
申请日:2017-12-18
申请人: BCE INC.
发明人: Ting Wo Chung
IPC分类号: H04L12/24 , H04L12/713 , H04L12/723 , H04L12/939 , H04L12/931 , H04L29/06 , H04L41/082 , H04L45/586 , H04L45/50 , H04L49/55 , H04L49/00 , H04L49/60 , H04L69/00
摘要: A method of configuring at least one switch involves configuring the at least one switch to direct communication to at least one of a plurality of computers according to at least one outcome of simulated interaction of a plurality of virtual network routers. A method of simulating interaction of a plurality of virtual network routers involves: causing a first at least one processor circuit to simulate the interaction of the plurality of virtual network routers; and causing a second at least one processor circuit, different from the first at least one processor circuit, to simulate the interaction of the plurality of virtual network routers redundantly to the simulated interaction of the plurality of virtual network routers on the first at least one processor circuit. Apparatuses and computer-readable media are also disclosed.
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公开(公告)号:US11297007B2
公开(公告)日:2022-04-05
申请号:US16669947
申请日:2019-10-31
申请人: DENSO CORPORATION
发明人: Yoshifumi Kaku , Shinya Ishibashi
IPC分类号: H04L12/937 , H04L49/253 , H04L47/32 , H04L49/55
摘要: A relay apparatus includes: ports for transmitting and receiving communication data; a relay process portion that executes a relay process of transmitting the communication data received from at least one of the ports, from a destination port corresponding to the at least one of the ports connected to a destination device in accordance with a destination for the communication data; and a setting portion that, by an instruction from at least one external device, sets each of the ports to either a relay prohibition state in which relay of the communication data is prohibited or a relay allowance state in which the relay of the communication data is allowed. When the destination port, the relay process portion discards the received communication data without saving the received communication data.
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