公开(公告)号：US20240191354A1

公开(公告)日：2024-06-13

申请号：US18078841

申请日：2022-12-09

Applicant: Applied Materials, Inc.

Inventor： Ying-Bing JIANG ,  Joung Joo LEE ,  Xianmin TANG ,  Jiang LU ,  Avgerinos V. GELATOS ,  Dien-yeh WU ,  Weifeng YE ,  Yiyang WAN ,  Gary HOW ,  Joseph HERNANDEZ

IPC: C23C16/455 ,  C23C16/42 ,  C23C16/505 ,  H01J37/32

CPC classification number: C23C16/45536 ,  C23C16/42 ,  C23C16/45553 ,  C23C16/45565 ,  C23C16/505 ,  H01J37/321 ,  H01J2237/3321

Abstract: Methods of depositing a metal silicide on a substrate are provided herein. In some embodiments, a method of depositing a metal silicide on a substrate having a silicon containing surface includes: creating a plasma comprising a first gas in a plasma region in a chemical vapor deposition (CVD) chamber, wherein the plasma region is disposed between a lid heater and a showerhead; flowing the first gas through a plurality of first openings of the showerhead to an activation region in the CVD chamber disposed between the showerhead and the substrate; flowing a second gas comprising a metal precursor in a non-plasma state through a plurality of second openings of the showerhead to the activation region, wherein the plurality of second openings are fluidly independent from the plurality of first openings within the showerhead; mixing the first gas with the second gas to activate the second gas in the activation region; and exposing the silicon containing surface of the substrate to the activated second gas.

公开(公告)号：US20230017383A1

公开(公告)日：2023-01-19

申请号：US17375654

申请日：2021-07-14

Applicant: Applied Materials, Inc.

Inventor： Bencherki MEBARKI ,  Joung Joo LEE ,  Komal GARDE ,  Kishor Kumar KALATHIPARAMBIL ,  Xianmin TANG ,  Xiangjin XIE ,  Rui LI

IPC: H01L21/768 ,  H01L21/285 ,  C23C14/34

Abstract: Methods and apparatus for processing a substrate are provided. For example, a method includes sputtering a material from a target in a PVD chamber to form a material layer on a layer comprising a feature of the substrate, the feature having an opening width defined by a first sidewall and a second sidewall, the material layer having a greater lateral thickness at the top surface of the layer than a thickness on the first sidewall or the second sidewall within the feature, depositing additional material on the layer by biasing the layer with an RF bias at a low power, etching the material layer from the layer by biasing the layer with an RF bias at a high-power, and repeatedly alternating between the low power and the high-power at a predetermined frequency.

公开(公告)号：US20190148150A1

公开(公告)日：2019-05-16

申请号：US16172786

申请日：2018-10-27

Applicant: Applied Materials, Inc.

Inventor： Joung Joo LEE ,  Feng CHEN ,  Zhiyuan WU ,  Atashi BASU ,  Mehul B. NAIK ,  Yufei HU

IPC: H01L21/28 ,  H01L21/02 ,  H01L21/768 ,  H01L21/285 ,  H01L23/532 ,  H01L23/528

Abstract: Methods for forming a capping protection structure on a metal line layer formed in an insulating material in an interconnection structure are provided. In one embodiment, a method for forming capping protection on a metal line in an interconnection structure for semiconductor devices includes selectively forming a metal silicide layer on a metal line bounded by a dielectric bulk insulating layer in a back end interconnection structure formed on a substrate in a processing chamber; and forming a dielectric layer on the metal silicide layer.

公开(公告)号：US20230402271A1

公开(公告)日：2023-12-14

申请号：US18237934

申请日：2023-08-25

Applicant: APPLIED MATERIALS, INC.

Inventor： Xiaodong WANG ,  Joung Joo LEE ,  Fuhong ZHANG ,  Martin Lee RIKER ,  Keith A. MILLER ,  William FRUCHTERMAN ,  Rongjun WANG ,  Adolph Miller ALLEN ,  Shouyin ZHANG ,  Xianmin TANG

IPC: H01J37/34 ,  C23C14/34 ,  C23C14/35 ,  C23C14/54

CPC classification number: H01J37/3458 ,  H01J37/345 ,  H01J37/3452 ,  H01J37/3411 ,  C23C14/345 ,  H01J37/3441 ,  H01J37/3402 ,  C23C14/351 ,  C23C14/54 ,  H01J37/3405 ,  H01J37/3447 ,  H01J37/3455

Abstract: Methods and apparatus for processing substrates are disclosed. In some embodiments, a process chamber for processing a substrate includes: a body having an interior volume and a target to be sputtered, the interior volume including a central portion and a peripheral portion; a substrate support disposed in the interior volume opposite the target and having a support surface configured to support the substrate; a collimator disposed in the interior volume between the target and the substrate support; a first magnet disposed about the body proximate the collimator; a second magnet disposed about the body above the support surface and entirely below the collimator and spaced vertically below the first magnet; and a third magnet disposed about the body and spaced vertically between the first magnet and the second magnet. The first, second, and third magnets are configured to generate respective magnetic fields to redistribute ions over the substrate.

公开(公告)号：US20230122969A1

公开(公告)日：2023-04-20

申请号：US18067415

申请日：2022-12-16

Applicant: Applied Materials, Inc.

Inventor： Shirish PETHE ,  Fuhong ZHANG ,  Joung Joo LEE ,  Rui LI ,  Xiangjin XIE ,  Xianmin TANG

IPC: H01L21/768 ,  H01L21/3215 ,  H01L21/3213

Abstract: Embodiments disclosed herein generally relate to methods of depositing a plurality of layers. A doped copper seed layer is deposited in a plurality of feature definitions in a device structure. A first copper seed layer is deposited and then the first copper seed layer is doped to form a doped copper seed layer, or a doped copper seed layer is deposited directly. The doped copper seed layer leads to increased flowability, reducing poor step coverage, overhang, and voids in the copper layer.

公开(公告)号：US20210118729A1

公开(公告)日：2021-04-22

申请号：US17036038

申请日：2020-09-29

Applicant: Applied Materials, Inc.

Inventor： Shirish PETHE ,  Fuhong ZHANG ,  Joung Joo LEE ,  Rui LI ,  Xiangjin XIE ,  Xianmin TANG

IPC: H01L21/768 ,  H01L21/3215 ,  H01L21/3213

Abstract: Embodiments disclosed herein generally relate to methods of depositing a plurality of layers. A doped copper seed layer is deposited in a plurality of feature definitions in a device structure. A first copper seed layer is deposited and then the first copper seed layer is doped to form a doped copper seed layer, or a doped copper seed layer is deposited directly. The doped copper seed layer leads to increased flowability, reducing poor step coverage, overhang, and voids in the copper layer.

公开(公告)号：US20170221685A1

公开(公告)日：2017-08-03

申请号：US15409195

申请日：2017-01-18

Applicant: APPLIED MATERIALS, INC.

Inventor： Shouyin ZHANG ,  Fuhong ZHANG ,  Joung Joo LEE

IPC: H01J37/34 ,  C23C14/35 ,  H01J37/32

CPC classification number: H01J37/3447 ,  C23C14/35 ,  H01J37/3244 ,  H01J37/3405 ,  H01J37/3438 ,  H01J37/3444

Abstract: Embodiments of method for igniting a plasma are provided herein. In some embodiments, a method for igniting a plasma includes: flowing a process gas into a process chamber to increase a pressure within the process chamber to a first pressure; applying a first bias voltage from a collimator power source to a collimator disposed within the process chamber; and applying a second power to a sputtering source disposed in the process chamber above the collimator after the first pressure has been reached and the first bias voltage is applied to ignite the plasma.

公开(公告)号：US20240404803A1

公开(公告)日：2024-12-05

申请号：US18647819

申请日：2024-04-26

Applicant: Applied Materials, Inc.

Inventor： Yoon Ah SHIN ,  Jiajie CEN ,  Zhiyuan WU ,  Bencherki MEBARKI ,  Kevin KASHEFI ,  Joung Joo LEE ,  Xianmin TANG

IPC: H01J37/32

Abstract: Embodiments of the present disclosure generally relate to a low temperature non-plasma containing preclean process to selectively remove contaminants from the surface of a substrate, such as halogen containing and/or metal oxide containing contaminants. The non-plasma containing precleaning process is performed at a low temperature by use of a microwave source that is configured to provide microwave energy to the processing gases disposed within a processing chamber. The non-plasma low temperature preclean process is effective in reducing halogen containing residues, such as fluorine and chlorine containing residues formed on a surface of a substrate.

公开(公告)号：US20230035288A1

公开(公告)日：2023-02-02

申请号：US17858371

申请日：2022-07-06

Applicant: Applied Materials, Inc.

Inventor： Suketu PARIKH ,  Andrew YEOH ,  Tom S. CHOI ,  Joung Joo LEE ,  Nitin K. INGLE

IPC: H01L21/311 ,  H01L21/768

Abstract: Methods open etch stop layers in an integrated environment along with metallization processes. In some embodiments, a method for opening an etch stop layer (ESL) prior to metallization may include etching the ESL with an anisotropic process using direct plasma to form helium ions that are configured to roughen the ESL for a first duration of approximately 10 seconds to approximately 30 seconds, forming aluminum fluoride on the ESL using remote plasma and nitrogen trifluoride gas for a second duration of approximately 10 seconds to approximately 30 seconds, and exposing the ESL to a gas mixture of boron trichloride, trimethylaluminum, and/or dimethylaluminum chloride at a temperature of approximately 100 degrees Celsius to approximately 350 degrees Celsius to remove aluminum fluoride from the ESL and a portion of a material of the ESL for a third duration of approximately 30 seconds to approximately 60 seconds.

公开(公告)号：US20230031381A1

公开(公告)日：2023-02-02

申请号：US17858390

申请日：2022-07-06

Applicant: Applied Materials, Inc.

Inventor： Suketu PARIKH ,  Andrew YEOH ,  Tom S. CHOI ,  Joung Joo LEE ,  Nitin K. INGLE

IPC: H01L21/02 ,  H01L21/311 ,  H01L21/768

Abstract: In some embodiments, an integrated tool for opening an etch stop layer and performing metallization comprises a first chamber with a remote plasma source, a direct plasma source, and a thermal source configured to open the etch stop layer on a substrate, a second chamber of the integrated tool with dry etch processing configured to pre-clean surfaces exposed by opening the etch stop layer, a third chamber of the integrated tool configured to deposit a barrier layer on the substrate, a fourth chamber of the integrated tool configured to deposit a liner layer on the substrate, and at least one fifth chamber of the integrated tool configured to deposit metallization material on the substrate. The integrated tool may also include a vacuum transfer chamber.