公开(公告)号：US20240387458A1

公开(公告)日：2024-11-21

申请号：US18199183

申请日：2023-05-18

Applicant: Applied Materials, Inc.

Inventor： Suketu PARIKH ,  Andrew YEOH ,  Arvind SUNDARRAJAN ,  Nirmalya MAITY ,  Balasubramanian PRANATHARTHIHARAN ,  Martinus Maria BERKENS

IPC: H01L25/065 ,  H01L21/768 ,  H01L21/78 ,  H01L23/00 ,  H01L23/367 ,  H01L23/522 ,  H01L25/00

Abstract: In some embodiments, a method for forming a multiple die stack comprises forming a first circuit wafer with multiple first circuit dies and a first circuit support layer on a bottom of the first circuit wafer where each first circuit die has a power and circuit layer underlying a power and signal layer, forming an interposer wafer with multiple interposer dies and an interposer support layer on a top of the interposer wafer where each interposer die has a power and signal layer underlying a power via and signal via layer, and hybrid bonding a top surface of the first circuit wafer to a bottom surface of the interposer wafer to form a first bonded wafer with electrical power and signal connections between the multiple first circuit dies and the multiple interposer dies where the interposer wafer provides structural support of the first bonded wafer during subsequent processing.

公开(公告)号：US20230005844A1

公开(公告)日：2023-01-05

申请号：US17839827

申请日：2022-06-14

Applicant: Applied Materials, Inc.

Inventor： Suketu PARIKH ,  Alexander JANSEN ,  Joung Joo LEE ,  Lequn LIU

IPC: H01L23/532 ,  H01L23/522 ,  H01L21/768 ,  H01L21/67

Abstract: Interconnect structures on a substrate have low resistivity and high dopant interfaces. In some embodiments, the structures may have an opening with a sidewall from an upper surface to an underlying metallic layer of copper, a barrier layer of tantalum nitride formed on the sidewall of the opening, a liner layer of cobalt or ruthenium formed on the barrier layer and on the underlying metallic layer, a first copper layer with a dopant with a first dopant content formed on the liner layer and filling a lower portion of the opening to form a via-the first dopant content is approximately 0.5 percent to approximately 10 percent, and a second copper layer with the dopant with a second dopant content formed on the first copper layer and filling the at least one opening—the second dopant content is more than zero to approximately 0.5 percent of the dopant and is less than the first dopant content.

公开(公告)号：US20230005789A1

公开(公告)日：2023-01-05

申请号：US17839817

申请日：2022-06-14

Applicant: Applied Materials, Inc.

Inventor： Suketu PARIKH ,  Alexander JANSEN ,  Joung Joo LEE ,  Lequn LIU

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/3105 ,  H01L23/532

Abstract: Methods for forming interconnects on a substrate with low resistivity and high dopant interfaces. In some embodiments, a method includes depositing a first copper layer with a dopant with a first dopant content of 0.5 percent to 10 percent in the interconnect by sputtering a first copper-based target at a first temperature of zero degrees Celsius to 200 degrees Celsius, annealing the substrate at a second temperature of 200 degrees Celsius to 400 degrees Celsius to reflow the first copper layer, depositing a second copper layer with the dopant with a second dopant content of zero percent to 0.5 percent by sputtering a second copper-based target at the first temperature of zero degrees Celsius to 200 degrees Celsius, and annealing the substrate at a third temperature of 200 degrees Celsius to 400 degrees Celsius to reflow the second copper layer.

公开(公告)号：US20230035288A1

公开(公告)日：2023-02-02

申请号：US17858371

申请日：2022-07-06

Applicant: Applied Materials, Inc.

Inventor： Suketu PARIKH ,  Andrew YEOH ,  Tom S. CHOI ,  Joung Joo LEE ,  Nitin K. INGLE

IPC: H01L21/311 ,  H01L21/768

Abstract: Methods open etch stop layers in an integrated environment along with metallization processes. In some embodiments, a method for opening an etch stop layer (ESL) prior to metallization may include etching the ESL with an anisotropic process using direct plasma to form helium ions that are configured to roughen the ESL for a first duration of approximately 10 seconds to approximately 30 seconds, forming aluminum fluoride on the ESL using remote plasma and nitrogen trifluoride gas for a second duration of approximately 10 seconds to approximately 30 seconds, and exposing the ESL to a gas mixture of boron trichloride, trimethylaluminum, and/or dimethylaluminum chloride at a temperature of approximately 100 degrees Celsius to approximately 350 degrees Celsius to remove aluminum fluoride from the ESL and a portion of a material of the ESL for a third duration of approximately 30 seconds to approximately 60 seconds.

公开(公告)号：US20230031381A1

公开(公告)日：2023-02-02

申请号：US17858390

申请日：2022-07-06

Applicant: Applied Materials, Inc.

Inventor： Suketu PARIKH ,  Andrew YEOH ,  Tom S. CHOI ,  Joung Joo LEE ,  Nitin K. INGLE

IPC: H01L21/02 ,  H01L21/311 ,  H01L21/768

Abstract: In some embodiments, an integrated tool for opening an etch stop layer and performing metallization comprises a first chamber with a remote plasma source, a direct plasma source, and a thermal source configured to open the etch stop layer on a substrate, a second chamber of the integrated tool with dry etch processing configured to pre-clean surfaces exposed by opening the etch stop layer, a third chamber of the integrated tool configured to deposit a barrier layer on the substrate, a fourth chamber of the integrated tool configured to deposit a liner layer on the substrate, and at least one fifth chamber of the integrated tool configured to deposit metallization material on the substrate. The integrated tool may also include a vacuum transfer chamber.

公开(公告)号：US20230010568A1

公开(公告)日：2023-01-12

申请号：US17719502

申请日：2022-04-13

Applicant: Applied Materials, Inc.

Inventor： Suketu PARIKH ,  Mihaela A. BALSEANU ,  Bhaskar Jyoti BHUYAN ,  Ning LI ,  Mark Joseph SALY ,  Aaron Michael DANGERFIELD ,  David THOMPSON ,  Abhijit B. MALLICK

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/311

Abstract: Methods and apparatus for processing a substrate are provided herein. For example, a method of processing a substrate comprises a) removing oxide from a metal layer disposed in a dielectric layer on the substrate disposed in a processing chamber, b) selectively depositing a self-assembled monolayer (SAM) on the metal layer using atomic layer deposition, c) depositing a precursor while supplying water to form one of an aluminum oxide (AlO) layer on the dielectric layer or a low-k dielectric layer on the dielectric layer, d) supplying at least one of hydrogen (H2) or ammonia (NH3) to remove the self-assembled monolayer (SAM), and e) depositing one of a silicon oxycarbonitride (SiOCN) layer or a silicon nitride (SiN) layer atop the metal layer and the one of the aluminum oxide (AlO) layer on the dielectric layer or the low-k dielectric layer on the dielectric layer.