公开(公告)号：US4459159A

公开(公告)日：1984-07-10

申请号：US426867

申请日：1982-09-29

申请人： William C. O'Mara

发明人： William C. O'Mara

IPC分类号： H01L21/322 ,  H01L21/324 ,  H01L21/76 ,  H01L21/225 ,  H01L7/54

CPC分类号： H01L21/76 ,  H01L21/3221 ,  H01L21/324 ,  Y10S148/003 ,  Y10S148/085 ,  Y10S148/118 ,  Y10S148/15

摘要： A method for making semiconductor integrated circuits which improves and decreases fringing capacitance in semiconductor integrated circuits. An oxygenated, single-crystal silicon lamella is lightly doped, producing an excess of holes, thereby forming a semiconductor substrate. The substrate is used to fabricate semiconductor devices in the usual way, except that density may be slightly increased. After fabrication, the substrate is heated, preferably at 450.degree. C., until resistivity of the substrate has increased so that non-diffused regions of the substrate are substantially non-conductive.

摘要翻译： 一种制造半导体集成电路的方法，其改善和减少半导体集成电路中的边缘电容。 氧化的单晶硅片轻掺杂，产生过量的空穴，从而形成半导体衬底。 基板用于以通常的方式制造半导体器件，除了密度可能稍微增加。 在制造之后，将衬底加热，优选在450℃，直到衬底的电阻率增加，使得衬底的非扩散区域基本上不导通。

公开(公告)号：US4447272A

公开(公告)日：1984-05-08

申请号：US443828

申请日：1982-11-22

申请人： Nelson S. Saks

发明人： Nelson S. Saks

IPC分类号： H01L21/28 ,  H01L21/336 ,  H01L7/54 ,  H01L21/263

CPC分类号： H01L29/66833 ,  H01L21/28282 ,  Y10S438/91

摘要： An improved method for reducing the density of electronic trapping states and fixed insulator charge in the thin oxide layer of an MNOS structure. The method includes the steps of implanting hydrogen ions in field region of the oxide layer and annealing the MNOS structure at 400.degree. C. to cause the ions to diffuse laterally into the gate region of the oxide layer.

摘要翻译： 一种用于降低MNOS结构的薄氧化物层中的电子俘获状态密度和固定的绝缘体电荷的改进方法。 该方法包括以下步骤：在氧化层的场区域注入氢离子，并在400℃退火MNOS结构，使离子横向扩散到氧化物层的栅极区域。

公开(公告)号：US4397695A

公开(公告)日：1983-08-09

申请号：US269740

申请日：1981-06-02

申请人： Manfred Arlt ,  Joachim Dathe

发明人： Manfred Arlt ,  Joachim Dathe

IPC分类号： H01L29/73 ,  H01L21/324 ,  H01L21/331 ,  H01L7/54 ,  H01L21/265

CPC分类号： H01L21/324

摘要： Stabilizing the current gain of NPN-silicon transistors by two annealing processes:a high temperature annealing process for at least 30 minutes at a temperature of 510.degree. to 590.degree. C., anda lower temperature annealing process for at least 30 minutes at a temperature of 380.degree. to 460.degree. C.

摘要翻译： 通过两个退火工艺稳定NPN-硅晶体管的电流增益：在510〜590℃的温度下进行至少30分钟的高温退火工艺，在温度下进行低温退火处理至少30分钟 380〜460℃

公开(公告)号：US4224083A

公开(公告)日：1980-09-23

申请号：US929624

申请日：1978-07-31

申请人： Michael W. Cresswell

发明人： Michael W. Cresswell

IPC分类号： H01L21/26 ,  H01L21/263 ,  H01L29/06 ,  H01L29/74 ,  H01L29/747 ,  H01L7/54 ,  H01L9/12

CPC分类号： H01L29/7416 ,  H01L21/26 ,  H01L21/263 ,  H01L29/0642 ,  H01L29/32 ,  H01L29/747 ,  Y10S438/904

摘要： Conductivity modulation states in a first component of a power integrated circuit are dynamically isolated from a second component of the integrated circuit having at least one common active region with the first component by selective irradiation of portions of the common regions between the components. Preferably the irradiation is accomplished by masking the component portions of the body with a radiation shield and irradiating selected portions of the common active regions between the component portions with a suitable radiation source. The radiation source is preferably an electron beam of an energy level between about 1 and 3 Mev, preferably where the irradiation is carried to a dosage between 1.times.10.sup.13 and 1.times.10.sup.15 e/cm.sup.2 and most desirably between 4.times.10.sup.13 and 2.times.10.sup.14 e/cm.sup.2. New high speed bilateral thyristors, reverse switching rectifiers and reverse conducting thyristors are also provided.

摘要翻译： 电力集成电路的第一部件中的电导率调制状态通过选择性地照射部件之间的公共区域的部分，与具有第一部件的至少一个公共有效区域的集成电路的第二部件动态隔离。 优选地，照射通过用辐射屏蔽掩蔽身体的组成部分并且利用合适的辐射源照射组件部分之间的共同有源区域的选定部分来实现。 辐射源优选为能量水平在约1MeV至3Mev之间的电子束，优选地，其中照射被携带至1×10 13和1×10 15 e / cm 2之间的剂量，最优选在4×10 13和2×10 14 e / cm 2之间。 还提供了新的高速双向晶闸管，反向开关整流器和反向导通晶闸管。

公开(公告)号：US4198250A

公开(公告)日：1980-04-15

申请号：US9303

申请日：1979-02-05

申请人： Robert M. Jecmen

发明人： Robert M. Jecmen

IPC分类号： H01L29/78 ,  H01L21/265 ,  H01L21/266 ,  H01L21/336 ,  H01L29/08 ,  H01L21/31 ,  H01L7/54

CPC分类号： H01L29/66598 ,  H01L21/2652 ,  H01L21/266 ,  H01L29/0847 ,  H01L29/6659 ,  Y10S148/053 ,  Y10S148/143

摘要： A process for substantially reducing the overlap between a gate and the source and drain regions of a field-effect transistor is disclosed. Lateral etching of a polysilicon gate provides overhangs which extend from a gate masking member. Source/drain regions are formed by ion implanting through the gate oxide layer. A small amount of dopant is implanted through the overhangs providing a low concentration of dopant in alignment with the gate. During subsequent processing, this low concentration of dopant does not substantially diffuse as do regions of higher concentration. Significant reduction in Miller capacitance is obtained along with improved punch-through characteristics.

摘要翻译： 公开了一种用于大大减少场效应晶体管的栅极和源极和漏极区域之间的重叠的工艺。 多晶硅栅极的横向蚀刻提供从栅极掩模构件延伸的突出端。 源极/漏极区域通过离子注入通过栅极氧化物层形成。 通过突出端注入少量掺杂剂，提供与栅极对准的低浓度掺杂剂。 在随后的处理过程中，这种低浓度的掺杂剂基本上不会像较高浓度的区域那样扩散。 获得了米勒电容的显着降低，同时提高了穿透特性。

公开(公告)号：US4144100A

公开(公告)日：1979-03-13

申请号：US856643

申请日：1977-12-02

申请人： Bernard A. MacIver ,  Eugene Greenstein

发明人： Bernard A. MacIver ,  Eugene Greenstein

IPC分类号： H01L21/265 ,  H01L21/316 ,  H01L7/54

CPC分类号： H01L21/02238 ,  H01L21/02255 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/31662

摘要： Low dosage phosphorus implantation regions in P-type silicon are subjected to a severe damage implant with halogen or silicon ions, preferably fluorine and chlorine. This permits anneal in a strongly oxidizing atmosphere for PN junction passivation, without concurrently inducing PN junction leakage. Oxide passivated PN junctions are formed having leakages as low as when the low dose phosphorus implants are annealed in other atmospheres, or are formed in silicon.

摘要翻译： <100> P型硅中的低剂量磷注入区域用卤素或硅离子（优选氟和氯）进行严重损伤植入。 这允许在强氧化气氛中退火以进行PN结钝化，而不会同时诱发PN结泄漏。 形成氧化物钝化的PN结，其泄漏低于当低剂量磷植入物在其它气氛中退火或者在<111>硅中形成时的泄漏。

公开(公告)号：US3909308A

公开(公告)日：1975-09-30

申请号：US49877274

申请日：1974-08-19

申请人： RCA CORP

发明人： HEAGY JOHN FRANKLIN

IPC分类号： C23C14/00 ,  C23C14/08 ,  C23C14/58 ,  H01L21/00 ,  H01L7/54

CPC分类号： C23C14/5833 ,  C23C14/0021 ,  C23C14/08 ,  C23C14/58 ,  C23C14/584 ,  H01J9/233 ,  H01L21/00 ,  Y10S148/007 ,  Y10S148/12

摘要： A layer of substantially uniform lead monoxide is vapor deposited on a supported signal electrode of a vidicon target. The lead monoxide layer is formed on the signal electrode as a substantially homogeneous compensated intrinsic, or n type, electrically conductive material. An electrical potential is applied to the supported layer of lead monoxide to affect an electrical discharge through a continually renewed atmosphere consisting essentially of one of the inert gases, or nitrogen, whereby ion bombardment of the layer is accomplished.

摘要翻译： 一层基本均匀的一氧化铅气相沉积在一个维持目标靶的支撑信号电极上。 一氧化铅层形成在信号电极上，作为基本均匀的补偿本征或n型导电材料。 将电位施加到负载的一氧化铅层，以通过基本上由一种惰性气体或氮组成的连续更新的气氛来影响放电，从而实现该层的离子轰击。

公开(公告)号：US3902926A

公开(公告)日：1975-09-02

申请号：US44497974

申请日：1974-02-22

申请人： SIGNETICS CORP

发明人： PERLOFF DAVID S ,  KERR JOHN T ,  MARLEY JAMES A

IPC分类号： H01L21/00 ,  H01L29/8605 ,  H01L7/54

CPC分类号： H01L29/8605 ,  H01L21/00 ,  Y10S438/934

摘要： Ion implanted resistor formed in a body of crystalline semiconductor material of a first conductivity type and a known bulk resistivity with at least one region of implanted ions in the body having a conductivity opposite that of the body. The resistance changes no more than 3% from the room temperature value between - 50* and 125* C. Between 0* and 70* C., the change is only 0.3%. In the method, ion implanted resistors having the desired sheet resistivity are formed by varying the implantation energy and/or the thickness of a stopping layer. In addition, the resistor is annealed at a temperature ranging from 550* C. to 650* C.

摘要翻译： 离子注入电阻器形成在具有第一导电类型的结晶半导体材料的主体中，并且已知的体电阻率与体内具有相对于体的导电性的导电离子的至少一个区域。 电阻值从-50℃到125℃的室温值变化不超过3％。在0℃和70℃之间，变化仅为0.3％。

公开(公告)号：US3895965A

公开(公告)日：1975-07-22

申请号：US36340173

申请日：1973-05-24

申请人： BELL TELEPHONE LABOR INC

发明人： MACRAE ALFRED URQUHART ,  MILLER PAUL ,  MOLINE ROBERT ALAN ,  SIMPSON JOHN

IPC分类号： H01L21/316 ,  H01L21/74 ,  H01L7/54 ,  H01L7/36

CPC分类号： H01L21/02238 ,  H01L21/02255 ,  H01L21/31662 ,  H01L21/74 ,  Y10S148/003 ,  Y10S148/017 ,  Y10S148/085 ,  Y10S148/097 ,  Y10S148/117 ,  Y10S438/92

摘要： A method is described for forming buried layers by ion implantation which includes removal of the damaged region in the semiconductor crystal resulting from such implants. Impurity ions are implanted near the surface of a silicon substrate. The substrate is then heated in an oxidizing ambient for a sufficient length of time to allow the impurities to diffuse further into the crystal while an oxide layer grows on the surface consuming the damaged region. The oxide is removed leaving the impurities in defect-free material upon which may be grown an epitaxial layer.

摘要翻译： 描述了一种用于通过离子注入形成掩埋层的方法，该方法包括去除由这种植入物产生的半导体晶体中的受损区域。 杂质离子注入硅衬底的表面附近。 然后将衬底在氧化环境中加热足够长的时间，以允许杂质进一步扩散到晶体中，同时氧化物层在消耗损坏区域的表面上生长。 去除氧化物，留下可在其上生长外延层的无缺陷材料中的杂质。

公开(公告)号：US3890163A

公开(公告)日：1975-06-17

申请号：US41128173

申请日：1973-10-31

申请人： LIGNES TELEGRAPH TELEPHON

发明人： PRUNIAUX BERNARD R ,  ASSEMAT JEAN-LOUIS

IPC分类号： H01L21/265 ,  H01L29/00 ,  H01L7/54

CPC分类号： H01L21/2652 ,  H01L21/26513 ,  H01L29/00 ,  Y10S148/003

摘要： The production sequence of the UHF transistors includes at least one ion implantation step for doping the emitter, which takes place after doping of the base, through an emitter window etched from a thin oxide layer closing the base window previously etched from a thick oxide layer. This ion implantation is followed by an anneal in neutral atmosphere while the emitter window remains open, at a temperature lower than 1000*C in the case of silicon. The base is doped either by diffusion or ion implantation. Two further ion implantations are used to degenerate the base contact area and to reduce transversal base resistance.

摘要翻译： UHF晶体管的生产顺序包括至少一个离子注入步骤，用于掺杂发射体，其在掺杂基底之后通过从薄氧化物层蚀刻的发光体窗口进行掺杂，所述发射器窗口从先前从厚氧化物层蚀刻的基底窗口封闭。 该离子注入之后是中性气氛中的退火，而在硅的情况下，在低于1000℃的温度下，发射极窗口保持断开。 碱通过扩散或离子注入进行掺杂。 使用两个另外的离子注入来简化基极接触面积并降低横向基极电阻。