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公开(公告)号:US11796405B2
公开(公告)日:2023-10-24
申请号:US17205860
申请日:2021-03-18
发明人: Hao Li , Zhiyun Chen
CPC分类号: G01L1/2293 , G01L1/148 , G01L1/2262 , G01L1/2281 , H01L28/20 , H01L29/8605 , G01L1/18 , G06F3/041 , G06F2203/04105
摘要: A hybrid strain sensing system and the method of making such a system provides a thin semiconductor film with strain sensors and signal processing circuits integrated deposited thereon. The semiconductor film may be further processed and then mounted onto a substrate to be used for strain, force, or other related measurements. The system combines the high sensitivity of a semiconductor strain gauge with the high level of integration of semiconductor integrated circuits (IC)s. Both are highly desirable features for applications where miniaturization and/or flexibility are important requirements.
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公开(公告)号:US11764260B2
公开(公告)日:2023-09-19
申请号:US17493213
申请日:2021-10-04
申请人: Tahoe Research, Ltd.
发明人: Walid M. Hafez , Chia-Hong Jan
IPC分类号: H01L29/06 , H01L29/40 , H01L29/66 , H01L29/808 , H01L29/8605 , H01L27/098
CPC分类号: H01L29/0649 , H01L27/098 , H01L29/0657 , H01L29/404 , H01L29/66166 , H01L29/66803 , H01L29/66901 , H01L29/808 , H01L29/8605
摘要: A dielectric and isolation lower fin material is described that is useful for fin-based electronics. In some examples, a dielectric layer is on first and second sidewalls of a lower fin. The dielectric layer has a first upper end portion laterally adjacent to the first sidewall of the lower fin and a second upper end portion laterally adjacent to the second sidewall of the lower fin. An isolation material is laterally adjacent to the dielectric layer directly on the first and second sidewalls of the lower fin and a gate electrode is over a top of and laterally adjacent to sidewalls of an upper fin. The gate electrode is over the first and second upper end portions of the dielectric layer and the isolation material.
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公开(公告)号:US11709517B2
公开(公告)日:2023-07-25
申请号:US17249717
申请日:2021-03-10
申请人: NXP USA, Inc.
发明人: Jiawei Fu , Jianzhou Wu , Jie Jin , Yikun Mo , Stefano Pietri
CPC分类号: G05F3/205 , G05F3/262 , H01L27/0629 , H01L27/0802 , H01L28/20 , H01L29/8605
摘要: A bias current generator circuit includes a current path and a leakage control circuit. The current path is connected between a supply voltage and a ground level. The current path includes a transistor and a resistor. The transistor has a current channel connected in the current path. The resistor has an upper terminal and a lower terminal connected in the current path, and a well contact to allow a reverse leakage current of the resistor to flow through. The leakage control circuit is connected to the supply voltage. The leakage control circuit includes a driving transistor to provide a driving voltage to the well contact of the resistor, and to allow the reverse leakage current of the resistor to flow into the leakage control circuit.
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公开(公告)号:US10326028B1
公开(公告)日:2019-06-18
申请号:US15865117
申请日:2018-01-08
IPC分类号: H01L21/02 , H01L23/60 , H01L23/64 , H01L27/02 , H01L29/06 , H01L29/66 , H01L29/86 , H01L23/522 , H01L23/528 , H01L23/552 , H01L29/8605 , H01L29/40
CPC分类号: H01L29/86 , H01L21/02532 , H01L23/5225 , H01L23/528 , H01L23/552 , H01L23/60 , H01L23/647 , H01L27/0285 , H01L27/0292 , H01L27/0296 , H01L29/0649 , H01L29/0684 , H01L29/405 , H01L29/66083 , H01L29/8605
摘要: A resistor may include a semiconductor layer having a source region, a drain region, and a channel region. The channel region may be between the source region and the drain region. The channel region may have a same polarity as the source region and the drain region. The resistor may further include a first inter-metal dielectric (IMD) layer on the channel region. The resistor may further include a front-side gate shield on the first IMD layer. The front-side gate shield may overlap the channel region.
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公开(公告)号:US20180254353A1
公开(公告)日:2018-09-06
申请号:US15704617
申请日:2017-09-14
发明人: Pascal Fornara
IPC分类号: H01L29/8605 , H01L29/06 , H01L27/06 , H01L27/12
CPC分类号: H01L29/8605 , G11C17/16 , G11C17/18 , G11C2207/2254 , H01L23/5256 , H01L27/0629 , H01L27/11206 , H01L27/1203 , H01L29/0649 , H01L29/861
摘要: A fuse device is formed by a PN junction semiconducting region that is electrically insulated from other portions of an integrated circuit. The fuse device includes a first semiconducting zone having P type of conductivity and a second semiconducting zone having N type of conductivity in contact at a PN junction. First and second electrically conducting contact zones are provided on the first and second semiconducting zone, respectively, without making contact with the PN junction. One of the first and second semiconducting zones is configured with a non-homogeneous concentration of dopants, where a region with a lower value of concentration of dopant is located at the PN junction and a region with a higher value of concentration of dopant is locates at the corresponding electrically conducting contact zone.
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公开(公告)号:US20180247874A1
公开(公告)日:2018-08-30
申请号:US15723528
申请日:2017-10-03
IPC分类号: H01L21/8234 , H01L21/762 , H01C7/12 , H01L27/08 , H01L49/02 , H01L21/74
CPC分类号: H01L21/823493 , H01C7/126 , H01L21/743 , H01L21/76224 , H01L21/76264 , H01L21/76283 , H01L21/76286 , H01L21/765 , H01L27/0802 , H01L28/20 , H01L29/0649 , H01L29/0692 , H01L29/8605
摘要: An integrated circuit includes a semiconductor substrate with an electrically isolated semiconductor well. An upper trench isolation extends from a front face of the semiconductor well to a depth located a distance from the bottom of the well. Two additional isolating zones are electrically insulated from the semiconductor well and extending inside the semiconductor well in a first direction and vertically from the front face to the bottom of the semiconductor well. At least one hemmed resistive region is bounded by the two additional isolating zones, the upper trench isolation and the bottom of the semiconductor well. Electrical contacts are electrically coupled to the hemmed resistive region.
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公开(公告)号:US20180231424A1
公开(公告)日:2018-08-16
申请号:US15649934
申请日:2017-07-14
CPC分类号: G01L1/2293 , G01L1/162 , G01L1/2281 , G01L5/162 , G01L25/006 , H01L22/34 , H01L27/0647 , H01L27/0802 , H01L27/22 , H01L29/84 , H01L29/8605
摘要: An integrated circuit (IC) chip includes a substrate of a piezo-electric material having a first resistivity coefficient associated with a first direction that is longitudinal to a first crystal axis and a second resistivity coefficient associated with a second direction that is transverse to the first crystal axis. The first and second resistivity coefficients have opposite signs. The IC chip also includes a first stress sensing element formed in the substrate and coupled to pass a first current therethrough. The first stress sensing element includes a first resistor aligned such that the major direction of current flow through the first resistor is in the first direction and a second resistor coupled in series with the first resistor and aligned such that the major direction of current flow through the second resistor is in the second direction. A ratio of the resistance of the second resistor to the resistance of the first resistor is equal to a value α, where α is equal to the ratio of the first resistivity coefficient to the second resistivity coefficient.
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公开(公告)号:US20180088153A1
公开(公告)日:2018-03-29
申请号:US15715268
申请日:2017-09-26
发明人: Klaus HEINRICH , Hartmut LIEBING , Andreas ROTH , Stefan EISENBRANDT , Andreas OTT , Bruno BOURY
CPC分类号: G01R17/02 , G01R17/16 , G01R19/0084 , G01R19/0092 , H01L28/20 , H01L29/0649 , H01L29/0692 , H01L29/402 , H01L29/78 , H01L29/7838 , H01L29/8605
摘要: A high-voltage sensing device providing full galvanic isolation between a high-voltage domain and a low-voltage domain, wherein the circuit topology of the device resembles that of a Wheatstone bridge, the Wheatstone bridge employing at least one voltage-controlled semiconductor resistor, wherein the circuit also comprises a reference source connected directly to the Wheatstone bridge and the device comprises a number of shielding structures to electrically isolate the high-voltage domain from the low-voltage domain.
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公开(公告)号:US09842944B2
公开(公告)日:2017-12-12
申请号:US15121879
申请日:2014-07-14
申请人: Intel Corporation
发明人: Walid M. Hafez , Chia-Hong Jan
IPC分类号: H01L29/80 , H01L29/8605 , H01L29/40 , H01L29/66 , H01L29/808 , H01L29/06
CPC分类号: H01L29/0649 , H01L27/098 , H01L29/0657 , H01L29/404 , H01L29/66166 , H01L29/66803 , H01L29/66901 , H01L29/808 , H01L29/8605
摘要: A solid source-diffused junction is described for fin-based electronics. In one example, a fin is formed on a substrate. A glass of a first dopant type is deposited over the substrate and over a lower portion of the fin. A glass of a second dopant type is deposited over the substrate and the fin. The glass is annealed to drive the dopants into the fin and the substrate. The glass is removed and a first and a second contact are formed over the fin without contacting the lower portion of the fin.
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公开(公告)号:US20170277065A1
公开(公告)日:2017-09-28
申请号:US15460828
申请日:2017-03-16
申请人: FUJI XEROX CO., LTD.
发明人: Takashi KONDO
IPC分类号: B41J2/385 , H01L29/74 , H01L29/20 , H01L33/06 , H01L33/30 , H01L33/10 , H01S5/22 , H01L27/15 , H01L33/14
CPC分类号: H01S5/2205 , G03G15/04054 , H01L27/15 , H01L27/153 , H01L29/201 , H01L29/74 , H01L29/8605 , H01L33/06 , H01L33/105 , H01L33/145 , H01L33/30 , H01S5/0261 , H01S5/0427 , H01S5/18308 , H01S5/2222 , H01S5/3095 , H01S5/3216 , H01S5/4031 , H01S5/423
摘要: A light emitting component includes plural transfer elements, plural setting thyristors, and plural light emitting elements. The transfer elements are configured to be sequentially brought into an ON state. The setting thyristors are connected to the transfer elements, respectively. The setting thyristors are configured to be brought into a state where the setting thyristors are capable of changing to the ON state when the transfer elements are brought into the ON state. The light emitting elements are stacked on the setting thyristors through tunnel junctions, respectively. The light emitting elements are configured to emit light of increase a light emission amount when the setting thyristors are brought into the ON state.
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