-
公开(公告)号：US20160027766A1
公开(公告)日：2016-01-28
申请号：US14494253
申请日：2014-09-23
申请人： Apple Inc.
发明人： Chih-Ming Chung
IPC分类号： H01L25/00 , H01L23/498 , H01L25/065 , H01L23/00 , H01L21/56 , H01L21/78
CPC分类号： H01L25/0657 , H01L21/561 , H01L21/563 , H01L21/6835 , H01L21/78 , H01L23/49811 , H01L23/49838 , H01L23/5389 , H01L23/562 , H01L24/19 , H01L24/20 , H01L24/73 , H01L24/75 , H01L24/81 , H01L24/92 , H01L24/96 , H01L24/97 , H01L25/105 , H01L25/50 , H01L2221/68327 , H01L2224/04105 , H01L2224/12105 , H01L2224/16146 , H01L2224/32225 , H01L2224/40108 , H01L2224/41171 , H01L2224/48108 , H01L2224/49171 , H01L2224/49173 , H01L2224/73151 , H01L2224/73267 , H01L2224/751 , H01L2224/753 , H01L2224/7555 , H01L2224/75981 , H01L2224/81203 , H01L2224/8136 , H01L2225/06513 , H01L2225/06548 , H01L2225/06568 , H01L2225/06589 , H01L2225/1035 , H01L2225/1058 , H01L2225/1082 , H01L2225/1088 , H01L2225/1094 , H01L2924/10253 , H01L2924/14 , H01L2924/1431 , H01L2924/15172 , H01L2924/15311 , H01L2924/3511 , H01L2224/18 , H01L2224/26
摘要： Package on package structures and manners of formation are described. In an embodiment, an array of trenches is formed partially through a fan-out substrate. In an embodiment, a plurality of laterally separate locations thermal interface material is dispensed onto an array of embedded bottom die. In an embodiment a thermal compression tool including an array of cavities corresponding to an array of top packages is brought into contact with the array of top packages and underlying fan-out substrate during PoP joint formation. The fan-out substrate may be secured to a vacuum chuck during several processing operations.
摘要翻译： 描述包装结构和形成方式。 在一个实施例中，沟槽阵列部分地通过扇出基板形成。 在一个实施例中，多个横向分开的位置热界面材料被分配到嵌入式底模的阵列上。 在一个实施例中，包括对应于顶部封装阵列的空腔阵列的热压缩工具在PoP接头形成期间与顶部封装阵列和下面的扇出基板接触。 在几个处理操作期间，扇出基板可以固定到真空卡盘。
-
公开(公告)号：US20230268311A1
公开(公告)日：2023-08-24
申请号：US18005264
申请日：2021-07-05
申请人： ROHM CO., LTD.
发明人： Koshun SAITO
IPC分类号： H01L23/00 , H01L23/31 , H01L23/495
CPC分类号： H01L24/73 , H01L24/05 , H01L24/06 , H01L24/29 , H01L24/32 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/83 , H01L24/84 , H01L24/92 , H01L23/3107 , H01L23/49568 , H01L23/49513 , H01L2924/10272 , H01L2924/1033 , H01L2924/13091 , H01L2224/05553 , H01L2224/05552 , H01L2224/06051 , H01L2224/0603 , H01L2224/06181 , H01L2224/29111 , H01L2224/29116 , H01L2224/32245 , H01L2224/37147 , H01L2224/40108 , H01L2224/40245 , H01L2224/40499 , H01L2924/0105 , H01L2224/45124 , H01L2224/48091 , H01L2224/48108 , H01L2224/48245 , H01L2224/83815 , H01L2224/83192 , H01L2224/84815 , H01L2224/92157 , H01L2224/92246 , H01L2224/73221 , H01L2224/73263 , H01L2224/73265
摘要： A semiconductor device includes a die pad, a semiconductor element, a joining layer, a first conductive member, and a second conductive member. The semiconductor element has a first electrode opposing an obverse surface of the die pad, and a second electrode and a third electrode that are opposite to the first electrode in a thickness direction. The first electrode is electrically joined to the obverse surface. The joining layer electrically joins the first electrode and the obverse surface to each other. The first conductive member is electrically joined to the second electrode. The second conductive member is electrically joined to the third electrode. The area of the third electrode is smaller than the area of the second electrode as viewed along the thickness direction. The Young's modulus of the second conductive member is smaller than the Young's modulus of the first conductive member.
-
公开(公告)号：US20160268236A1
公开(公告)日：2016-09-15
申请号：US15164296
申请日：2016-05-25
申请人： Apple Inc.
发明人： Chih-Ming Chung
IPC分类号： H01L25/065 , H01L21/78 , H01L23/00 , H01L25/00
CPC分类号： H01L25/0657 , H01L21/561 , H01L21/563 , H01L21/6835 , H01L21/78 , H01L23/49811 , H01L23/49838 , H01L23/5389 , H01L23/562 , H01L24/19 , H01L24/20 , H01L24/73 , H01L24/75 , H01L24/81 , H01L24/92 , H01L24/96 , H01L24/97 , H01L25/105 , H01L25/50 , H01L2221/68327 , H01L2224/04105 , H01L2224/12105 , H01L2224/16146 , H01L2224/32225 , H01L2224/40108 , H01L2224/41171 , H01L2224/48108 , H01L2224/49171 , H01L2224/49173 , H01L2224/73151 , H01L2224/73267 , H01L2224/751 , H01L2224/753 , H01L2224/7555 , H01L2224/75981 , H01L2224/81203 , H01L2224/8136 , H01L2225/06513 , H01L2225/06548 , H01L2225/06568 , H01L2225/06589 , H01L2225/1035 , H01L2225/1058 , H01L2225/1082 , H01L2225/1088 , H01L2225/1094 , H01L2924/10253 , H01L2924/14 , H01L2924/1431 , H01L2924/15172 , H01L2924/15311 , H01L2924/3511 , H01L2224/18 , H01L2224/26
摘要： Package on package structures and manners of formation are described. In an embodiment, an array of trenches is formed partially through a fan-out substrate. In an embodiment, a plurality of laterally separate locations thermal interface material is dispensed onto an array of embedded bottom die. In an embodiment a thermal compression tool including an array of cavities corresponding to an array of top packages is brought into contact with the array of top packages and underlying fan-out substrate during PoP joint formation. The fan-out substrate may be secured to a vacuum chuck during several processing operations.
-
公开(公告)号：US09754924B2
公开(公告)日：2017-09-05
申请号：US15164296
申请日：2016-05-25
申请人： Apple Inc.
发明人： Chih-Ming Chung
IPC分类号： H01L21/00 , H01L25/065 , H01L25/00 , H01L21/78 , H01L23/00 , H01L23/498 , H01L25/10 , H01L21/683 , H01L21/56 , H01L23/538
CPC分类号： H01L25/0657 , H01L21/561 , H01L21/563 , H01L21/6835 , H01L21/78 , H01L23/49811 , H01L23/49838 , H01L23/5389 , H01L23/562 , H01L24/19 , H01L24/20 , H01L24/73 , H01L24/75 , H01L24/81 , H01L24/92 , H01L24/96 , H01L24/97 , H01L25/105 , H01L25/50 , H01L2221/68327 , H01L2224/04105 , H01L2224/12105 , H01L2224/16146 , H01L2224/32225 , H01L2224/40108 , H01L2224/41171 , H01L2224/48108 , H01L2224/49171 , H01L2224/49173 , H01L2224/73151 , H01L2224/73267 , H01L2224/751 , H01L2224/753 , H01L2224/7555 , H01L2224/75981 , H01L2224/81203 , H01L2224/8136 , H01L2225/06513 , H01L2225/06548 , H01L2225/06568 , H01L2225/06589 , H01L2225/1035 , H01L2225/1058 , H01L2225/1082 , H01L2225/1088 , H01L2225/1094 , H01L2924/10253 , H01L2924/14 , H01L2924/1431 , H01L2924/15172 , H01L2924/15311 , H01L2924/3511 , H01L2224/18 , H01L2224/26
摘要： Package on package structures and manners of formation are described. In an embodiment, an array of trenches is formed partially through a fan-out substrate. In an embodiment, a plurality of laterally separate locations thermal interface material is dispensed onto an array of embedded bottom die. In an embodiment a thermal compression tool including an array of cavities corresponding to an array of top packages is brought into contact with the array of top packages and underlying fan-out substrate during PoP joint formation. The fan-out substrate may be secured to a vacuum chuck during several processing operations.
-
公开(公告)号：US20130127008A1
公开(公告)日：2013-05-23
申请号：US13304167
申请日：2011-11-23
申请人： Anindya Poddar , Luu T. Nguyen
发明人： Anindya Poddar , Luu T. Nguyen
IPC分类号： H01L21/60 , H01L23/482
CPC分类号： H01L23/3121 , H01L21/561 , H01L23/3735 , H01L23/4334 , H01L23/49575 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/37 , H01L24/40 , H01L24/48 , H01L24/81 , H01L24/83 , H01L24/84 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/16245 , H01L2224/291 , H01L2224/2919 , H01L2224/32227 , H01L2224/32245 , H01L2224/371 , H01L2224/4005 , H01L2224/40106 , H01L2224/40108 , H01L2224/40225 , H01L2224/40245 , H01L2224/40479 , H01L2224/48091 , H01L2224/48245 , H01L2224/48247 , H01L2224/81191 , H01L2224/81815 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2224/92225 , H01L2224/92226 , H01L2924/00014 , H01L2924/014 , H01L2924/12042 , H01L2924/181 , H01L2924/1815 , H01L2924/18161 , H01L2924/3025 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： In one aspect of the present invention, an integrated circuit package will be described. The integrated circuit package includes at least two integrated circuits that are attached with a substrate. The integrated circuits and the substrates are at least partially encapsulated in a molding material. There is a groove or air gap that extends partially through the molding material and that is arranged to form a thermal barrier between the integrated circuits.
摘要翻译： 在本发明的一个方面中，将描述集成电路封装。 集成电路封装包括至少两个与基板连接的集成电路。 集成电路和基板至少部分地封装在模制材料中。 存在部分延伸穿过模制材料并且被布置成在集成电路之间形成热障碍物的凹槽或气隙。
-
公开(公告)号：US09640465B2
公开(公告)日：2017-05-02
申请号：US14729672
申请日：2015-06-03
发明人： Xavier Arokiasamy , Chun Ching Liew
CPC分类号： H01L23/49513 , H01L21/4825 , H01L21/50 , H01L23/49524 , H01L23/49541 , H01L23/49562 , H01L24/05 , H01L24/06 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/72 , H01L24/84 , H01L2224/03849 , H01L2224/05014 , H01L2224/05554 , H01L2224/05647 , H01L2224/0603 , H01L2224/371 , H01L2224/37147 , H01L2224/4007 , H01L2224/40108 , H01L2224/40111 , H01L2224/40245 , H01L2224/45144 , H01L2224/45147 , H01L2224/48247 , H01L2224/72 , H01L2224/80815 , H01L2224/84011 , H01L2224/84801 , H01L2224/84815 , H01L2924/181 , H01L2924/00012 , H01L2924/00014
摘要： A semiconductor device includes a lead frame including a die paddle and a lead, a semiconductor chip, and a clip. The semiconductor chip has a first side and a second side opposite to the first side. The first side is attached to the die paddle and the second side includes a first bond pad and a second bond pad. The clip electrically couples the first bond pad to the lead. The clip contacts the first bond pad at a first edge portion of the first bond pad adjacent to the second bond pad and defines a first cavity between a central portion of the first bond pad and the clip. Solder is within the first cavity to electrically couple the clip to the first bond pad. The semiconductor device includes a first opening to the first cavity to route flux away from the second bond pad during reflow soldering.
-
公开(公告)号：US08716830B2
公开(公告)日：2014-05-06
申请号：US13304167
申请日：2011-11-23
申请人： Anindya Poddar , Luu T. Nguyen
发明人： Anindya Poddar , Luu T. Nguyen
IPC分类号： H01L21/70
CPC分类号： H01L23/3121 , H01L21/561 , H01L23/3735 , H01L23/4334 , H01L23/49575 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/37 , H01L24/40 , H01L24/48 , H01L24/81 , H01L24/83 , H01L24/84 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/16245 , H01L2224/291 , H01L2224/2919 , H01L2224/32227 , H01L2224/32245 , H01L2224/371 , H01L2224/4005 , H01L2224/40106 , H01L2224/40108 , H01L2224/40225 , H01L2224/40245 , H01L2224/40479 , H01L2224/48091 , H01L2224/48245 , H01L2224/48247 , H01L2224/81191 , H01L2224/81815 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2224/92225 , H01L2224/92226 , H01L2924/00014 , H01L2924/014 , H01L2924/12042 , H01L2924/181 , H01L2924/1815 , H01L2924/18161 , H01L2924/3025 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： In one aspect of the present invention, an integrated circuit package will be described. The integrated circuit package includes at least two integrated circuits that are attached with a substrate. The integrated circuits and the substrates are at least partially encapsulated in a molding material. There is a groove or air gap that extends partially through the molding material and that is arranged to form a thermal barrier between the integrated circuits.
摘要翻译： 在本发明的一个方面中，将描述集成电路封装。 集成电路封装包括至少两个与基板连接的集成电路。 集成电路和基板至少部分地封装在模制材料中。 存在部分延伸穿过模制材料并且被布置成在集成电路之间形成热障碍物的凹槽或气隙。
-
公开(公告)号：US20160358843A1
公开(公告)日：2016-12-08
申请号：US14729672
申请日：2015-06-03
发明人： Xavier Arokiasamy , Chun Ching Liew
IPC分类号： H01L23/495 , H01L21/50 , H01L21/48
CPC分类号： H01L23/49513 , H01L21/4825 , H01L21/50 , H01L23/49524 , H01L23/49541 , H01L23/49562 , H01L24/05 , H01L24/06 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/72 , H01L24/84 , H01L2224/03849 , H01L2224/05014 , H01L2224/05554 , H01L2224/05647 , H01L2224/0603 , H01L2224/371 , H01L2224/37147 , H01L2224/4007 , H01L2224/40108 , H01L2224/40111 , H01L2224/40245 , H01L2224/45144 , H01L2224/45147 , H01L2224/48247 , H01L2224/72 , H01L2224/80815 , H01L2224/84011 , H01L2224/84801 , H01L2224/84815 , H01L2924/181 , H01L2924/00012 , H01L2924/00014
摘要： A semiconductor device includes a lead frame including a die paddle and a lead, a semiconductor chip, and a clip. The semiconductor chip has a first side and a second side opposite to the first side. The first side is attached to the die paddle and the second side includes a first bond pad and a second bond pad. The clip electrically couples the first bond pad to the lead. The clip contacts the first bond pad at a first edge portion of the first bond pad adjacent to the second bond pad and defines a first cavity between a central portion of the first bond pad and the clip. Solder is within the first cavity to electrically couple the clip to the first bond pad. The semiconductor device includes a first opening to the first cavity to route flux away from the second bond pad during reflow soldering.
摘要翻译： 半导体器件包括引线框架，引线框架包括管芯焊盘和引线，半导体芯片和夹子。 半导体芯片具有与第一侧相对的第一侧和第二侧。 第一侧附接到管芯焊盘，第二侧包括第一接合焊盘和第二接合焊盘。 夹子将第一接合焊盘电连接到引线。 夹子在与第二接合焊盘相邻的第一接合焊盘的第一边缘部分处接触第一接合焊盘，并且在第一接合焊盘的中心部分和夹子之间限定第一空腔。 焊料在第一腔内，以将夹子电耦合到第一接合焊盘。 半导体器件包括到第一腔的第一开口，以在回流焊接期间将通量从第二接合焊盘引出。
-
公开(公告)号：US09379097B2
公开(公告)日：2016-06-28
申请号：US14494253
申请日：2014-09-23
申请人： Apple Inc.
发明人： Chih-Ming Chung
IPC分类号： H01L21/00 , H01L25/00 , H01L21/56 , H01L21/78 , H01L25/065 , H01L23/00 , H01L23/498
CPC分类号： H01L25/0657 , H01L21/561 , H01L21/563 , H01L21/6835 , H01L21/78 , H01L23/49811 , H01L23/49838 , H01L23/5389 , H01L23/562 , H01L24/19 , H01L24/20 , H01L24/73 , H01L24/75 , H01L24/81 , H01L24/92 , H01L24/96 , H01L24/97 , H01L25/105 , H01L25/50 , H01L2221/68327 , H01L2224/04105 , H01L2224/12105 , H01L2224/16146 , H01L2224/32225 , H01L2224/40108 , H01L2224/41171 , H01L2224/48108 , H01L2224/49171 , H01L2224/49173 , H01L2224/73151 , H01L2224/73267 , H01L2224/751 , H01L2224/753 , H01L2224/7555 , H01L2224/75981 , H01L2224/81203 , H01L2224/8136 , H01L2225/06513 , H01L2225/06548 , H01L2225/06568 , H01L2225/06589 , H01L2225/1035 , H01L2225/1058 , H01L2225/1082 , H01L2225/1088 , H01L2225/1094 , H01L2924/10253 , H01L2924/14 , H01L2924/1431 , H01L2924/15172 , H01L2924/15311 , H01L2924/3511 , H01L2224/18 , H01L2224/26
摘要： Package on package structures and manners of formation are described. In an embodiment, an array of trenches is formed partially through a fan-out substrate. In an embodiment, a plurality of laterally separate locations thermal interface material is dispensed onto an array of embedded bottom die. In an embodiment a thermal compression tool including an array of cavities corresponding to an array of top packages is brought into contact with the array of top packages and underlying fan-out substrate during PoP joint formation. The fan-out substrate may be secured to a vacuum chuck during several processing operations.
摘要翻译： 描述包装结构和形成方式。 在一个实施例中，沟槽阵列部分地通过扇出基板形成。 在一个实施例中，多个横向分开的位置热界面材料被分配到嵌入式底模的阵列上。 在一个实施例中，包括对应于顶部封装阵列的空腔阵列的热压缩工具在PoP接头形成期间与顶部封装阵列和下面的扇出基板接触。 在几个处理操作期间，扇出基板可以固定到真空卡盘。
-
-
-
-
-
-
-
-
搜索结果
9 条记录 (耗时 0.009 秒)
