公开(公告)号：US11869794B2

公开(公告)日：2024-01-09

申请号：US17298984

申请日：2019-12-04

申请人： LAM RESEARCH CORPORATION

发明人： Siyuan Tian

IPC分类号： H01L21/40 ,  H01L21/683 ,  H01J37/32 ,  H01L23/00

CPC分类号： H01L21/6833 ,  H01J37/32715 ,  H01L24/40 ,  H01L24/48 ,  H01L2224/37147 ,  H01L2224/4005 ,  H01L2224/40225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48647 ,  H01L2224/49175

摘要： A substrate support for a plasma chamber includes a base plate arranged along a plane, a first layer of an electrically insulating material arranged on the base plate along the plane, a plurality of heating elements arranged in the first layer along the plane, and a plurality of diodes arranged in respective cavities in the first layer. The plurality of diodes are connected in series to the plurality of heating elements, respectively. Each of the plurality of diodes includes a die of a semiconductor material arranged in a respective one of the cavities. The semiconductor material has a first coefficient of thermal expansion. A first side of the die is arranged on the first layer along the plane. A first terminal of the die is connected to a first electrical contact on the first layer.

公开(公告)号：US20230352422A1

公开(公告)日：2023-11-02

申请号：US18137014

申请日：2023-04-20

申请人： Infineon Technologies Austria AG

发明人： Hwee Yin Low ,  Badrus Hisham Abdul Rani ,  Wee Aun Jason Lim ,  Ai Yun Loh ,  Muhamad Hairul Fauzi Wahid

IPC分类号： H01L23/544 ,  H01L23/498 ,  H01L23/367 ,  H01L23/31 ,  H01L23/495 ,  H01L23/00 ,  H01L21/56 ,  B23K26/0622 ,  B23K26/364

CPC分类号： H01L23/544 ,  H01L23/49861 ,  H01L23/3675 ,  H01L23/3121 ,  H01L23/49562 ,  H01L24/40 ,  H01L21/565 ,  B23K26/0622 ,  B23K26/364 ,  H01L2223/54406 ,  H01L2223/54433 ,  H01L23/49513 ,  H01L23/49524 ,  H01L2924/13091 ,  H01L2224/4005 ,  H01L2224/40245 ,  H01L24/32 ,  H01L2224/32245 ,  H01L24/73 ,  H01L2224/73263 ,  B23K2101/40

摘要： In an embodiment, a semiconductor package is provided that includes a first package surface and a second package surface opposing the first surface, a plastic molding and one or more semiconductor dies. The first package surface includes a first surface of the plastic molding and a first metallic area exposed from the plastic molding. The first metallic area includes a first product marking including at least one alphanumeric character and the first surface of the plastic molding includes a second product marking including at least one alphanumeric character.

公开(公告)号：US20170200705A1

公开(公告)日：2017-07-13

申请号：US14993971

申请日：2016-01-12

申请人： Alpha and Omega Semiconductor Incorporated

发明人： Xiaotian Zhang ,  Shekar Mallikarjunaswamy ,  Zhiqiang Niu ,  Cheow Khoon Oh ,  Yueh-Se Ho

IPC分类号： H01L25/07 ,  H01L23/00 ,  H01L23/498 ,  H02M3/158 ,  H01L29/78

CPC分类号： H01L25/072 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/17 ,  H01L24/37 ,  H01L24/40 ,  H01L24/73 ,  H01L25/16 ,  H01L29/7827 ,  H01L2224/16225 ,  H01L2224/376 ,  H01L2224/4005 ,  H01L2224/40137 ,  H01L2224/73255 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/14252 ,  H02M3/158 ,  H01L2224/37599

摘要： A power device including a low-side MOSFET, a high-side MOSFET and an integrated control IC chip is disclosed. The power device further includes a substrate comprising a first mounting area having a first group of welding discs and a second mounting area having a second group of welding discs; a first chip flipped and attached to the first mounting area; a second chip flipped and attached to the second mounting area; a metal clip; and a molding body covering a front surface of the substrate, the first chip, the second chip and the metal clip. Metal pads on a front side of the first chip is attached to the first group of welding discs. Metal pads on a front side of the second chip is attached to the second group of welding discs. The metal clip connects a connection pad to a back metal layer of the first chip.

公开(公告)号：US20150243638A1

公开(公告)日：2015-08-27

申请号：US14474057

申请日：2014-08-29

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Nobutaka MATSUOKA

IPC分类号： H01L25/07 ,  H01L23/48 ,  H01L21/768 ,  H01L23/04 ,  H01L23/538 ,  H01L25/00 ,  H01L23/31 ,  H01L23/29

CPC分类号： H01L25/50 ,  H01L23/053 ,  H01L23/3735 ,  H01L23/49811 ,  H01L24/29 ,  H01L24/32 ,  H01L24/40 ,  H01L24/48 ,  H01L24/49 ,  H01L25/112 ,  H01L25/117 ,  H01L2224/0603 ,  H01L2224/291 ,  H01L2224/32227 ,  H01L2224/32245 ,  H01L2224/3701 ,  H01L2224/37013 ,  H01L2224/4005 ,  H01L2224/40095 ,  H01L2224/40137 ,  H01L2224/40139 ,  H01L2224/40227 ,  H01L2224/40499 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/49175 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/19107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/014

摘要： According to one embodiment, a semiconductor device includes a semiconductor chip, a package that surrounds the semiconductor chip, a first electrode terminal of which an upper end portion is aligned with and exposed at an upper surface of the package or protrudes from the upper surface of the package on an upper side of the package, and of which a lower end portion is aligned with and exposed at a lower surface of the package, or protrudes from the lower surface of the package on a lower side of the package, and a second electrode terminal of which an upper end portion is aligned with and exposed at the upper surface of the package, or protrudes from the upper surface of the package on the upper side of the package, and of which a lower end portion is aligned with and exposed at the lower surface of the package or protrudes from the lower surface of the package on the lower side of the package.

摘要翻译： 根据一个实施例，半导体器件包括半导体芯片，围绕半导体芯片的封装，第一电极端子，其上端部分与封装的上表面对齐并暴露在封装的上表面，或者从 所述包装在所述包装的上侧，并且其下端部与所述包装的下表面对准并且暴露在所述包装的下表面处，或者在所述包装的下侧从包装的下表面突出，并且第二 电极端部，其上端部与封装的上表面对准并露出，或者在封装的上侧从封装的上表面突出，并且其下端部对准并暴露 在包装的下表面处或者在包装的下侧从包装的下表面突出。

公开(公告)号：US09837386B2

公开(公告)日：2017-12-05

申请号：US14993971

申请日：2016-01-12

申请人： Alpha and Omega Semiconductor Incorporated

发明人： Xiaotian Zhang ,  Shekar Mallikarjunaswamy ,  Zhiqiang Niu ,  Cheow Khoon Oh ,  Yueh-Se Ho

IPC分类号： H01L25/07 ,  H01L23/49 ,  H02M3/158 ,  H01L29/78 ,  H01L23/498 ,  H01L23/00

CPC分类号： H01L25/072 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/17 ,  H01L24/37 ,  H01L24/40 ,  H01L24/73 ,  H01L25/16 ,  H01L29/7827 ,  H01L2224/16225 ,  H01L2224/376 ,  H01L2224/4005 ,  H01L2224/40137 ,  H01L2224/73255 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/14252 ,  H02M3/158 ,  H01L2224/37599

摘要： A power conversion device including a low-side MOSFET, a high-side MOSFET and an integrated control IC chip is disclosed. The power conversion device further includes a substrate comprising a first mounting area having a first group of welding discs and a second mounting area having a second group of welding discs; a first chip flipped and attached to the first mounting area; a second chip flipped and attached to the second mounting area; a metal clip; and a molding body covering a front surface of the substrate, the first chip, the second chip and the metal clip. Metal pads on a front side of the first chip is attached to the first group of welding discs. Metal pads on a front side of the second chip is attached to the second group of welding discs. The metal clip connects a connection pad to a back metal layer of the first chip.

公开(公告)号：US20170117209A1

公开(公告)日：2017-04-27

申请号：US15129250

申请日：2015-03-26

申请人： HERAEUS DEUTSCHLAND GMBH & CO. KG

发明人： Michael BENEDIKT ,  Thomas KREBS ,  Michael SCHÄFER ,  Wolfgang SCHMITT ,  Andreas HINRICH ,  Andreas KLEIN ,  Alexander BRAND ,  Martin BLEIFUSS

IPC分类号： H01L23/495 ,  H01L23/00 ,  H01L21/48

CPC分类号： H01L23/49513 ,  H01L21/4821 ,  H01L23/49524 ,  H01L23/49548 ,  H01L23/49551 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/37 ,  H01L24/40 ,  H01L24/83 ,  H01L24/84 ,  H01L24/92 ,  H01L2224/27318 ,  H01L2224/2732 ,  H01L2224/27418 ,  H01L2224/27505 ,  H01L2224/27848 ,  H01L2224/29294 ,  H01L2224/29295 ,  H01L2224/29339 ,  H01L2224/2939 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/352 ,  H01L2224/371 ,  H01L2224/37639 ,  H01L2224/4005 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/40499 ,  H01L2224/73263 ,  H01L2224/83192 ,  H01L2224/83439 ,  H01L2224/8384 ,  H01L2224/8385 ,  H01L2224/8484 ,  H01L2224/8485 ,  H01L2224/9221 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2224/83 ,  H01L2224/84 ,  H01L2924/00012

摘要： A carrier and the clip are used to produce a packaging having a lead frame by connection to the chip using sintering of the solidified sintering pastes in one work step. The carrier may be a lead frame and a clip for at least one semiconductor element has at least one functional surface for connecting to the semiconductor element and a plurality of connections. The material of the carrier or of the clip includes a metal and a layer made of a solidified sintering paste. The sintering paste may contain silver and/or a silver compound. The sintering paste is arranged on the functional surface. The carrier or clip and the layer made of sintering paste form an intermediate product that can be connected to the semiconductor element.

公开(公告)号：US08716830B2

公开(公告)日：2014-05-06

申请号：US13304167

申请日：2011-11-23

申请人： Anindya Poddar ,  Luu T. Nguyen

发明人： Anindya Poddar ,  Luu T. Nguyen

IPC分类号： H01L21/70

CPC分类号： H01L23/3121 ,  H01L21/561 ,  H01L23/3735 ,  H01L23/4334 ,  H01L23/49575 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/81 ,  H01L24/83 ,  H01L24/84 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32227 ,  H01L2224/32245 ,  H01L2224/371 ,  H01L2224/4005 ,  H01L2224/40106 ,  H01L2224/40108 ,  H01L2224/40225 ,  H01L2224/40245 ,  H01L2224/40479 ,  H01L2224/48091 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/8485 ,  H01L2224/92225 ,  H01L2224/92226 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： In one aspect of the present invention, an integrated circuit package will be described. The integrated circuit package includes at least two integrated circuits that are attached with a substrate. The integrated circuits and the substrates are at least partially encapsulated in a molding material. There is a groove or air gap that extends partially through the molding material and that is arranged to form a thermal barrier between the integrated circuits.

摘要翻译： 在本发明的一个方面中，将描述集成电路封装。 集成电路封装包括至少两个与基板连接的集成电路。 集成电路和基板至少部分地封装在模制材料中。 存在部分延伸穿过模制材料并且被布置成在集成电路之间形成热障碍物的凹槽或气隙。

公开(公告)号：US20130161801A1

公开(公告)日：2013-06-27

申请号：US13336248

申请日：2011-12-23

申请人： Ralf Otremba ,  Roland Rupp ,  Daniel Domes

发明人： Ralf Otremba ,  Roland Rupp ,  Daniel Domes

IPC分类号： H01L23/495 ,  H05K7/04 ,  H01L21/56

CPC分类号： H01L23/48 ,  H01L23/24 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/3735 ,  H01L23/49524 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/84 ,  H01L24/85 ,  H01L24/92 ,  H01L2224/04026 ,  H01L2224/04034 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05671 ,  H01L2224/0603 ,  H01L2224/06181 ,  H01L2224/29111 ,  H01L2224/29139 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/37155 ,  H01L2224/3716 ,  H01L2224/37639 ,  H01L2224/37647 ,  H01L2224/37655 ,  H01L2224/3766 ,  H01L2224/4005 ,  H01L2224/40095 ,  H01L2224/40137 ,  H01L2224/40227 ,  H01L2224/40247 ,  H01L2224/4103 ,  H01L2224/41051 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48463 ,  H01L2224/48464 ,  H01L2224/4847 ,  H01L2224/48724 ,  H01L2224/48739 ,  H01L2224/48744 ,  H01L2224/48747 ,  H01L2224/48755 ,  H01L2224/48764 ,  H01L2224/48766 ,  H01L2224/48769 ,  H01L2224/48771 ,  H01L2224/73221 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83801 ,  H01L2224/8381 ,  H01L2224/8382 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2224/84801 ,  H01L2224/8482 ,  H01L2224/8485 ,  H01L2224/85447 ,  H01L2224/92247 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10271 ,  H01L2924/10272 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/141 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1461 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/0105 ,  H01L2924/01049 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01015 ,  H01L2924/20759

摘要： A module includes a DCB substrate and a discrete device mounted on the DCB substrate, wherein the discrete device comprises a leadframe, a semiconductor chip mounted on the leadframe and an encapsulation material covering the semiconductor chip.

摘要翻译： 模块包括DCB衬底和安装在DCB衬底上的分立器件，其中分立器件包括引线框，安装在引线框上的半导体芯片和覆盖半导体芯片的封装材料。

公开(公告)号：US20240250057A1

公开(公告)日：2024-07-25

申请号：US18384389

申请日：2023-10-27

申请人： JMJ Korea Co., Ltd.

发明人： Yun Hwa CHOI

IPC分类号： H01L23/00 ,  H01L23/14 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H01L25/065

CPC分类号： H01L24/40 ,  H01L23/14 ,  H01L23/3107 ,  H01L23/3672 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/41 ,  H01L25/0655 ,  H01L2224/4005 ,  H01L2224/40225 ,  H01L2224/41051 ,  H01L2924/10251 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/181

摘要： Provided is a semiconductor package and a method of manufacturing the same, and more particularly, to a semiconductor package and a method of manufacturing the same in which stress applied while molding is efficiently dispersed by a three-dimensional clip structure so that structural reliability may be improved.

公开(公告)号：US20240120309A1

公开(公告)日：2024-04-11

申请号：US18476417

申请日：2023-09-28

申请人： Infineon Technologies AG

发明人： Oliver Kreiter ,  Patrik Holt Jones

IPC分类号： H01L23/00 ,  H01L23/495 ,  H01L25/07

CPC分类号： H01L24/40 ,  H01L23/49562 ,  H01L24/48 ,  H01L25/072 ,  H01L2224/4005 ,  H01L2224/40137 ,  H01L2224/40157 ,  H01L2224/48137 ,  H01L2924/1815

摘要： A power electronic device includes: a carrier having at least two die mounting areas; a power semiconductor die(s) mounted on the carrier at a first mounting area and having a first side facing the carrier and an opposite second side, a second die mounting area being free of any semiconductor die; and a contact clip arranged over the die and second die mounting area. The contact clip is at least partially arranged in a first plane, with a first part over the die being bent downwards such it is arranged in a second plane below the first plane and coupled to the second side of the die. A second part of the contact clip over the second die mounting area is bent upwards such that the second part is arranged in a third plane above the first plane, or is free of any bend and arranged in the first plane.