公开(公告)号：US11978642B2

公开(公告)日：2024-05-07

申请号：US17486057

申请日：2021-09-27

申请人： NALUX CO., LTD.

发明人： Kenji Tanibe ,  Kazuya Yamamoto

IPC分类号： H01L21/3213 ,  B29C33/42 ,  B29C59/14 ,  G02B1/04 ,  G02B1/11 ,  G02B1/118 ,  G02B1/12 ,  H01J37/32 ,  H01L21/3065

CPC分类号： H01L21/32138 ,  B29C33/424 ,  B29C59/14 ,  G02B1/04 ,  G02B1/11 ,  G02B1/118 ,  G02B1/12 ,  H01J37/32394 ,  H01L21/3065 ,  B29K2995/0072 ,  B29K2995/0093

摘要： A method for producing a plastic element provided with fine surface roughness is provided. In the method, etching of a surface of the plastic element is performed separately in a first step and in a second step, in the first step, fine roughness having a predetermined average value of pitch in the range from 0.05 to 1 micrometer is generated on the surface through reactive ion etching in an atmosphere of a first gas; and in the second step, an average value of depth of the fine roughness generated in the first step is adjusted to a predetermined value in the range from 0.15 to 1.5 micrometers while the predetermined average value of pitch is substantially maintained through reactive ion etching in an atmosphere of a second gas, reactivity to the plastic element of the second gas being lower than reactivity to the plastic element of the first gas.

公开(公告)号：US20230420267A1

公开(公告)日：2023-12-28

申请号：US17826236

申请日：2022-05-27

申请人： Tokyo Electron Limited

发明人： Stephanie Oyola-Reynoso ,  Ivo Otto, IV ,  Qi Wang ,  Aelan Mosden

IPC分类号： H01L21/3213

CPC分类号： H01L21/32138 ,  H01L21/76885 ,  H01L21/32139

摘要： A method of processing a substrate that includes: forming an etch mask over a ruthenium (Ru) metal layer of a substrate, the etch mask exposing a first portion of the Ru metal layer and covering a second portion of the Ru metal layer; and converting the first portion of the Ru metal layer into a volatile Ru etch product in a processing chamber, the converting including exposing the Ru metal layer of the substrate to a halogen-containing vapor, and to a ligand-exchange agent to form the volatile Ru etch product, where the converting is an oxygen-free process.

公开(公告)号：US20190019690A1

公开(公告)日：2019-01-17

申请号：US15651607

申请日：2017-07-17

申请人： Applied Materials, Inc.

发明人： Tom Choi ,  Mandar B. Pandit ,  Mang-Mang Ling ,  Nitin K. Ingle

IPC分类号： H01L21/3213 ,  H01L29/66 ,  H01L21/3205

CPC分类号： H01L21/32137 ,  H01L21/3065 ,  H01L21/32055 ,  H01L21/32138 ,  H01L29/66545 ,  H01L29/66795

摘要： Processing methods may be performed to limit damage of features of a substrate, such as missing fin damage. The methods may include forming a plasma of an inert precursor within a processing region of a processing chamber. Effluents of the plasma of the inert precursor may be utilized to passivate an exposed region of an oxygen-containing material that extends about a feature formed on a semiconductor substrate. A plasma of a hydrogen-containing precursor may also be formed within the processing region. Effluents of the plasma of the hydrogen-containing precursor may be directed, with DC bias, towards an exposed silicon-containing material on the semiconductor substrate. The methods may also include anisotropically etching the exposed silicon-containing material with the plasma effluents of the hydrogen-containing precursor, where the plasma effluents of the hydrogen-containing precursor selectively etch silicon relative to silicon oxide.

公开(公告)号：US20180247832A1

公开(公告)日：2018-08-30

申请号：US15615691

申请日：2017-06-06

申请人： Lam Research Corporation

发明人： Andreas Fischer ,  Thorsten Lill ,  Richard Janek

IPC分类号： H01L21/3213 ,  H01L21/225 ,  H01L21/326 ,  H01L21/02 ,  H01L21/311

CPC分类号： H01L21/32136 ,  H01L21/0206 ,  H01L21/02068 ,  H01L21/225 ,  H01L21/31122 ,  H01L21/32138 ,  H01L21/326 ,  H01L21/67

摘要： A method for performing atomic layer etching (ALE) on a substrate is provided, including the following operations: performing a surface modification operation on a substrate surface, the surface modification operation configured to convert at least one monolayer of the substrate surface to a modified layer, wherein a bias voltage is applied during the surface modification operation, the bias voltage configured to control a depth of the substrate surface that is converted by the surface modification operation; performing a removal operation on the substrate surface, the removal operation configured to remove at least a portion of the modified layer from the substrate surface, wherein removing the portion of the modified layer is effected via a ligand exchange reaction that is configured to volatilize the portion of the modified layer. A plasma treatment can be performed to remove residues from the substrate surface following the removal operation.

公开(公告)号：US09899234B2

公开(公告)日：2018-02-20

申请号：US14320245

申请日：2014-06-30

申请人： Lam Research Corporation

发明人： Hui-Jung Wu ,  Thomas Joseph Knisley ,  Nagraj Shankar ,  Meihua Shen ,  John Hoang ,  Prithu Sharma

IPC分类号： H01L21/768 ,  H01L21/3213 ,  H01J37/32 ,  H01L23/532 ,  C23C16/02 ,  C23C16/04 ,  C23C16/16 ,  C23C16/54 ,  H01L21/02

CPC分类号： H01L21/32136 ,  C23C16/0245 ,  C23C16/0272 ,  C23C16/045 ,  C23C16/16 ,  C23C16/54 ,  H01J37/32357 ,  H01J2237/332 ,  H01J2237/334 ,  H01L21/02126 ,  H01L21/02274 ,  H01L21/32138 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/76852 ,  H01L21/76885 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods and techniques for fabricating metal interconnects, lines, or vias by subtractive etching and liner deposition methods are provided. Methods involve depositing a blanket copper layer, removing regions of the blanket copper layer to form a pattern, treating the patterned metal, depositing a copper-dielectric interface material such that the copper-dielectric interface material adheres only to the patterned copper, depositing a dielectric barrier layer on the substrate, and depositing a dielectric bulk layer on the substrate.

公开(公告)号：US09659791B2

公开(公告)日：2017-05-23

申请号：US14801542

申请日：2015-07-16

申请人： Applied Materials, Inc.

发明人： Xikun Wang ,  David Cui ,  Anchuan Wang ,  Nitin K. Ingle

IPC分类号： H01L21/302 ,  H01L21/461 ,  B44C1/22 ,  C03C15/00 ,  C03C25/68 ,  C23F1/00 ,  C23F3/00 ,  H01L21/3213 ,  H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  H01L21/3065

CPC分类号： H01L21/32138 ,  H01J37/32449 ,  H01L21/02071 ,  H01L21/3065 ,  H01L21/31122 ,  H01L21/32135 ,  H01L21/32136 ,  H01L21/7684

摘要： Methods are described for etching metal layers that are difficult to volatize, such as cobalt, nickel, and platinum to form an etched metal layer with reduced surface roughness. The methods include pretreating the metal layer with a local plasma formed from a hydrogen-containing precursor. The pretreated metal layer is then reacted with a halogen-containing precursor to form a halogenated metal layer having a halogenated etch product. A carbon-and-nitrogen-containing precursor reacts with the halogenated etch product to form a volatile etch product that can be removed in the gas phase from the etched surface of the metal layer. The surface roughness may be reduced by performing one or more plasma treatments on the etching metal layer after a plurality of etching sequences. Surface roughness is also reduced by controlling the temperature and length of time the metal layer is reacting with the etchant precursors.

公开(公告)号：US09589787B2

公开(公告)日：2017-03-07

申请号：US14593028

申请日：2015-01-09

申请人： Renesas Electronics Corporation

发明人： Toru Shinaki ,  Takehiko Saito ,  Yoshinori Kondo ,  Masatoshi Fukushima

IPC分类号： H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  H01L21/3213

CPC分类号： H01L21/02071 ,  H01L21/31138 ,  H01L21/32138 ,  H01L21/32139

摘要： The present invention makes it possible to increase the reliability of a semiconductor device. A manufacturing method of a semiconductor device according to the present invention includes a step of removing a patterned resist film and the step of removing a patterned resist film includes the steps of: (A) introducing at least a gas containing oxygen into a processing room; (B) starting electric discharge for transforming the gas containing oxygen into plasma; and (C) introducing a water vapor or an alcohol vapor into the processing room. On this occasion, the step (C) is applied either simultaneously with or after the step (B).

摘要翻译： 本发明使得可以提高半导体器件的可靠性。 根据本发明的半导体器件的制造方法包括除去图案化的抗蚀剂膜的步骤，除去图案化的抗蚀剂膜的步骤包括以下步骤：（A）至少将含氧的气体引入加工室; （B）开始放电，将含氧气体转化为等离子体; 和（C）将水蒸气或醇蒸气引入加工室。 在这种情况下，步骤（C）同时或在步骤（B）之后施加。

公开(公告)号：US09419072B2

公开(公告)日：2016-08-16

申请号：US13915284

申请日：2013-06-11

申请人： Samsung Electronics Co., Ltd.

发明人： Chongkwang Chang ,  Youngjoon Moon ,  Duck-nam Kim ,  Yeong-Jong Jeong

IPC分类号： H01L21/336 ,  H01L29/04 ,  H01L21/28 ,  H01L21/3213 ,  H01L21/8238 ,  H01L29/49

CPC分类号： H01L29/04 ,  H01L21/28247 ,  H01L21/32137 ,  H01L21/32138 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/4232 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517

摘要： A semiconductor device and a method of fabricating the same include a semiconductor substrate, a high-k dielectric pattern and a metal-containing pattern sequentially being stacked on the semiconductor substrate, a gate pattern including poly semiconductor and disposed on the metal-containing pattern, and a protective layer disposed on the gate pattern, wherein the protective layer includes oxide, nitride and/or oxynitride of the poly semiconductor.

公开(公告)号：US20160204068A1

公开(公告)日：2016-07-14

申请号：US14967815

申请日：2015-12-14

申请人： CANON KABUSHIKI KAISHA

发明人： Koji Hara ,  Nobutaka Ukigaya ,  Takeshi Aoki ,  Yasuhiro Kawabata ,  Junya Tamaki ,  Norihiko Nakata ,  Satoshi Ogawa

IPC分类号： H01L23/532 ,  H01L21/3213 ,  H01L23/528 ,  H01L21/027 ,  H01L21/768 ,  H01L21/033 ,  H01L21/02

CPC分类号： H01L23/53223 ,  H01L21/02068 ,  H01L21/0276 ,  H01L21/0332 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32134 ,  H01L21/32135 ,  H01L21/32136 ,  H01L21/32138 ,  H01L21/32139 ,  H01L21/76834 ,  H01L21/76865 ,  H01L21/76885 ,  H01L21/76892 ,  H01L23/528 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method includes forming a multilayered film including a conductive layer mainly containing aluminum, and a barrier metal layer formed thereon, forming a hard mask layer on the barrier metal layer, patterning a resist on the hard mask layer, patterning the hard mask layer by dry-etching the hard mask layer with the patterned resist as a mask, cleaning a surface of the barrier metal layer with a cleaning solution after the patterning the hard mask layer, and dry-etching the multilayered film with the patterned hard mask layer as a mask after the cleaning the surface of the barrier metal layer. In the patterning the hard mask layer, dry etching is performed with a ratio of a flow rate of an oxidizing gas to a total flow rate of a process gas at less than 1% in a state in which the barrier metal layer is exposed to the process gas.

摘要翻译： 一种方法包括形成包括主要包含铝的导电层和形成在其上的阻挡金属层的多层膜，在阻挡金属层上形成硬掩模层，在硬掩模层上图案化抗蚀剂，将硬掩模层图案化干 用图案化的抗蚀剂作为掩模蚀刻硬掩模层，在图案化硬掩模层之后用清洁溶液清洁阻挡金属层的表面，并用图案化的硬掩模层作为掩模干蚀刻多层膜 清洗后的屏障金属层的表面。 在图案化硬掩模层时，在阻挡金属层暴露于该掩模层的状态下，以氧化气体的流量与处理气体的总流量的比率小于1％进行干法蚀刻 工艺气体。

公开(公告)号：US20160056259A1

公开(公告)日：2016-02-25

申请号：US14933537

申请日：2015-11-05

申请人： Samsung Electronics Co., Ltd.

发明人： Chongkwang Chang ,  Youngjoon Moon ,  Duck-nam Kim ,  Yeong-Jong Jeong

IPC分类号： H01L29/51 ,  H01L29/423

CPC分类号： H01L29/04 ,  H01L21/28247 ,  H01L21/32137 ,  H01L21/32138 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/4232 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517

摘要： A semiconductor device and a method of fabricating the same include a semiconductor substrate, a high-k dielectric pattern and a metal-containing pattern sequentially being stacked on the semiconductor substrate, a gate pattern including poly semiconductor and disposed on the metal-containing pattern, and a protective layer disposed on the gate pattern, wherein the protective layer includes oxide, nitride and/or oxynitride of the poly semiconductor.