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公开(公告)号：US09419072B2
公开(公告)日：2016-08-16
申请号：US13915284
申请日：2013-06-11
IPC分类号： H01L21/336 , H01L29/04 , H01L21/28 , H01L21/3213 , H01L21/8238 , H01L29/49
CPC分类号： H01L29/04 , H01L21/28247 , H01L21/32137 , H01L21/32138 , H01L21/823842 , H01L21/823857 , H01L29/4232 , H01L29/4966 , H01L29/513 , H01L29/517
摘要： A semiconductor device and a method of fabricating the same include a semiconductor substrate, a high-k dielectric pattern and a metal-containing pattern sequentially being stacked on the semiconductor substrate, a gate pattern including poly semiconductor and disposed on the metal-containing pattern, and a protective layer disposed on the gate pattern, wherein the protective layer includes oxide, nitride and/or oxynitride of the poly semiconductor.
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公开(公告)号：US20160056259A1
公开(公告)日：2016-02-25
申请号：US14933537
申请日：2015-11-05
IPC分类号： H01L29/51 , H01L29/423
CPC分类号： H01L29/04 , H01L21/28247 , H01L21/32137 , H01L21/32138 , H01L21/823842 , H01L21/823857 , H01L29/4232 , H01L29/4966 , H01L29/513 , H01L29/517
摘要： A semiconductor device and a method of fabricating the same include a semiconductor substrate, a high-k dielectric pattern and a metal-containing pattern sequentially being stacked on the semiconductor substrate, a gate pattern including poly semiconductor and disposed on the metal-containing pattern, and a protective layer disposed on the gate pattern, wherein the protective layer includes oxide, nitride and/or oxynitride of the poly semiconductor.
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公开(公告)号：US20230064084A1
公开(公告)日：2023-03-02
申请号：US17866805
申请日：2022-07-18
发明人： MINHWAN JEON , Chanho Park , Kyung Rae Byun , Chang Kyu Lee , Chongkwang Chang
IPC分类号： H01L27/146
摘要： An image sensor including: a semiconductor substrate including a plurality of pixel regions; an anti-reflection layer on the semiconductor substrate; color filters provided on the anti-reflection layer and in the pixel regions; and a fence structure disposed between adjacent ones of the color filters, wherein the fence structure includes: a lower portion penetrating the anti-reflection layer; an upper portion on the anti-reflection layer; and an intermediate portion between the lower portion and the upper portion, wherein the fence structure has undercut regions, which are provided at both sides of the intermediate portion and are between the upper portion of the fence structure and a top surface of the anti-reflection layer.
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公开(公告)号：US20130270569A1
公开(公告)日：2013-10-17
申请号：US13915284
申请日：2013-06-11
IPC分类号： H01L29/04
CPC分类号： H01L29/04 , H01L21/28247 , H01L21/32137 , H01L21/32138 , H01L21/823842 , H01L21/823857 , H01L29/4232 , H01L29/4966 , H01L29/513 , H01L29/517
摘要： A semiconductor device and a method of fabricating the same include a semiconductor substrate, a high-k dielectric pattern and a metal-containing pattern sequentially being stacked on the semiconductor substrate, a gate pattern including poly semiconductor and disposed on the metal-containing pattern, and a protective layer disposed on the gate pattern, wherein the protective layer includes oxide, nitride and/or oxynitride of the poly semiconductor.
摘要翻译： 半导体器件及其制造方法包括依次堆叠在半导体衬底上的半导体衬底，高k电介质图案和含金属图案，包括多晶半导体并设置在含金属图案上的栅极图案， 以及设置在所述栅极图案上的保护层，其中所述保护层包括所述多晶半导体的氧化物，氮化物和/或氧氮化物。
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5.发明申请METHOD OF CONTROLLING AN ETCHING PROCESS FOR FORMING FINE PATTERNS OF A SEMICONDUCTOR DEVICE 有权控制形成半导体器件精细图案的蚀刻工艺的方法公开(公告)号：US20160099185A1
公开(公告)日：2016-04-07
申请号：US14854528
申请日：2015-09-15
发明人： Chongkwang Chang , Sungwoo Kang , Chunghowan Kim , Youngmook Oh , Seobum Lee , Gahyun Lim
IPC分类号： H01L21/66 , H01L21/308
CPC分类号： H01L22/20 , H01L21/3085 , H01L22/12 , H01L27/1104
摘要： A method of controlling an etching process for forming fine patterns of a semiconductor device includes forming a lower pattern having a plurality of openings on a substrate, obtaining a width value of the lower pattern, and controlling a process recipe of an etching process for forming the lower pattern by using the width value.
摘要翻译： 一种控制用于形成半导体器件精细图案的蚀刻工艺的方法包括在衬底上形成具有多个开口的下部图案，获得下部图案的宽度值，以及控制用于形成 使用宽度值降低图案。
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公开(公告)号：US09608054B2
公开(公告)日：2017-03-28
申请号：US14933537
申请日：2015-11-05
IPC分类号： H01L29/04 , H01L21/28 , H01L21/3213 , H01L21/8238 , H01L29/423 , H01L29/51 , H01L29/49
CPC分类号： H01L29/04 , H01L21/28247 , H01L21/32137 , H01L21/32138 , H01L21/823842 , H01L21/823857 , H01L29/4232 , H01L29/4966 , H01L29/513 , H01L29/517
摘要： A semiconductor device and a method of fabricating the same include a semiconductor substrate, a high-k dielectric pattern and a metal-containing pattern sequentially being stacked on the semiconductor substrate, a gate pattern including poly semiconductor and disposed on the metal-containing pattern, and a protective layer disposed on the gate pattern, wherein the protective layer includes oxide, nitride and/or oxynitride of the poly semiconductor.
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7.发明授权Method of controlling an etching process for forming fine patterns of a semiconductor device 有权控制用于形成半导体器件精细图案的蚀刻工艺的方法公开(公告)号：US09397013B2
公开(公告)日：2016-07-19
申请号：US14854528
申请日：2015-09-15
发明人： Chongkwang Chang , Sungwoo Kang , Chunghowan Kim , Youngmook Oh , Seobum Lee , Gahyun Lim
IPC分类号： H01L21/00 , H01L21/66 , H01L21/308
CPC分类号： H01L22/20 , H01L21/3085 , H01L22/12 , H01L27/1104
摘要： A method of controlling an etching process for forming fine patterns of a semiconductor device includes forming a lower pattern having a plurality of openings on a substrate, obtaining a width value of the lower pattern, and controlling a process recipe of an etching process for forming the lower pattern by using the width value.
摘要翻译： 一种控制用于形成半导体器件精细图案的蚀刻工艺的方法包括在衬底上形成具有多个开口的下部图案，获得下部图案的宽度值，以及控制用于形成 使用宽度值降低图案。
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