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    SEMICONDUCTOR DEVICES
    1.
    发明公开
    SEMICONDUCTOR DEVICES 审中-公开

    公开(公告)号：US20230352547A1

    公开(公告)日：2023-11-02

    申请号：US18107793

    申请日：2023-02-09

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hongsik Shin ,  Sungwoo Kang ,  Dongkwon Kim ,  Hyonwook Ra ,  Jeongyeon Seo ,  Kyungyub Jeon

    IPC: H01L29/06 ,  H01L29/417 ,  H01L27/088 ,  H01L29/775 ,  H01L29/423

    CPC classification number: H01L29/41775 ,  H01L27/088 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/775

    Abstract: A semiconductor device includes first and second gate structures, first and second contact plug structures and a first wiring on a substrate. The first and second source/drain layers are formed on portions of the substrate adjacent to the first and second gate structures, respectively. The first and second contact plug structures are formed on the first and second source/drain layers, respectively. The first wiring contacts an upper surface of the first gate structure. The first gate structure includes a first gate electrode and a first gate insulation pattern on a lower surface and a sidewall of the first gate electrode. The second gate structure includes a second gate electrode and a second gate insulation pattern on a lower surface and a sidewall of the second gate electrode. The upper surface of the second gate electrode is lower than an upper surface of the first gate electrode.

    Integrated circuit devices and methods of manufacturing the same
    2.
    发明授权
    Integrated circuit devices and methods of manufacturing the same 有权

    公开(公告)号：US11552176B2

    公开(公告)日：2023-01-10

    申请号：US17329361

    申请日：2021-05-25

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sanghyun Lee ,  Sungwoo Kang ,  Jongchul Park ,  Youngmook Oh ,  Jeongyun Lee

    IPC: H01L29/41 ,  H01L29/417 ,  H01L29/78 ,  H01L29/08 ,  H01L29/66 ,  H01L21/285 ,  H01L29/45

    Abstract: An integrated circuit device includes a fin-type active area that extends on a substrate in a first direction, a gate structure that extends on the substrate in a second direction and crosses the fin-type active area, source/drain areas arranged on first and second sides of the gate structure, and a contact structure electrically connected to the source/drain areas. The source/drain areas comprise a plurality of merged source/drain structures. Each source/drain area comprises a plurality of first points respectively located on an upper surface of the source/drain area at a center of each source/drain structure, and each source/drain area comprises at least one second point respectively located on the upper surface of the source/drain area where side surfaces of adjacent source/drain structures merge with one another. A bottom surface of the contact structure is non-uniform and corresponds to the first and second points.

    INTEGRATED CIRCUIT DEVICES AND METHODS OF MANUFACTURING THE SAME
    4.
    发明申请
    INTEGRATED CIRCUIT DEVICES AND METHODS OF MANUFACTURING THE SAME 有权

    公开(公告)号：US20230128547A1

    公开(公告)日：2023-04-27

    申请号：US18087854

    申请日：2022-12-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sanghyun Lee ,  Sungwoo Kang ,  Jongchul Park ,  Youngmook Oh ,  Jeongyun Lee

    IPC: H01L29/417 ,  H01L29/78 ,  H01L29/08 ,  H01L29/66 ,  H01L21/285 ,  H01L29/45

    Abstract: An integrated circuit device includes a fin-type active area that extends on a substrate in a first direction, a gate structure that extends on the substrate in a second direction and crosses the fin-type active area, source/drain areas arranged on first and second sides of the gate structure, and a contact structure electrically connected to the source/drain areas. The source/drain areas comprise a plurality of merged source/drain structures. Each source/drain area comprises a plurality of first points respectively located on an upper surface of the source/drain area at a center of each source/drain structure, and each source/drain area comprises at least one second point respectively located on the upper surface of the source/drain area where side surfaces of adjacent source/drain structures merge with one another. A bottom surface of the contact structure is non-uniform and corresponds to the first and second points.

    SEMICONDUCTOR DEVICE INCLUDING SELF-ALIGNED CONTACT AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
    5.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING SELF-ALIGNED CONTACT AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20230097668A1

    公开(公告)日：2023-03-30

    申请号：US18050219

    申请日：2022-10-27

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sanghyun Lee ,  Sungwoo Kang ,  Jongchul Park ,  Youngmook Oh ,  Jeongyun Lee

    IPC: H01L27/088 ,  H01L29/417 ,  H01L21/768

    Abstract: A semiconductor device according to some embodiments of the disclosure may include a fin type active pattern extending in a first direction, a plurality of gate structures on the fin type active pattern and extending in a second direction different from the first direction, a plurality of inter-contact insulation patterns on respective ones of the plurality of gate structures, a plurality of interlayer insulation layers on side surfaces of the plurality of gate structures, and a plurality of contact plugs respectively between pairs of the plurality of gate structures. The fin type active pattern may include a plurality of source/drains. Lower ends of the plurality of contact plugs may contact the plurality of source/drains. The plurality of gate structures may each include a first gate metal, a second gate metal, a gate capping layer, a gate insulation layer, a first spacer, and a second spacer.

    Semiconductor device including self-aligned contact and method of manufacturing the semiconductor device
    6.
    发明授权
    Semiconductor device including self-aligned contact and method of manufacturing the semiconductor device 有权

    公开(公告)号：US11488952B2

    公开(公告)日：2022-11-01

    申请号：US16888209

    申请日：2020-05-29

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sanghyun Lee ,  Sungwoo Kang ,  Jongchul Park ,  Youngmook Oh ,  Jeongyun Lee

    IPC: H01L21/768 ,  H01L29/06 ,  H01L27/088 ,  H01L29/417

    Abstract: A semiconductor device according to some embodiments of the disclosure may include a fin type active pattern extending in a first direction, a plurality of gate structures on the fin type active pattern and extending in a second direction different from the first direction, a plurality of inter-contact insulation patterns on respective ones of the plurality of gate structures, a plurality of interlayer insulation layers on side surfaces of the plurality of gate structures, and a plurality of contact plugs respectively between pairs of the plurality of gate structures. The fin type active pattern may include a plurality of source/drains. Lower ends of the plurality of contact plugs may contact the plurality of source/drains. The plurality of gate structures may each include a first gate metal, a second gate metal, a gate capping layer, a gate insulation layer, a first spacer, and a second spacer.

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