公开(公告)号：US12074201B2

公开(公告)日：2024-08-27

申请号：US17588558

申请日：2022-01-31

申请人： ROHM CO., LTD.

发明人： Takuji Maekawa ,  Mitsuru Morimoto

IPC分类号： H01L21/02 ,  H01L29/04 ,  H01L29/16 ,  H01L29/739 ,  H01L29/78 ,  H01L29/872

CPC分类号： H01L29/1608 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02516 ,  H01L21/02529 ,  H01L21/02595 ,  H01L29/045 ,  H01L29/7395 ,  H01L29/7802 ,  H01L29/7813 ,  H01L29/872

摘要： A semiconductor substrate includes a drift layer of a first layer formed of a single crystal SiC semiconductor and a buffer layer and a substrate layer of a second layer that is formed of a SiC semiconductor which includes a polycrystalline structure and is formed on the surface of the first layer, in which the second layer (12) is formed on the surface of the drift layer of the first layer by means of CVD growth, the drift layer of the first layer is formed by means of epitaxial growth, and accordingly, defects occurring at a junction interface of the semiconductor substrate including the single crystal SiC layer and the polycrystal SiC layer are suppressed, and manufacturing costs are also reduced.

公开(公告)号：US12040363B2

公开(公告)日：2024-07-16

申请号：US17588558

申请日：2022-01-31

申请人： ROHM CO., LTD.

发明人： Takuji Maekawa ,  Mitsuru Morimoto

IPC分类号： H01L21/02 ,  H01L29/04 ,  H01L29/16 ,  H01L29/739 ,  H01L29/78 ,  H01L29/872

CPC分类号： H01L29/1608 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02516 ,  H01L21/02529 ,  H01L21/02595 ,  H01L29/045 ,  H01L29/7395 ,  H01L29/7802 ,  H01L29/7813 ,  H01L29/872

摘要： A semiconductor substrate includes a drift layer of a first layer formed of a single crystal SiC semiconductor and a buffer layer and a substrate layer of a second layer that is formed of a SiC semiconductor which includes a polycrystalline structure and is formed on the surface of the first layer, in which the second layer (12) is formed on the surface of the drift layer of the first layer by means of CVD growth, the drift layer of the first layer is formed by means of epitaxial growth, and accordingly, defects occurring at a junction interface of the semiconductor substrate including the single crystal SiC layer and the polycrystal SiC layer are suppressed, and manufacturing costs are also reduced.

公开(公告)号：US20240222439A1

公开(公告)日：2024-07-04

申请号：US18404665

申请日：2024-01-04

申请人： M7D Corporation

发明人： John P. Ciraldo

IPC分类号： H01L29/26 ,  H01L21/02

CPC分类号： H01L29/26 ,  H01L21/02376 ,  H01L21/02491 ,  H01L21/02516 ,  H01L21/0254 ,  H01L21/02565 ,  H01L21/02634

摘要： A method for manufacturing a semiconductor substrate. The method provides a single-crystal diamond base layer. The method then forms a beryllium oxide (BeO) layer over the single-crystal diamond base layer. The method then forms a gallium nitride (GaN) layer over the BeO layer. In some embodiments, the method forms surfactants over the single-crystal diamond base layer and the BeO layer.

公开(公告)号：US20240136441A1

公开(公告)日：2024-04-25

申请号：US18164600

申请日：2023-02-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ken-Ichi Goto ,  Cheng-Yi Wu

IPC分类号： H01L29/786 ,  H01L21/02 ,  H01L27/12 ,  H01L29/04 ,  H01L29/49 ,  H01L29/66

CPC分类号： H01L29/78684 ,  H01L21/02488 ,  H01L21/02491 ,  H01L21/02502 ,  H01L21/02516 ,  H01L21/02521 ,  H01L21/02532 ,  H01L21/02565 ,  H01L21/02598 ,  H01L21/02609 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/1229 ,  H01L27/1237 ,  H01L29/045 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78681 ,  H01L29/7869 ,  H01L29/18

摘要： A semiconductor device includes a substrate, and a first transistor disposed on the substrate. The first transistor includes a first channel layer, a magnesium oxide layer, a first gate electrode, a first gate dielectric and first source/drain electrodes. A crystal orientation of the first channel layer is or . The magnesium oxide layer is located below the first channel layer and in contact with the first channel layer. The first gate electrode is located over the first channel layer. The first gate dielectric is located in between the first channel layer and the first gate electrode. The first source/drain electrodes are disposed on the first channel layer.

公开(公告)号：US11935916B2

公开(公告)日：2024-03-19

申请号：US18154218

申请日：2023-01-13

申请人： Samsung Electronics Co., Ltd.

发明人： Hyangsook Lee ,  Junghwa Kim ,  Eunha Lee ,  Jeonggyu Song ,  Jooho Lee ,  Myoungho Jeong

IPC分类号： H01L29/08 ,  H01L21/02 ,  H01L49/02

CPC分类号： H01L28/55 ,  H01L21/02181 ,  H01L21/02189 ,  H01L21/02433 ,  H01L21/02516 ,  H01L21/02609 ,  H01L28/60 ,  H01L29/0847

摘要： Provided are dielectric thin-film structures and electronic devices including the same. The dielectric thin-film structure includes a substrate, and a dielectric layer provided on the substrate. The dielectric layer including a tetragonal crystal structure, and crystal grains including a proportion of the crystal grains preferentially oriented such that at least one of a , , or direction of a crystal lattice is parallel to or forms an angle of less than 45 degrees an out-of-plane orientation.

公开(公告)号：US11923195B2

公开(公告)日：2024-03-05

申请号：US17352851

申请日：2021-06-21

申请人： SAMSUNG ELECTRONICS CO., LTD. ,  iBeam Materials, Inc.

发明人： Junhee Choi ,  Vladmir Matias ,  Joohun Han

IPC分类号： H01L21/02

CPC分类号： H01L21/02502 ,  H01L21/02488 ,  H01L21/02491 ,  H01L21/02496 ,  H01L21/02505 ,  H01L21/02513 ,  H01L21/02516 ,  H01L21/02598 ,  H01L21/02192 ,  H01L21/02266 ,  H01L21/02422 ,  H01L21/02425 ,  H01L21/02458 ,  H01L21/02461 ,  H01L21/02463 ,  H01L21/0254 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/02609 ,  H01L21/0262 ,  H01L21/02631

摘要： A single crystal semiconductor includes a strain compensation layer; an amorphous substrate disposed on the strain compensation layer; a lattice matching layer disposed on the amorphous substrate and including two or more single crystal layers; and a single crystal semiconductor layer disposed on the lattice matching layer, the lattice matching layer including a direction control film disposed on the amorphous substrate and including a single crystal structure, and a buffer layer including a material different from that of the direction control film, the buffer layer being disposed on the direction control film and including a single crystal structure.

公开(公告)号：US11869766B2

公开(公告)日：2024-01-09

申请号：US17709284

申请日：2022-03-30

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： Chun-Chieh Lu ,  Sai-Hooi Yeong ,  Yu-Ming Lin

IPC分类号： H01L21/02 ,  H10B51/30

CPC分类号： H01L21/02516 ,  H01L21/02472 ,  H10B51/30

摘要： A method includes: providing a bottom layer; forming a first transistor over a substrate; forming a bottom electrode over the transistor; depositing a first seed layer over the bottom electrode; performing a surface treatment on the first seed layer, wherein after the surface treatment the first seed layer includes at least one of a tetragonal crystal phase and an orthorhombic crystal phase; depositing a dielectric layer over the bottom layer adjacent to the first seed layer, the dielectric layer including an amorphous crystal phase; depositing an upper layer over the dielectric layer; performing a thermal operation on the dielectric layer to thereby convert the dielectric layer into a ferroelectric layer.

公开(公告)号：US11670687B2

公开(公告)日：2023-06-06

申请号：US16906714

申请日：2020-06-19

申请人： MITSUBISHI CHEMICAL CORPORATION

发明人： Yusuke Tsukada ,  Shuichi Kubo ,  Kazunori Kamada ,  Hideo Fujisawa ,  Tatsuhiro Ohata ,  Hirotaka Ikeda ,  Hajime Matsumoto ,  Yutaka Mikawa

IPC分类号： H01L29/20 ,  C30B25/00 ,  C30B25/02 ,  C30B29/40 ,  H01L21/02 ,  H01L33/00 ,  H01L29/32 ,  C30B25/20 ,  H01L33/32 ,  H01L33/12

CPC分类号： H01L29/2003 ,  C30B25/00 ,  C30B25/02 ,  C30B25/20 ,  C30B29/406 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02389 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02516 ,  H01L21/02576 ,  H01L21/02609 ,  H01L21/02639 ,  H01L29/32 ,  H01L33/007 ,  H01L33/32 ,  H01L33/12

摘要： A gallium nitride substrate comprising a first main surface and a second main surface opposite thereto, wherein the first main surface is a non-polar or semi-polar plane, a dislocation density measured by a room-temperature cathode luminescence method in the first main surface is 1×104 cm−2 or less, and an averaged dislocation density measured by a room-temperature cathode luminescence method in an optional square region sizing 250 μm×250 μm in the first main plan is 1×106 cm−2 or less.

公开(公告)号：US11658032B2

公开(公告)日：2023-05-23

申请号：US17205715

申请日：2021-03-18

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Wen-Chin Chen ,  Cheng-Yi Wu ,  Yu-Hung Cheng ,  Ren-Hua Guo ,  Hsiang Liu ,  Chin-Szu Lee

IPC分类号： H01L29/78 ,  H01L21/331 ,  H01L21/20 ,  H01L29/66 ,  H01L29/04 ,  H01L21/02 ,  H01L29/08 ,  H01L29/165 ,  H01L21/306

CPC分类号： H01L21/2022 ,  H01L21/02002 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/0262 ,  H01L21/02381 ,  H01L21/02502 ,  H01L21/02516 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/02636 ,  H01L21/02639 ,  H01L29/045 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/66287 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7848 ,  H01L21/30608

摘要： A method includes providing a semiconductor structure having an active region and an isolation structure adjacent to the active region, the active region having source and drain regions sandwiching a channel region for a transistor, the semiconductor structure further having a gate structure over the channel region. The method further includes etching a trench in one of the source and drain regions, wherein the trench exposes a portion of a sidewall of the isolation structure, epitaxially growing a first semiconductor layer in the trench, epitaxially growing a second semiconductor layer over the first semiconductor layer, changing a crystalline facet orientation of a portion of a top surface of the second semiconductor layer by an etching process, and epitaxially growing a third semiconductor layer over the second semiconductor layer after the changing of the crystalline facet orientation.

公开(公告)号：US20180175196A1

公开(公告)日：2018-06-21

申请号：US15475826

申请日：2017-03-31

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Wen-Chin Chen ,  Cheng-Yi Wu ,  Yu-Hung Cheng ,  Ren-Hua Guo ,  Hsiang Liu ,  Chin-Szu Lee

IPC分类号： H01L29/78 ,  H01L29/04 ,  H01L29/06 ,  H01L29/161 ,  H01L29/66 ,  H01L21/768

CPC分类号： H01L21/2022 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/0245 ,  H01L21/02502 ,  H01L21/02516 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02636 ,  H01L21/02639 ,  H01L21/30608 ,  H01L29/045 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/66287 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7848

摘要： A method includes providing a semiconductor structure having an active region and an isolation structure adjacent to the active region, the active region having source and drain regions sandwiching a channel region for a transistor, the semiconductor structure further having a gate structure over the channel region. The method further includes etching a trench in one of the source and drain regions, wherein the trench exposes a portion of a sidewall of the isolation structure, epitaxially growing a first semiconductor layer in the trench, epitaxially growing a second semiconductor layer over the first semiconductor layer, changing a crystalline facet orientation of a portion of a top surface of the second semiconductor layer by an etching process, and epitaxially growing a third semiconductor layer over the second semiconductor layer after the changing of the crystalline facet orientation.