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    NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME
    3.
    发明申请
    NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME 审中-公开

    公开(公告)号：US20180268921A1

    公开(公告)日：2018-09-20

    申请号：US15824068

    申请日：2017-11-28

    申请人： Samsung Electronics Co., Ltd.

    发明人： Ho-Jun Lee ,  Bong-Soon Lim ,  Sang-Won Park

    IPC分类号： G11C29/00 ,  G06F12/02

    CPC分类号： G11C29/765 ,  G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7204 ,  G11C29/88 ,  G11C29/883

    摘要： A nonvolatile memory device includes a memory cell array and a bad block remapping circuit. The memory cell array includes a first mat and a second mat that are paired with each other. The first mat includes a plurality of first memory blocks. The second mat includes a plurality of second memory blocks. A first selection memory block among the plurality of first memory blocks and a second selection memory block among the plurality of second memory blocks are accessed based on a first address. The bad block remapping circuit generates a first remapping address based on the first address when it is determined that the first selection memory block is defective. A first remapping memory block among the plurality of first memory blocks and the second selection memory block are accessed based on the first remapping address.

    Selective Online Burn-In with Adaptive and Delayed Verification Methods for Memory
    7.
    发明申请
    Selective Online Burn-In with Adaptive and Delayed Verification Methods for Memory 有权
    选择性在线在线刻录与自适应和延迟的内存验证方法

    公开(公告)号：US20160211035A1

    公开(公告)日：2016-07-21

    申请号：US14600342

    申请日：2015-01-20

    申请人： SanDisk Technologies Inc.

    发明人： Ofer Shapira ,  Eran Sharon ,  Idan Alrod

    IPC分类号： G11C16/34 ,  G06F11/07 ,  G11C29/04 ,  G11C16/14 ,  G11C16/26

    CPC分类号： G11C16/3459 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/079 ,  G06F11/1068 ,  G06F11/108 ,  G11C11/5628 ,  G11C16/14 ,  G11C29/04 ,  G11C29/06 ,  G11C29/08 ,  G11C29/44 ,  G11C29/4401 ,  G11C29/883

    摘要： A memory is released for use without pre-verification of its memory blocks as being defect free. Some memory blocks are subjected to a verification process when the computer memory is in use in order to verify a minimum number of memory blocks required for high performance program operation as being defect free. The verification process continues as the computer memory is in use in order to maintain the minimum number of memory blocks required for high performance operation in the verified defect free state. A verification mode of either no verification, delayed verification, or immediate verification is applied to memory blocks used for regular performance program operation. Delayed verification is maintained until an ability to recover the stored data is going to be lost. Immediate verification can be performed using bit error rate analysis. Some verification processes are performed using aggressive programming trim and/or multiple word line sensing for faster programming.

    摘要翻译： 内存被释放使用，而不会将其内存块预先验证为无缺陷。 当使用计算机存储器时，为了将高性能程序操作所需的最少数量的存储器块验证为无缺陷，一些存储器块经受验证过程。 随着计算机存储器正在使用，验证过程继续进行，以便在验证的无缺陷状态下保持高性能操作所需的最小数量的存储器块。 无需验证，延迟验证或立即验证的验证模式适用于用于常规性能程序操作的内存块。 维持延迟验证，直到恢复存储的数据的能力将丢失。 可以使用误码率分析进行立即验证。 使用积极的编程修剪和/或多个字线检测来执行一些验证过程，以实现更快的编程。

    MEMORY DEVICES, TESTING SYSTEMS AND METHODS
    10.
    发明申请
    MEMORY DEVICES, TESTING SYSTEMS AND METHODS 有权
    存储器件，测试系统和方法

    公开(公告)号：US20150082106A1

    公开(公告)日：2015-03-19

    申请号：US14518734

    申请日：2014-10-20

    申请人： MICRON TECHNOLOGY, INC.

    发明人： Michael A. Shore

    IPC分类号： G11C29/44 ,  G11C29/36

    CPC分类号： G11C29/44 ,  G11C29/36 ,  G11C29/38 ,  G11C29/4401 ,  G11C29/883 ,  G11C2229/723

    摘要： Testing systems and methods, as well as memory devices using such testing systems and methods, may facilitate testing of memory devices using a read-modify-write test procedure. One such testing system receives a signal indicative of at least some of a plurality of bits of data read from an address differing from each other, and then masks subsequent write operations at the same address. Therefore, any address at which the bits of read data do not all have the same value may be considered to be faulty. Failure data from the test can therefore be stored in the same array of memory cells that is being tested.

    摘要翻译： 使用这种测试系统和方法的测试系统和方法以及存储器件可以使用读 - 修改 - 写测试程序来促进对存储器件的测试。 一个这样的测试系统接收指示从彼此不同的地址读取的多个数据位中的至少一些的信号，然后在相同的地址处屏蔽后续的写入操作。 因此，读取数据的比特并不都具有相同值的任何地址可能被认为是有缺陷的。 因此，测试中的故障数据可以存储在正在测试的同一阵列的存储单元中。