公开(公告)号：US5847688A

公开(公告)日：1998-12-08

申请号：US326222

申请日：1994-10-20

Applicant: Susumu Ohi ,  Hiroshi Shiba

Inventor： Susumu Ohi ,  Hiroshi Shiba

IPC: G02F1/133 ,  G09G3/36 ,  H04N5/66 ,  G09G5/04

CPC classification number: G09G3/3648 ,  G09G2300/0443 ,  G09G2300/0447 ,  G09G2310/0281 ,  G09G2310/0297 ,  G09G2320/0276 ,  G09G2320/028 ,  G09G3/3614

Abstract: In a liquid crystal display apparatus, the gamma characteristics of an image signal is changed each two frames, so that a driving voltage obtained from the changed gamma characteristics is applied to a liquid crystal. A wide viewing field angle can electrically be realized.

Abstract translation: 在液晶显示装置中，每两帧改变图像信号的伽马特性，使得从改变的伽马特性获得的驱动电压被施加到液晶。 可以实现宽视场角。

公开(公告)号：US5467035A

公开(公告)日：1995-11-14

申请号：US315716

申请日：1994-09-30

Applicant: Susumu Ohi ,  Hiroshi Shiba

Inventor： Susumu Ohi ,  Hiroshi Shiba

IPC: G11C27/02 ,  H03K17/66 ,  H03K5/00

CPC classification number: H03K17/667 ,  G11C27/026

Abstract: An input terminal is connected to bases of first and second transistors. Collectors of the first and fourth transistors are connected to a power-source terminal. Collectors of the second and third transistors are grounded. A base of the third transistor is connected to an emitter of the first transistor. A base of the fourth transistor is connected to an emitter of the second transistor. One terminal of the capacitor is grounded and the other terminal thereof is connected to emitters of the third and fourth transistors and an input of an output buffer whose output is connected to an output terminal. A collector of a fifth transistor is connected to the power-source terminal and a base thereof is connected to the output terminal. A collector of a sixth transistor is grounded and a base thereof is connected to the output terminal. A first constant-current source is connected to an emitter of the fifth transistor and a base of the fourth transistor. A second constant-current source is connected to an emitter of the sixth transistor and the base of the third transistor. A third constant-current source is connected to the emitter of the first transistor and turned on at a sampling time. A fourth constant-current source is connected to the emitter of the second transistor and turned on at the sampling time.

Abstract translation: 输入端子连接到第一和第二晶体管的基极。 第一和第四晶体管的集电极连接到电源端子。 第二和第三晶体管的集电极接地。 第三晶体管的基极连接到第一晶体管的发射极。 第四晶体管的基极连接到第二晶体管的发射极。 电容器的一个端子接地，另一个端子连接到第三和第四晶体管的发射极，输出端连接到输出端子的输出缓冲器的输入端。 第五晶体管的集电极连接到电源端子，其基极连接到输出端子。 第六晶体管的集电极接地，其基极连接到输出端子。 第一恒流源连接到第五晶体管的发射极和第四晶体管的基极。 第二恒流源连接到第六晶体管的发射极和第三晶体管的基极。 第三恒流源连接到第一晶体管的发射极，并在采样时间导通。 第四恒流源连接到第二晶体管的发射极，并在采样时间导通。

公开(公告)号：US4963957A

公开(公告)日：1990-10-16

申请号：US250670

申请日：1988-09-29

Applicant: Susumu Ohi ,  Masahiko Nakamae ,  Hiroshi Shiba

Inventor： Susumu Ohi ,  Masahiko Nakamae ,  Hiroshi Shiba

IPC: H01L29/73 ,  H01L21/331 ,  H01L21/74 ,  H01L21/76 ,  H01L29/417 ,  H01L29/423 ,  H01L29/732

CPC classification number: H01L29/66272 ,  H01L21/743 ,  H01L29/41708 ,  H01L29/42304

Abstract: A semiconductor device having a bipolar transistor with a trench is disclosed. An active region of the substrate is surrounded by the trench. Collector, base and emitter regions of the transistor are formed in the active region. A collector electrode is formed in a lower section of the trench, and a base electrode is formed in an upper section of the identical trench.

公开(公告)号：US5449960A

公开(公告)日：1995-09-12

申请号：US39796

申请日：1993-03-30

Applicant: Susumu Ohi ,  Hiroshi Shiba

Inventor： Susumu Ohi ,  Hiroshi Shiba

IPC: G11C27/02 ,  H03K17/66 ,  H03K17/68

CPC classification number: H03K17/667 ,  G11C27/026

Abstract: An input terminal is connected to bases of first and second transistors. Collectors of the first and fourth transistors are connected to a power-source terminal. Collectors of the second and third transistors are grounded. A base of the third transistor is connected to an emitter of the first transistor. A base of the fourth transistor is connected to an emitter of the second transistor. One terminal of the capacitor is grounded and the other terminal thereof is connected to emitters of the third and fourth transistors and an input of an output buffer whose output is connected to an output terminal. A collector of a fifth transistor is connected to the power-source terminal and a base thereof is connected to the output terminal. A collector of a sixth transistor is grounded and a base thereof is connected to the output terminal. A first constant-current source is connected to an emitter of the fifth transistor and a base of the fourth transistor. A second constant-current source is connected to an emitter of the sixth transistor and the base of the third transistor. A third constant-current source is connected to the emitter of the first transistor and turned on at a sampling time. A fourth constant-current source is connected to the emitter of the second transistor and turned on at the sampling time.

公开(公告)号：US08508107B2

公开(公告)日：2013-08-13

申请号：US13442428

申请日：2012-04-09

Applicant: Hiroshi Shiba

Inventor： Hiroshi Shiba

IPC: B06B1/06

CPC classification number: B06B1/0603

Abstract: A low frequency oscillator includes a plurality of drum-shaped oscillators. Each of the drum-shaped oscillators is constructed so that a pair of disk-shaped flexural vibrators is attached on both open ends of a conductive cylinder so as to be arranged face to face. And a conductive elongated coupling member is fixed to adjacent the drum-shaped oscillators at a central portion thereof so as to electrically connect between adjacent the disk-shaped flexural vibrators and thereby coupling the drum-shaped oscillators along a central axis thereof.

Abstract translation: 低频振荡器包括多个鼓形振荡器。 鼓形振荡器中的每一个被构造成使得一对盘形的弯曲振动器被安装在导电圆柱体的两个开口端上以便面对面地布置。 并且导电细长耦合构件在其中心部分处固定到与鼓形振荡器相邻的位置，以便在相邻的盘形弯曲振动器之间电连接，从而沿着其中心轴线耦合鼓形振荡器。

公开(公告)号：US07529493B2

公开(公告)日：2009-05-05

申请号：US11303242

申请日：2005-12-16

Applicant: Hiroshi Shiba ,  Yoshitaka Kokubo ,  Masanori Akita ,  Tomoyuki Okada ,  Kengo Umeda

Inventor： Hiroshi Shiba ,  Yoshitaka Kokubo ,  Masanori Akita ,  Tomoyuki Okada ,  Kengo Umeda

IPC: G03G15/00

CPC classification number: G03G15/5029

Abstract: A sensor system includes an LED configured to emit light to a recording medium and a light-receiving sensor configured to receive a transmitted light that has passed through the recording medium after having been emitted from the LED to the recording medium. An emitting optical axis of the LED is away from a perpendicular receiving optical axis of the light-receiving sensor.

Abstract translation: 传感器系统包括被配置为向记录介质发射光的LED和被配置为在从LED发射到记录介质之后接收已经通过记录介质的透射光的光接收传感器。 LED的发射光轴远离光接收传感器的垂直接收光轴。

公开(公告)号：US4937649A

公开(公告)日：1990-06-26

申请号：US383292

申请日：1989-07-17

Applicant: Hiroshi Shiba ,  Hiroaki Mikoshiba

Inventor： Hiroshi Shiba ,  Hiroaki Mikoshiba

IPC: H03K19/00 ,  H01L21/3205 ,  H01L21/822 ,  H01L23/52 ,  H01L23/522 ,  H01L27/02 ,  H01L27/04

CPC classification number: H01L27/0218 ,  H01L23/522 ,  H01L23/5222 ,  H01L23/5223 ,  H01L2924/0002

Abstract: A semiconductor integrated circuit includes a semiconductor substrate, a plurality of logic gates formed in the semiconductor substrate, power source wiring and ground wiring formed on the semiconductor substrate to supply power source voltage to the logic gates and a capacitor formed on the semiconductor substrate and distributively connected between the power source wiring and the ground wirings.

Abstract translation: 半导体集成电路包括半导体衬底，形成在半导体衬底中的多个逻辑门，在半导体衬底上形成的电源布线和接地布线，以向逻辑门提供电源电压，并且分布地形成在电容器上的电容器 连接在电源线和接地线之间。

公开(公告)号：US4839862A

公开(公告)日：1989-06-13

申请号：US85575

申请日：1987-08-14

Applicant: Hiroshi Shiba ,  Shoji Eguchi

Inventor： Hiroshi Shiba ,  Shoji Eguchi

IPC: G11C7/18 ,  G11C11/412 ,  G11C11/416 ,  G11C11/419

CPC classification number: G11C11/416 ,  G11C11/412 ,  G11C11/419 ,  G11C7/18

Abstract: A semiconductor memory of a Bi-CMOS construction is disclosed. The memory includes a plurality of cell blocks connected in common to a pair of main-bit lines. Each of the cell blocks includes a plurality of word lines, a pair of pre-bit lines, a plurality of memory cell each connected to one of the word lines and to the pre-bit lines, and a pair of bipolar transistors having the respective bases connected to the pre-bit lines and the respective collector-emitter current paths connected in series between the main-bit lines. One of the bipolar transistors is turned ON in response to data stored in a selected memory cell to discharge the associated main-bit line. The discharging of the pre-bit line and the main-bit line is thus carried out rapidly to increase data read operation speed.

公开(公告)号：US4306915A

公开(公告)日：1981-12-22

申请号：US32427

申请日：1979-04-23

Applicant: Hiroshi Shiba

Inventor： Hiroshi Shiba

IPC: H01L29/78 ,  H01L21/033 ,  H01L21/225 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/52 ,  H01L29/45 ,  H01L29/49 ,  H01L21/263 ,  B01J17/00 ,  H01L21/26

CPC classification number: H01L29/456 ,  H01L21/033 ,  H01L21/2253 ,  H01L21/2257 ,  H01L21/28525 ,  H01L21/768 ,  H01L21/76888 ,  H01L21/76895 ,  H01L29/4983 ,  H01L2924/0002 ,  Y10S438/911 ,  Y10S438/92

Abstract: A semiconductor device suitable for a high-density integrated circuit is disclosed. The semiconductor device comprises an electrode wiring layer made of silicon with a substantially flat surface deposited on a major surface of a semiconductor substrate, the periphery of which is filled with an insulating layer produced by selectively oxidizing the silicon, a first impurity doped region formed in the semiconductor substrate in self-aligning relation with the electrode wiring layer, and a second impurity doped region coupled to the first impurity doped region and underlain the insulating layer.

Abstract translation: 公开了一种适用于高密度集成电路的半导体器件。 该半导体器件包括由硅构成的电极布线层，该电极布线层具有沉积在半导体衬底的主表面上的基本平坦的表面，其周边填充有通过选择性氧化硅而产生的绝缘层;形成在第一杂质掺杂区域 所述半导体衬底与所述电极布线层自对准关系，以及第二杂质掺杂区，耦合到所述第一杂质掺杂区并且在所述绝缘层下方。

公开(公告)号：US3939047A

公开(公告)日：1976-02-17

申请号：US501633

申请日：1974-08-29

Applicant: Hideo Tsunemitsu ,  Hiroshi Shiba

Inventor： Hideo Tsunemitsu ,  Hiroshi Shiba

IPC: H01L21/00 ,  H01L21/316 ,  H01L23/485 ,  C25D5/02 ,  H01L23/48

CPC classification number: H01L21/00 ,  H01L21/31687 ,  H01L23/485 ,  H01L2924/0002

Abstract: A thermally stable semiconductor device is disclosed in which a thin aluminum film is formed over a silicon oxide film selectively formed on the silicon substrate. A layer of a metal such as tantalum, tungsten, or molybdenum that does not enter into an alloy reaction with silicon at heat treatment temperatures is formed over the thin aluminum film and is covered with a thick aluminum film. Oxides of the upper thick aluminum layer as well as oxides of the non-alloying metal and the lower aluminum layer are selectively formed in alignment with one another at locations where the electrodes are not formed.

Abstract translation: 公开了一种热稳定的半导体器件，其中在硅衬底上有选择地形成的氧化硅膜上形成薄的铝膜。 在薄的铝膜上形成一层不会与硅在热处理温度下进行合金反应的诸如钽，钨或钼的金属，并被厚铝膜覆盖。 在不形成电极的位置处，选择性地形成上部厚铝层的氧化物以及非合金金属和下部铝层的氧化物。