知搜-全球专利检索

  1. 登录
  2. 注册

搜索结果

30 条记录 (耗时 0.156 秒)

    Semiconductor devices comprising floating gate transistors and methods of forming such semiconductor devices
    3.
    发明授权
    Semiconductor devices comprising floating gate transistors and methods of forming such semiconductor devices 有权
    包括浮栅晶体管的半导体器件和形成这种半导体器件的方法

    公开(公告)号：US09356157B2

    公开(公告)日：2016-05-31

    申请号：US14223410

    申请日：2014-03-24

    申请人： Micron Technology, Inc.

    发明人： Gurtej S. Sandhu ,  Chandra V. Mouli ,  Di Li

    IPC分类号： H01L29/788 ,  H01L51/52 ,  H01L51/56 ,  H01L21/28 ,  H01L29/423 ,  H01L29/66

    CPC分类号： H01L29/788 ,  H01L21/28273 ,  H01L29/42324 ,  H01L29/42376 ,  H01L29/66825 ,  H01L29/7883 ,  H01L51/5253 ,  H01L51/56

    摘要： Semiconductor devices include one or more transistors having a floating gate and a control gate. In at least one embodiment, the floating gate comprises an intermediate portion extending between two end portions. The intermediate portion has an average cross-sectional area less than one or both of the end portions. In some embodiments, the intermediate portion may comprise a single nanowire. In additional embodiments, semiconductor devices have one or more transistors having a control gate and a floating gate in which a surface of the control gate opposes a lateral side surface of a floating gate that defines a recess in the floating gate. Electronic systems include such semiconductor devices. Methods of forming semiconductor devices include, for example, forming a floating gate having an intermediate portion extending between two end portions, and configuring the intermediate portion to have an average cross-sectional area less than one or both of the end portions.

    摘要翻译： 半导体器件包括具有浮置栅极和控制栅极的一个或多个晶体管。 在至少一个实施例中，浮动门包括在两个端部之间延伸的中间部分。 中间部分具有小于一个或两个端部的平均横截面面积。 在一些实施例中，中间部分可以包括单个纳米线。 在另外的实施例中，半导体器件具有一个或多个具有控制栅极和浮置栅极的晶体管，其中控制栅极的表面与浮置栅极的限定了浮动栅极中的凹部的横向侧表面相对。 电子系统包括这样的半导体器件。 形成半导体器件的方法包括例如形成具有在两个端部之间延伸的中间部分的浮动栅极，并且将中间部分构造成具有小于一个或两个端部的平均横截面积。

    CAPACITOR-LESS MEMORY CELL, DEVICE, SYSTEM AND METHOD OF MAKING SAME
    4.
    发明申请
    CAPACITOR-LESS MEMORY CELL, DEVICE, SYSTEM AND METHOD OF MAKING SAME 有权
    无电容器存储器单元，器件，系统及其制造方法

    公开(公告)号：US20130252390A1

    公开(公告)日：2013-09-26

    申请号：US13902498

    申请日：2013-05-24

    申请人： Micron Technology, Inc.

    发明人： Fernando Gonzalez ,  Chandra V. Mouli

    IPC分类号： H01L29/66

    CPC分类号： G11C11/401 ,  G11C11/405 ,  G11C11/408 ,  G11C11/409 ,  H01L27/0705 ,  H01L27/108 ,  H01L27/10802 ,  H01L29/66666 ,  H01L29/7841

    摘要： A capacitor-less memory cell, memory device, system and process of forming the capacitor-less memory cell includes forming the memory cell in an active area of a substantially physically isolated portion of the bulk semiconductor substrate. A pass transistor is formed on the active area for coupling with a word line. The capacitor-less memory cell further includes a read/write enable transistor vertically configured along at least one vertical side of the active area and operable during a reading of a logic state with the logic state being stored as charge in a floating body area of the active area, causing different determinable threshold voltages for the pass transistor.

    摘要翻译： 无电容器的存储单元，存储器件，系统和形成无电容器的存储单元的工艺包括在体半导体衬底的基本上物理隔离的部分的有源区中形成存储单元。 在有源区上形成传输晶体管，用于与字线耦合。 无电容器存储单元还包括沿着有效区域的至少一个垂直侧垂直配置的读/写使能晶体管，并且在逻辑状态的读取期间可操作，逻辑状态被存储为电荷的浮动体区域 有效区域，导致传输晶体管的不同可确定的阈值电压。

    Apparatuses having a vertical memory cell
    7.
    发明授权
    Apparatuses having a vertical memory cell 有权
    具有垂直存储单元的装置

    公开(公告)号：US09577092B2

    公开(公告)日：2017-02-21

    申请号：US14517261

    申请日：2014-10-17

    申请人： Micron Technology, Inc.

    发明人： Kamal M. Karda ,  Rajesh N. Gupta ,  Srinivas Pulugurtha ,  Chandra V. Mouli ,  Wolfgang Mueller

    IPC分类号： H01L29/78 ,  G11C11/40 ,  H01L27/02 ,  H01L27/105 ,  H01L29/66 ,  H01L27/108

    CPC分类号： H01L29/7827 ,  G11C11/40 ,  H01L27/0207 ,  H01L27/1052 ,  H01L27/10855 ,  H01L27/10873 ,  H01L27/10885 ,  H01L27/10891 ,  H01L29/66666

    摘要： Methods, apparatuses, and systems for providing a body connection to a vertical access device. The vertical access device may include a digit line extending along a substrate to a digit line contact pillar, a body connection line extending along the substrate to a body connection line contact pillar, a body region disposed on the body connection line, an electrode disposed on the body region, and a word line extending to form a gate to the body region. A method for operation includes applying a first voltage to the body connection line, and applying a second voltage to the word line to cause a conductive channel to form through the body region. A memory cell array may include a plurality of vertical access devices.

    摘要翻译： 用于向垂直存取装置提供身体连接的方法，装置和系统。 垂直进入装置可以包括沿着基板延伸到数字线接触柱的数字线，沿着基板延伸到主体连接线接触柱的主体连接线，设置在主体连接线上的主体区域，设置在主体连接线上的电极 身体区域和延伸以形成到身体区域的门的字线。 一种操作方法包括：将第一电压施加到身体连接线，以及向该字线施加第二电压，以使导电通道通过身体区域形成。 存储单元阵列可以包括多个垂直存取装置。