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    Semiconductor packages and methods of forming the same
    2.
    发明授权
    Semiconductor packages and methods of forming the same 有权
    半导体封装及其形成方法

    公开(公告)号：US09281260B2

    公开(公告)日：2016-03-08

    申请号：US13415556

    申请日：2012-03-08

    申请人： Martin Standing ,  Andrew Roberts

    发明人： Martin Standing ,  Andrew Roberts

    IPC分类号： H01L21/00 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01L21/56

    CPC分类号： H01L23/5389 ,  H01L21/568 ,  H01L21/76877 ,  H01L23/3135 ,  H01L23/3185 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L25/0657 ,  H01L2224/04105 ,  H01L2224/24227 ,  H01L2224/2518 ,  H01L2924/12042 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/00

    摘要： In one embodiment, a method of fabricating a semiconductor package includes forming a first plurality of die openings on a laminate substrate. The laminate substrate has a front side and an opposite back side. A plurality of first dies is placed within the first plurality of die openings. An integrated spacer is formed around each die of the plurality of first dies. The integrated spacer is disposed in gaps between the laminate substrate and an outer sidewall of each die of the plurality of first dies. The integrated spacer holds the die within the laminate substrate by partially extending over a portion of a top surface of each die of the plurality of first dies. Front side contacts are formed over the front side of the laminate substrate.

    摘要翻译： 在一个实施例中，制造半导体封装的方法包括在层叠基板上形成第一多个裸片开口。 层叠基板具有前侧和相对的后侧。 多个第一模具被放置在第一多个模具开口内。 在多个第一管芯的每个管芯周围形成一个集成间隔件。 集成间隔件设置在层叠基板与多个第一管芯的每个管芯的外侧壁之间的间隙中。 集成间隔件通过部分延伸在多个第一管芯的每个管芯的顶表面的一部分上而将管芯保持在层压基板内。 前侧触点形成在层叠基板的前侧。

    Paste for forming an interconnect and interconnect formed from the paste
    5.
    发明授权
    Paste for forming an interconnect and interconnect formed from the paste 有权
    用于形成由糊状物形成的互连和互连的糊状物

    公开(公告)号：US08368223B2

    公开(公告)日：2013-02-05

    申请号：US10970165

    申请日：2004-10-21

    申请人： Martin Standing

    发明人： Martin Standing

    IPC分类号： H01L23/48 ,  H01L23/52

    CPC分类号： H01B1/02 ,  H01L2224/73153 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/13055 ,  H01L2924/13091 ,  H05K3/3484 ,  H05K2201/0215 ,  H01L2924/00

    摘要： A paste for forming an interconnect includes a mixture of binder particles, filler particles and flux material, binder particles having a melting temperature that is lower than that of the filler particles, and the proportion of the binder particles and the filler particles being selected such when heat is applied to melt the binder particles the shape of the paste as deposited is substantially retained thereby allowing for the paste to be used for forming interconnect structures.

    摘要翻译： 用于形成互连的糊料包括粘合剂颗粒，填料颗粒和助焊剂材料的混合物，熔融温度低于填料颗粒的熔融温度的粘合剂颗粒，以及当选择粘合剂颗粒和填料颗粒的比例时， 施加热量以熔化粘合剂颗粒，沉积的糊料的形状基本保持，从而允许将糊料用于形成互连结构。

    Embedded laminated device
    6.
    发明授权
    Embedded laminated device 有权
    嵌入式层压装置

    公开(公告)号：US08319334B2

    公开(公告)日：2012-11-27

    申请号：US12538470

    申请日：2009-08-10

    申请人： Martin Standing

    发明人： Martin Standing

    IPC分类号： H01L23/12 ,  H01L21/00

    CPC分类号： H05K1/185 ,  H01L21/4846 ,  H01L23/3107 ,  H01L23/5389 ,  H01L25/072 ,  H01L25/16 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H05K1/16 ,  H05K3/429 ,  H05K2201/09718 ,  H05K2201/10643 ,  H01L2924/00

    摘要： An electronic device includes at least one semiconductor chip, each semiconductor chip defining a first main face and a second main face opposite to the first main face. A first metal layer is coupled to the first main face of the at least one semiconductor chip and a second metal layer is coupled to the second main face of the at least one semiconductor chip. A third metal layer overlies the first metal layer and a fourth metal layer overlies the second metal layer. A first through-connection extends from the third metal layer to the fourth metal layer, the first through-connection being electrically connected with the first metal layer and electrically disconnected from the second metal layer. A second through-connection extends from the third metal layer to the fourth metal layer, the second through-connection being electrically connected with the second metal layer and electrically disconnected from the first metal layer.

    摘要翻译： 电子设备包括至少一个半导体芯片，每个半导体芯片限定第一主面和与第一主面相对的第二主面。 第一金属层耦合到至少一个半导体芯片的第一主面，第二金属层耦合到至少一个半导体芯片的第二主面。 第三金属层覆盖在第一金属层上，第四金属层覆盖在第二金属层上。 第一贯通连接从第三金属层延伸到第四金属层，第一贯通连接与第一金属层电连接并与第二金属层电连接。 第二贯通连接从第三金属层延伸到第四金属层，第二贯通连接与第二金属层电连接并与第一金属层电连接。