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    Semiconductor device having multiple conductive members
    1.
    发明授权
    Semiconductor device having multiple conductive members 有权

    公开(公告)号：US11837637B2

    公开(公告)日：2023-12-05

    申请号：US17399318

    申请日：2021-08-11

    申请人： KABUSHIKI KAISHA TOSHIBA

    发明人： Hiro Gangi ,  Tomoaki Inokuchi ,  Yusuke Kobayashi ,  Hiroki Nemoto

    IPC分类号： H01L29/40 ,  H01L29/78

    CPC分类号： H01L29/404 ,  H01L29/407 ,  H01L29/7813

    摘要： According to one embodiment, a semiconductor device includes first to third electrodes, first and second conductive members, a semiconductor member, and a first insulating member. The first conductive member is electrically connected with the second electrode or is electrically connectable with the second electrode. The semiconductor member includes first to third semiconductor regions. The first semiconductor region includes first to fourth partial regions. The third partial region is between the first and second partial regions. The second semiconductor region is between the third partial region and the third semiconductor region. The fourth partial region is between the third partial region and the second semiconductor region. At least a portion of the second semiconductor region is between the second conductive member and the third electrode. The second conductive member is electrically insulated from the second and third electrodes. The first insulating member includes first to third insulating regions.

    SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20220231135A1

    公开(公告)日：2022-07-21

    申请号：US17399318

    申请日：2021-08-11

    申请人： KABUSHIKI KAISHA TOSHIBA

    发明人： Hiro Gangi ,  Tomoaki Inokuchi ,  Yusuke Kobayashi ,  Hiroki Nemoto

    IPC分类号： H01L29/40 ,  H01L29/78

    摘要： According to one embodiment, a semiconductor device includes first to third electrodes, first and second conductive members, a semiconductor member, and a first insulating member. The first conductive member is electrically connected with the second electrode or is electrically connectable with the second electrode. The semiconductor member includes first to third semiconductor regions. The first semiconductor region includes first to fourth partial regions. The third partial region is between the first and second partial regions. The second semiconductor region is between the third partial region and the third semiconductor region. The fourth partial region is between the third partial region and the second semiconductor region. At least a portion of the second semiconductor region is between the second conductive member and the third electrode. The second conductive member is electrically insulated from the second and third electrodes. The first insulating member includes first to third insulating regions.

    Magnetic memory
    4.
    发明授权
    Magnetic memory 有权

    公开(公告)号：US10347313B2

    公开(公告)日：2019-07-09

    申请号：US15915654

    申请日：2018-03-08

    申请人： KABUSHIKI KAISHA TOSHIBA

    发明人： Naoharu Shimomura ,  Tomoaki Inokuchi ,  Katsuhiko Koui ,  Yuzo Kamiguchi ,  Hiroaki Yoda ,  Hideyuki Sugiyama

    IPC分类号： G11C11/16 ,  H01L43/08 ,  G11C11/18 ,  H01L27/22 ,  H01L43/06

    摘要： According to one embodiment, a magnetic memory includes: magnetoresistive effect elements arranged on an conductive layer; and a first circuit which passes a write current through the conductive layer and applies a control voltage to the magnetoresistive effect elements, to write data including a first value and a second value into the magnetoresistive effect elements. The first circuit adjusts at least one of a write sequence of the first value and the second value, a current value of the write current, and a pulse width of the write current, on the basis of an arrangement of the first value and the second value in the data.

    Magnetic memory
    5.
    发明授权
    Magnetic memory 有权

    公开(公告)号：US10170694B1

    公开(公告)日：2019-01-01

    申请号：US15911341

    申请日：2018-03-05

    申请人： KABUSHIKI KAISHA TOSHIBA

    发明人： Satoshi Shirotori ,  Yuichi Ohsawa ,  Hideyuki Sugiyama ,  Mariko Shimizu ,  Altansargai Buyandalai ,  Naoharu Shimomura ,  Katsuhiko Koui ,  Tomoaki Inokuchi ,  Hiroaki Yoda

    IPC分类号： H01L43/02 ,  H01L43/08 ,  G11C11/16 ,  H01L27/22 ,  H01L43/12 ,  H01L43/10

    摘要： A magnetic memory of an embodiment includes: a first conductive layer, which is nonmagnetic and includes at least a first element, the first conductive layer including a first to fifth regions; a first magnetoresistive element disposed corresponding to the third region and including a first magnetic layer, a second magnetic layer including at least a second element, a first nonmagnetic layer disposed between the first magnetic layer and the second magnetic layer, a second nonmagnetic layer disposed between the second magnetic layer and the first nonmagnetic layer and including at least a third element, and a third magnetic layer disposed between the second nonmagnetic layer and the first nonmagnetic layer; a second conductive layer disposed corresponding to the second region and including at least the first to third elements; and a third conductive layer disposed corresponding to the fourth region, and including at least the first to third elements.

    Magnetic memory
    6.
    发明授权
    Magnetic memory 有权

    公开(公告)号：US10102894B2

    公开(公告)日：2018-10-16

    申请号：US15698242

    申请日：2017-09-07

    申请人： KABUSHIKI KAISHA TOSHIBA

    发明人： Naoharu Shimomura ,  Tomoaki Inokuchi ,  Hiroki Noguchi ,  Katsuhiko Koui ,  Yuuzo Kamiguchi ,  Kazutaka Ikegami ,  Hiroaki Yoda

    IPC分类号： G11C11/16 ,  H01L27/22 ,  H01L43/08 ,  G11C11/15

    摘要： A magnetic memory includes: a first and second terminals; a conductive layer including first to fourth regions, the first and fourth regions being electrically connected to the first and second terminals respectively; a first magnetoresistive element including: a first and second magnetic layers; a first nonmagnetic layer between the first and second magnetic layers; and a third terminal electrically connected to the first magnetic layer; a second magnetoresistive element including: a third and fourth magnetic layers; a second nonmagnetic layer between the third and fourth magnetic layers; and a fourth terminal electrically connected to the third magnetic layer; and a circuit configured to apply a write current between the first terminal and the second terminal and apply a first and second potentials to the third and fourth terminals respectively to write the first and second magnetoresistive elements, the first and second potentials being different from each other.

    Spin transistor memory
    9.
    发明授权
    Spin transistor memory 有权

    公开(公告)号：US09842635B2

    公开(公告)日：2017-12-12

    申请号：US15063808

    申请日：2016-03-08

    申请人： Kabushiki Kaisha Toshiba

    发明人： Hideyuki Sugiyama ,  Mizue Ishikawa ,  Tomoaki Inokuchi ,  Yoshiaki Saito

    IPC分类号： G11C11/16 ,  G11C11/15 ,  H01L29/66 ,  H03K19/18

    CPC分类号： G11C11/161 ,  G11C11/15 ,  G11C11/165 ,  H01L29/66984 ,  H03K19/18

    摘要： A spin transistor memory according to an embodiment includes: a first semiconductor region, a second semiconductor region, and a third semiconductor region, each being of a first conductivity type and disposed in a semiconductor layer; a first gate disposed above the semiconductor layer between the first semiconductor region and the second semiconductor region; a second gate disposed above the semiconductor layer between the second semiconductor region and the third semiconductor region; and a first ferromagnetic layer, a second ferromagnetic layer, and a third ferromagnetic layer disposed on the first semiconductor region, the second semiconductor region, and the third semiconductor region respectively.