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公开(公告)号：US10510949B2
公开(公告)日：2019-12-17
申请号：US16119553
申请日：2018-08-31
Applicant: KABUSHIKI KAISHA TOSHIBA
Inventor： Mariko Shimizu , Yuichi Ohsawa , Hiroaki Yoda , Hideyuki Sugiyama , Satoshi Shirotori , Altansargai Buyandalai
Abstract: According to one embodiment, a magnetic memory device includes a metal-containing layer, a first magnetic layer, a second magnetic layer, a first intermediate layer, a third magnetic layer, a fourth magnetic layer, a second intermediate layer, and a controller. The metal-containing layer includes first, second, third, fourth, and fifth portions. The first magnetic layer is separated from the third portion. The second magnetic layer is provided between the first magnetic layer and a portion of the third portion. The first intermediate layer includes a portion provided between the first and second magnetic layers. The third magnetic layer is separated from the fourth portion. The fourth magnetic layer is provided between the third magnetic layer and a portion of the fourth portion. The second intermediate layer includes a portion provided between the third and fourth magnetic layers. The controller is electrically connected with the first portion and the second portion.
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公开(公告)号：US10483459B2
公开(公告)日：2019-11-19
申请号：US15914206
申请日：2018-03-07
Applicant: KABUSHIKI KAISHA TOSHIBA
Inventor： Hideyuki Sugiyama , Yuichi Ohsawa , Satoshi Shirotori , Mariko Shimizu , Altansargai Buyandalai , Hiroaki Yoda
Abstract: A magnetic memory according to an embodiment includes: a first conductive layer including a first to third regions arranged along a first direction, the second region being disposed between the first region and the third region; a second conductive layer including a fourth to sixth regions arranged along the first direction, the fifth region being disposed between the fourth and sixth regions; a third conductive layer electrically connected to the third and fourth regions; a first magnetoresistance device disposed to correspond to the second region, including a first magnetic layer, a second magnetic layer, and a first nonmagnetic layer; a second magnetoresistance device to correspond to the fifth region, including a third magnetic layer, a fourth magnetic layer, and a second nonmagnetic layer, a direction from the first region to the third region differing from a direction from the fourth region to the sixth region.
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公开(公告)号：US10211394B1
公开(公告)日：2019-02-19
申请号：US15911227
申请日：2018-03-05
Applicant: KABUSHIKI KAISHA TOSHIBA
Inventor： Tomoaki Inokuchi , Katsuhiko Koui , Naoharu Shimomura , Yuuzo Kamiguchi , Satoshi Shirotori , Yuichi Ohsawa , Hiroaki Yoda
Abstract: A magnetic memory according to an embodiment includes: a first and second terminals; a conductive layer, which is nonmagnetic, the conductive layer including a first to third regions, the second region being disposed between the first region and the third region, the first region being electrically connected to the first terminal, and the third region being electrically connected to the second terminal; a magnetoresistive element disposed to correspond to the second region of the conductive layer, the magnetoresistive element including a first magnetic layer, a second magnetic layer disposed between the second region and the first magnetic layer and electrically connected to the second region, a nonmagnetic layer disposed between the first magnetic layer and the second magnetic layer, and a third terminal electrically connected to the first magnetic layer; and a third magnetic layer, the conductive layer being disposed between the third and second magnetic layers.
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公开(公告)号：US09881660B2
公开(公告)日：2018-01-30
申请号：US15267974
申请日：2016-09-16
Applicant: KABUSHIKI KAISHA TOSHIBA
Inventor： Hiroaki Yoda , Naoharu Shimomura , Yuichi Ohsawa , Tadaomi Daibou , Tomoaki Inokuchi , Satoshi Shirotori , Altansargai Buyandalai , Yuuzo Kamiguchi
CPC classification number: G11C11/1675 , G11C11/15 , G11C11/16 , G11C11/1659 , G11C11/1673 , H01L27/224 , H01L27/228 , H01L43/02 , H01L43/08
Abstract: A magnetic memory according to an embodiment includes: a conductive layer including a first and second terminals; a plurality of magnetoresistive elements separately disposed on the conductive layer between the first and second terminals, each magnetoresistive element including a reference layer, a storage layer between the reference layer and the conductive layer, and a nonmagnetic layer between the storage layer and the reference layer; and a circuit configured to apply a first potential to the reference layers of the magnetoresistive elements and to flow a first write current between the first and second terminals, and configured to apply a second potential to the reference layer or the reference layers of one or more of the magnetoresistive elements to which data is to be written, and to flow a second write current between the first and second terminals in an opposite direction to the first write current.
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公开(公告)号：US20140206106A1
公开(公告)日：2014-07-24
申请号：US14223802
申请日：2014-03-24
Applicant: KABUSHIKI KAISHA TOSHIBA
Inventor： Shigeki Takahashi , Yuichi Ohsawa , Junichi Ito , Chikayoshi Kamata , Saori Kashiwada , Minoru Amano , Hiroaki Yoda
IPC: H01L43/12
CPC classification number: H01L43/12 , H01L27/228 , H01L43/08 , H01L43/10
Abstract: A magnetic memory according to an embodiment includes: at least one memory cell comprising a magnetoresistive element as a memory element, and first and second electrodes that energize the magnetoresistive element. The magnetoresistive element includes: a first magnetic layer having a variable magnetization direction perpendicular to a film plane; a tunnel barrier layer on the first magnetic layer; and a second magnetic layer on the tunnel barrier layer, and having a fixed magnetization direction perpendicular to the film plane. The first magnetic layer including: a first region; and a second region outside the first region so as to surround the first region, and having a smaller perpendicular magnetic anisotropy energy than that of the first region. The second magnetic layer including: a third region; and a fourth region outside the third region, and having a smaller perpendicular magnetic anisotropy energy than that of the third region.
Abstract translation: 根据实施例的磁存储器包括：包括作为存储元件的磁阻元件的至少一个存储单元，以及激励磁阻元件的第一和第二电极。 磁阻元件包括：具有与膜平面垂直的可变磁化方向的第一磁性层; 在第一磁性层上的隧道阻挡层; 以及隧道势垒层上的第二磁性层，并且具有与膜平面垂直的固定的磁化方向。 所述第一磁性层包括：第一区域; 以及围绕第一区域的第一区域外的第二区域，并且具有比第一区域小的垂直磁各向异性能量。 第二磁性层包括：第三区域; 以及第三区域外的第四区域，并且具有比第三区域小的垂直磁各向异性能量。
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Patent Agency Ranking
公开(公告)号：US10395709B2
公开(公告)日：2019-08-27
申请号：US16146303
申请日：2018-09-28
Applicant: Kabushiki Kaisha Toshiba
Inventor： Mariko Shimizu , Yuichi Ohsawa , Hideyuki Sugiyama , Satoshi Shirotori , Altansargai Buyandalai , Yushi Kato
Abstract: According to one embodiment, a magnetic memory device includes a conductive layer, a first magnetic layer, a first nonmagnetic layer, a second magnetic layer, a first conductive region, a first insulating region, and a controller. The conductive layer includes a first element. The conductive layer includes a first portion, a second portion, a third portion between the first portion and the second portion, and a fourth portion between the second portion and the third portion. The first conductive region includes a second element different from the first element. The first conductive region is provided between the second magnetic layer and the third portion. The first insulating region includes a first insulating substance. The first insulating substance is an insulating compound of the second element. The controller is electrically connected to the first portion and the second portion. The controller implements a first operation and a second operation.
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公开(公告)号：US20190051820A1
公开(公告)日：2019-02-14
申请号：US15914206
申请日：2018-03-07
Applicant: KABUSHIKI KAISHA TOSHIBA
Inventor： Hideyuki Sugiyama , Yuichi Ohsawa , Satoshi Shirotori , Mariko Shimizu , Altansargai Buyandalai , Hiroaki Yoda
CPC classification number: H01L43/08 , G11C11/161 , G11C11/1673 , G11C11/1675 , G11C11/18 , H01L27/228 , H01L43/02 , H01L43/10
Abstract: A magnetic memory according to an embodiment includes: a first conductive layer including a first to third regions arranged along a first direction, the second region being disposed between the first region and the third region; a second conductive layer including a fourth to sixth regions arranged along the first direction, the fifth region being disposed between the fourth and sixth regions; a third conductive layer electrically connected to the third and fourth regions; a first magnetoresistance device disposed to correspond to the second region, including a first magnetic layer, a second magnetic layer, and a first nonmagnetic layer; a second magnetoresistance device to correspond to the fifth region, including a third magnetic layer, a fourth magnetic layer, and a second nonmagnetic layer, a direction from the first region to the third region differing from a direction from the fourth region to the sixth region.
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公开(公告)号：US20180375016A1
公开(公告)日：2018-12-27
申请号：US16119553
申请日：2018-08-31
Applicant: KABUSHIKI KAISHA TOSHIBA
Inventor： Mariko Shimizu , Yuichi Ohsawa , Hiroaki Yoda , Hideyuki Sugiyama , Satoshi Shirotori , Altansargai Buyandalai
CPC classification number: H01L43/08 , G11C11/161 , G11C11/1675 , H01L27/228 , H01L43/02 , H01L43/12
Abstract: According to one embodiment, a magnetic memory device includes a metal-containing layer, a first magnetic layer, a second magnetic layer, a first intermediate layer, a third magnetic layer, a fourth magnetic layer, a second intermediate layer, and a controller. The metal-containing layer includes first, second, third, fourth, and fifth portions. The first magnetic layer is separated from the third portion. The second magnetic layer is provided between the first magnetic layer and a portion of the third portion. The first intermediate layer includes a portion provided between the first and second magnetic layers. The third magnetic layer is separated from the fourth portion. The fourth magnetic layer is provided between the third magnetic layer and a portion of the fourth portion. The second intermediate layer includes a portion provided between the third and fourth magnetic layers. The controller is electrically connected with the first portion and the second portion.
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公开(公告)号：US10141037B2
公开(公告)日：2018-11-27
申请号：US15704571
申请日：2017-09-14
Applicant: Kabushiki Kaisha Toshiba
Inventor： Yuichi Ohsawa , Hiroaki Yoda , Altansargai Buyandalai , Satoshi Shirotori , Mariko Shimizu , Hideyuki Sugiyama , Yushi Kato
Abstract: According to one embodiment, a magnetic memory device includes a conductive layer, a first magnetic layer, a second magnetic layer, a first nonmagnetic layer, and a controller. The conductive layer includes a first portion, a second portion, and a third portion. The first magnetic layer is separated from the third portion. The first nonmagnetic layer is provided between the first magnetic layer and the second magnetic layer that is electrically connected with the third portion. The first nonmagnetic layer is curved. The controller is electrically connected to the first portion and the second portion. The controller implements a first operation and a second operation. The controller in the first operation supplies a first current to the conductive layer from the first portion toward the second portion. The controller in the second operation supplies a second current to the conductive layer from the second portion toward the first portion.
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公开(公告)号：US10068946B2
公开(公告)日：2018-09-04
申请号：US15264111
申请日：2016-09-13
Applicant: Kabushiki Kaisha Toshiba
Inventor： Naoharu Shimomura , Hiroaki Yoda , Tadaomi Daibou , Yuuzo Kamiguchi , Yuichi Ohsawa , Tomoaki Inokuchi , Satoshi Shirotori
Abstract: A magnetic memory of an embodiment includes: a first nonmagnetic layer including a first and second faces; a first and second wirings disposed on a side of the first face; a third wiring disposed on a side of the second face; a first transistor, one of the source and the drain being connected to the first wiring, the other one being connected to the first nonmagnetic layer; a second transistor, one of source and drain being connected to the second wiring, the other one being connected to the first nonmagnetic layer; a magnetoresistive element disposed between the first nonmagnetic layer and the third wiring, a first terminal of the magnetoresistive element being connected to the first nonmagnetic layer; and a third transistor, one of source and drain of the third transistor being connected to the second terminal, the other one being connected to the third wiring.
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