公开(公告)号：US20170170069A1

公开(公告)日：2017-06-15

申请号：US15131704

申请日：2016-04-18

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Satoshi WAKATSUKI ,  Hiroshi NAKAZAWA ,  Atsuko SAKATA

IPC: H01L21/768

CPC classification number: H01L21/76897 ,  H01L21/7682 ,  H01L21/76877 ,  H01L21/76883 ,  H01L21/76886 ,  H01L23/53271 ,  H01L27/1157 ,  H01L27/11582

Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes forming a silicon film on an upper surface side, a lower surface side, and a side surface side of an air gap, while leaving part of the air gap between the silicon film formed on the upper surface side and the silicon film formed on the lower surface side. The method includes forming a metal film on a side surface of the slit. The method includes forming a plurality of metal silicide layers between the second layers by causing reaction between the metal film and the silicon film. The method includes removing unreacted part of the metal film formed on the side surface of the slit.

公开(公告)号：US20170207236A1

公开(公告)日：2017-07-20

申请号：US15257138

申请日：2016-09-06

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Masayuki KITAMURA ,  Atsuko SAKATA ,  Satoshi WAKATSUKI ,  Takeshl ISHIZAKI ,  Daisuke IKENO ,  Tomotaka ARIGA

IPC: H01L27/115 ,  H01L21/48 ,  H01L23/498 ,  H01L29/792 ,  H01L29/66

CPC classification number: H01L27/11582 ,  H01L21/486 ,  H01L23/49827 ,  H01L27/11556 ,  H01L28/00 ,  H01L29/66833 ,  H01L29/7926

Abstract: According to one embodiment, an insulating layer is provided above a stairstep portion of a stacked body. A first cover film is provided between the stairstep portion and the insulating layer. The first cover film is of a material different from the insulating layer. A separation portion divides the stacked body and the insulating layer. A second cover film is provided at a side surface of the insulating layer on the separation portion side. The second cover film is of a material different from the insulating layer.

公开(公告)号：US20150064901A1

公开(公告)日：2015-03-05

申请号：US14177770

申请日：2014-02-11

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Satoshi WAKATSUKI ,  Atsuko SAKATA

IPC: H01L21/283 ,  H01L21/768

CPC classification number: H01L21/283 ,  H01L21/288 ,  H01L21/76885 ,  H01L21/76886 ,  H01L21/76889 ,  H01L27/2409 ,  H01L27/2472 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/141 ,  H01L45/16

Abstract: According to one embodiment, a method for producing a semiconductor device includes forming a base film above a semiconductor substrate, forming a core above the base film, forming a side wall film on a side face of the core, and replacing at least part of the side wall film with a metal film by performing plating processing.

Abstract translation: 根据一个实施例，一种半导体器件的制造方法包括在半导体衬底上形成基膜，在基膜上形成芯，在芯的侧面形成侧壁膜，并且将至少部分 通过进行电镀处理而具有金属膜的侧壁膜。

公开(公告)号：US20180277667A1

公开(公告)日：2018-09-27

申请号：US15690251

申请日：2017-08-29

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Hideki SEKIGUCHI ,  Keiko KAWAMURA ,  Kaori FUSE ,  Akira KOMATSU ,  Ryohei KITAO ,  Satoshi WAKATSUKI ,  Atsuko SAKATA ,  Koichi KUBO

IPC: H01L29/739 ,  H01L29/45 ,  H01L29/49

CPC classification number: H01L29/7397 ,  H01L21/043 ,  H01L29/417 ,  H01L29/456 ,  H01L29/7396

Abstract: A semiconductor device includes first and second electrodes, first semiconductor region of first conductivity type between the first and second electrodes, a second semiconductor region of second conductivity type between the first semiconductor region and the first electrode, a third semiconductor region of the second conductivity type between the first semiconductor region and the second electrode, a fourth semiconductor region of the first conductivity type between the third semiconductor region and the second electrode, a plurality of third electrodes between the second electrode and the first semiconductor region, wherein a gate insulating film is between each third electrode and the third semiconductor region, a fourth electrode extending between the third semiconductor region and the second electrode and electrically connected to the third semiconductor region and the second electrode, and a first insulating film between the second and electrodes. The fourth electrode is in ohmic contact with the third semiconductor region.

公开(公告)号：US20170263621A1

公开(公告)日：2017-09-14

申请号：US15258275

申请日：2016-09-07

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Satoshi WAKATSUKI ,  Atsuko SAKATA ,  Daisuke IKENO

IPC: H01L27/115

CPC classification number: H01L27/11582 ,  H01L27/1157

Abstract: According to one embodiment, a stacked body includes a plurality of metal layers stacked with an insulator interposed. A semiconductor body extends in a stacking direction through the stacked body. A charge storage portion is provided between the semiconductor body and one of the metal layers. A metal nitride film has a first portion and a second portion. The first portion is provided between the charge storage portion and one of the metal layers. The second portion is thicker than the first portion and is provided between one of the metal layers and the insulator.

公开(公告)号：US20160005604A1

公开(公告)日：2016-01-07

申请号：US14481008

申请日：2014-09-09

Applicant: Kabushiki Kaisha Toshiba

Inventor： Yasuhito YOSHIMIZU ,  Mitsuhiro OMURA ,  Hisashi OKUCHI ,  Satoshi WAKATSUKI ,  Tsubasa IMAMURA

IPC: H01L21/033

CPC classification number: H01L21/0338 ,  H01L21/0332 ,  H01L21/0335 ,  H01L21/0337 ,  H01L21/3105 ,  H01L21/31144 ,  H01L21/32051 ,  H01L21/32139 ,  H01L21/76816

Abstract: According to an embodiment, a manufacturing method of a semiconductor device includes: forming a first film on a processing target by using a first material; forming a second film on the first film by using a second material; selectively removing the second and first films to provide an opening pierced in the second and first films; selectively forming a metal film on an inner surface of the opening in the first film; and processing the processing target by using the metal film as a mask.

Abstract translation: 根据实施例，半导体器件的制造方法包括：通过使用第一材料在处理对象上形成第一膜; 通过使用第二材料在所述第一膜上形成第二膜; 选择性地去除第二和第一膜以提供在第二和第一膜中刺穿的开口; 在第一膜的开口的内表面上选择性地形成金属膜; 并且通过使用金属膜作为掩模来处理处理目标。

公开(公告)号：US20150262913A1

公开(公告)日：2015-09-17

申请号：US14484400

申请日：2014-09-12

Applicant: Kabushiki Kaisha Toshiba

Inventor： Satoshi WAKATSUKI ,  Atsuko SAKATA ,  Kengo UCHIDA ,  Kazuyuki HIGASHI ,  Mitsuyoshi ENDO

IPC: H01L23/48 ,  H01L23/00

CPC classification number: H01L23/481 ,  H01L21/76898 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/03002 ,  H01L2224/0345 ,  H01L2224/05541 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05583 ,  H01L2224/05647 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13009 ,  H01L2224/13011 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/14181 ,  H01L2224/94 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01042 ,  H01L2924/01074 ,  H01L2924/206 ,  H01L2924/00014 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2224/1403

Abstract: A semiconductor device including a semiconductor substrate having a first surface and a second surface, the first surface being configured for formation of a semiconductor element; a through hole extending through the semiconductor substrate; and a through electrode disposed in the through hole. The through electrode includes an insulating film disposed along a sidewall of the through hole, a conductive layer comprising a first material disposed along the insulating film, and an electrode layer comprising a second material filled inside the through hole over the conductive layer. The first material is softer than the second material. The second material has a melting point higher than a melting point of the first material. The electrode layer includes a void portion being closed near the second surface of the semiconductor substrate.

Abstract translation: 一种半导体器件，包括具有第一表面和第二表面的半导体衬底，所述第一表面被配置为形成半导体元件; 穿过所述半导体衬底的通孔; 以及设置在通孔中的贯通电极。 贯通电极包括沿着通孔的侧壁设置的绝缘膜，包括沿着绝缘膜设置的第一材料的导电层和包含填充在导电层上方的通孔内的第二材料的电极层。 第一种材料比第二种材料柔软。 第二材料的熔点高于第一材料的熔点。 电极层包括在半导体衬底的第二表面附近封闭的空隙部分。

公开(公告)号：US20140284801A1

公开(公告)日：2014-09-25

申请号：US14018645

申请日：2013-09-05

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Masayuki KITAMURA ,  Atsuko SAKATA ,  Takeshi ISHIZAKI ,  Satoshi WAKATSUKI

IPC: H01L21/768 ,  H01L23/532

CPC classification number: H01L23/53261 ,  H01L21/76877 ,  H01L23/53209 ,  H01L23/53238 ,  H01L23/53257 ,  H01L27/105 ,  H01L2924/0002 ,  H01L2924/00

Abstract: According to an embodiment, a semiconductor device, includes a substrate, an inter-layer insulating layer provided above the substrate, a first interconnect provided in a first trench, and a second interconnect provided in a second trench. The first interconnect is made of a first metal, and the first trench is provided in the inter-layer insulating layer on a side opposite to the substrate. The second interconnect is made of a second metal, and the second trench is provided in the inter-layer insulating layer toward the substrate. A width of the second trench is wider than a width of the first trench. A mean free path of electrons in the first metal is shorter than a mean free path of electrons in the second metal, and the first metal is a metal, an alloy or a metal compound, including at least one nonmagnetic element as a constituent element.

Abstract translation: 根据实施例，半导体器件包括衬底，设置在衬底上的层间绝缘层，设置在第一沟槽中的第一互连以及设置在第二沟槽中的第二互连。 第一互连由第一金属制成，并且第一沟槽设置在与衬底相对的一侧的层间绝缘层中。 第二互连由第二金属制成，并且第二沟槽在层间绝缘层中朝向衬底提供。 第二沟槽的宽度比第一沟槽的宽度宽。 电子在第一金属中的平均自由程短于第二金属中电子的平均自由程，第一金属是包括至少一个非磁性元素作为构成元素的金属，合金或金属化合物。

公开(公告)号：US20170098659A1

公开(公告)日：2017-04-06

申请号：US15071006

申请日：2016-03-15

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Yasuhito YOSHIMIZU ,  Satoshi WAKATSUKI ,  Yohei SATO ,  Keiichi SAWA

IPC: H01L27/115 ,  H01L21/28 ,  H01L21/311 ,  H01L23/528 ,  H01L21/02

CPC classification number: H01L27/11582 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/28282 ,  H01L21/31111 ,  H01L21/764

Abstract: According to one embodiment, the plurality of charge storage films are separated in a stacking direction with a second air gap interposed. The plurality of insulating films are provided on side surfaces of electrode layers opposing the charge storage films, on portions of surfaces of the electrode layers continuous from the side surfaces and opposing a first air gap between the electrode layers, and on corners of the electrode layers between the portions and the side surfaces. The plurality of insulating films are divided in the stacking direction with a third air gap interposed and without the charge storage films being interposed. The third air gap communicates with the first air gap and the second air gap between the first air gap and the second air gap.

公开(公告)号：US20170053869A1

公开(公告)日：2017-02-23

申请号：US14985969

申请日：2015-12-31

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Atsuko SAKATA ,  Takeshi ISHIZAKI ,  Shinya OKUDA ,  Kei WATANABE ,  Masayuki KITAMURA ,  Satoshi WAKATSUKI ,  Daisuke IKENO ,  Junichi WADA ,  Hirotaka OGIHARA

IPC: H01L23/522 ,  H01L23/532 ,  H01L21/3065 ,  H01L27/115 ,  H01L21/768

CPC classification number: H01L21/76879 ,  H01L21/3065 ,  H01L21/76843 ,  H01L21/76864 ,  H01L27/11582 ,  H01L29/7881

Abstract: According to one embodiment, the stacked body includes a plurality of metal films, a plurality of silicon oxide films, and a plurality of intermediate films. The intermediate films are provided between the metal films and the silicon oxide films. The intermediate films contain silicon nitride. Nitrogen composition ratios of the intermediate films are higher on sides of interfaces between the intermediate films and the metal films than on sides of interfaces between the intermediate films and the silicon oxide films. Silicon composition ratios of the intermediate films are higher on sides of interfaces between the intermediate films and the silicon oxide films than on sides of interfaces between the intermediate films and the metal films.

Abstract translation: 根据一个实施例，层叠体包括多个金属膜，多个氧化硅膜和多个中间膜。 中间膜设置在金属膜和氧化硅膜之间。 中间膜含有氮化硅。 在中间膜和金属膜之间的界面侧，中间膜的氮组成比在中间膜和氧化硅膜之间的界面侧更高。 在中间膜和氧化硅膜之间的界面侧，中间膜的硅组成比在中间膜和金属膜之间的界面侧更高。