公开(公告)号：US20170110471A1

公开(公告)日：2017-04-20

申请号：US15046643

申请日：2016-02-18

Applicant: Kabushiki Kaisha Toshiba

Inventor： Yasuhito YOSHIMIZU ,  Masaki TSUJI ,  Akifumi GAWASE

IPC: H01L27/115 ,  H01L29/417 ,  H01L29/40

CPC classification number: H01L27/11582 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157

Abstract: According to one embodiment, the stacked body includes a plurality of electrode layers stacked with an insulator interposed. The semiconductor body extends in a stacking direction through the stacked body. The semiconductor body includes an upper end portion protruding above the stacked body. The stacked film is provided between the semiconductor body and the electrode layers. The stacked film includes a charge storage portion. The conductor is provided at an upper surface and a side surface of the upper end portion of the semiconductor body. The conductor electrically contacts the upper surface and the side surface. The interconnect is provided above the conductor. The interconnect is electrically connected to the conductor.

公开(公告)号：US20160005604A1

公开(公告)日：2016-01-07

申请号：US14481008

申请日：2014-09-09

Applicant: Kabushiki Kaisha Toshiba

Inventor： Yasuhito YOSHIMIZU ,  Mitsuhiro OMURA ,  Hisashi OKUCHI ,  Satoshi WAKATSUKI ,  Tsubasa IMAMURA

IPC: H01L21/033

CPC classification number: H01L21/0338 ,  H01L21/0332 ,  H01L21/0335 ,  H01L21/0337 ,  H01L21/3105 ,  H01L21/31144 ,  H01L21/32051 ,  H01L21/32139 ,  H01L21/76816

Abstract: According to an embodiment, a manufacturing method of a semiconductor device includes: forming a first film on a processing target by using a first material; forming a second film on the first film by using a second material; selectively removing the second and first films to provide an opening pierced in the second and first films; selectively forming a metal film on an inner surface of the opening in the first film; and processing the processing target by using the metal film as a mask.

Abstract translation: 根据实施例，半导体器件的制造方法包括：通过使用第一材料在处理对象上形成第一膜; 通过使用第二材料在所述第一膜上形成第二膜; 选择性地去除第二和第一膜以提供在第二和第一膜中刺穿的开口; 在第一膜的开口的内表面上选择性地形成金属膜; 并且通过使用金属膜作为掩模来处理处理目标。

公开(公告)号：US20170154894A1

公开(公告)日：2017-06-01

申请号：US15185510

申请日：2016-06-17

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Yasuhito YOSHIMIZU ,  Hiroaki YAMADA ,  Yoshinori KITAMURA ,  Yoshihiro OGAWA

IPC: H01L27/115 ,  H01L29/06 ,  H01L21/8234

CPC classification number: H01L27/11582 ,  H01L21/02164 ,  H01L21/02282 ,  H01L21/31111 ,  H01L21/7682 ,  H01L21/823475 ,  H01L21/823481 ,  H01L29/0649

Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes: forming a first film including a conductive material above a semiconductor substrate; forming a second film on the first film; forming a third film including a conductive material on the second film; exposing a part of the second film; and wet etching the second film. In the wet etching, a first and second insulation films are deposited on side surfaces of the first and third films, and part of a space between the first and third films is blocked by the first and second insulation films to form an air gap between the first and third films.

公开(公告)号：US20170141122A1

公开(公告)日：2017-05-18

申请号：US15052140

申请日：2016-02-24

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Yasuhito YOSHIMIZU ,  Akifumi GAWASE ,  Yuya AKEBOSHI

IPC: H01L27/115 ,  H01L29/423 ,  H01L21/768 ,  H01L29/06

CPC classification number: H01L27/11582 ,  H01L21/76877 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/11551 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11575 ,  H01L27/11578 ,  H01L2224/32145

Abstract: According to one embodiment, the plurality of contact vias extend in the stacking direction in the insulating layer, and are in contact with the end parts of the electrode layers. The plurality of second columnar parts extend in the stacking direction in the second stacked part, and include a plurality of second semiconductor bodies being different in length in the stacking direction.

公开(公告)号：US20170062459A1

公开(公告)日：2017-03-02

申请号：US15001991

申请日：2016-01-20

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Yasuhito YOSHIMIZU ,  Akifumi GAWASE ,  Kei WATANABE ,  Shinya ARAI

IPC: H01L27/115 ,  H01L21/28 ,  H01L29/06 ,  H01L21/768 ,  H01L21/764 ,  H01L23/535 ,  H01L29/423 ,  H01L21/306

CPC classification number: H01L27/11582 ,  H01L21/764 ,  H01L23/53295

Abstract: According to one embodiment, a semiconductor device includes a substrate, a stacked body, a second air gap, a first insulating film, a semiconductor film, and a stacked film. The stacked body is provided above the substrate and includes a plurality of electrode films stacked via a first air gap. The second air gap extends in a stacking direction of the stacked body. The second air gap separates the stacked body in a first direction crossing the stacking direction. The first insulating film is provided above the stacked body and covers an upper end of the second air gap. The stacked film is provided between a side surface of the electrode film and a side surface of the semiconductor film opposed to the side surface of the electrode film. The stacked film is in contact with the side surface of the electrode film and the side surface of the semiconductor film.

Abstract translation: 根据一个实施例，半导体器件包括衬底，层叠体，第二气隙，第一绝缘膜，半导体膜和堆叠膜。 层叠体设置在基板上方，并且包括经由第一气隙堆叠的多个电极膜。 第二气隙在层叠体的堆叠方向上延伸。 第二气隙沿与层叠方向交叉的第一方向分离。 第一绝缘膜设置在层叠体的上方并覆盖第二气隙的上端。 叠层膜设置在电极膜的侧表面和与电极膜的侧表面相对的半导体膜的侧表面之间。 层叠膜与电极膜的侧面和半导体膜的侧面接触。

公开(公告)号：US20210407867A1

公开(公告)日：2021-12-30

申请号：US17467839

申请日：2021-09-07

Applicant: KABUSHIKI KAISHA TOSHIBA ,  Kioxia Corporation

Inventor： Fuyuma ITO ,  Yasuhito YOSHIMIZU ,  Nobuhito KUGE ,  Yui KAGI ,  Susumu OBATA ,  Keiichiro MATSUO ,  Mitsuo SANO

IPC: H01L21/66 ,  H01L27/11582

Abstract: A semiconductor wafer includes a surface having at least one recess including an inner wall surface. The inner wall surface is exposed.

公开(公告)号：US20170154785A1

公开(公告)日：2017-06-01

申请号：US15208001

申请日：2016-07-12

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Yasuhito YOSHIMIZU ,  Hiroyasu llMORI ,  Katsuhiro SATO

IPC: H01L21/311 ,  C23F1/16 ,  H01L21/67 ,  H01L27/115 ,  H01L21/02

CPC classification number: H01L21/31144 ,  C23F1/16 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/31111 ,  H01L21/32134 ,  H01L21/32139 ,  H01L21/32155 ,  H01L21/6708 ,  H01L27/11582 ,  H01L28/00

Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes the following processes. Second layers and first layers are alternately stacked on a substrate to form a stack. A mask layer is formed on the first layer in a surface of the stack. A part of the mask layer is removed to expose part of the first layer, and a protective layer is formed in a surface layer of the mask layer. The exposed first layer is etched with a first etching solution to expose part of the second layer after forming the protective layer. The exposed second layer is etched with a second etching solution after etching the first layer. The mask layer is etched with a third etching solution to further expose part of the first layer, after etching the first layer and etching the second layer.

公开(公告)号：US20170098659A1

公开(公告)日：2017-04-06

申请号：US15071006

申请日：2016-03-15

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Yasuhito YOSHIMIZU ,  Satoshi WAKATSUKI ,  Yohei SATO ,  Keiichi SAWA

IPC: H01L27/115 ,  H01L21/28 ,  H01L21/311 ,  H01L23/528 ,  H01L21/02

CPC classification number: H01L27/11582 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/28282 ,  H01L21/31111 ,  H01L21/764

Abstract: According to one embodiment, the plurality of charge storage films are separated in a stacking direction with a second air gap interposed. The plurality of insulating films are provided on side surfaces of electrode layers opposing the charge storage films, on portions of surfaces of the electrode layers continuous from the side surfaces and opposing a first air gap between the electrode layers, and on corners of the electrode layers between the portions and the side surfaces. The plurality of insulating films are divided in the stacking direction with a third air gap interposed and without the charge storage films being interposed. The third air gap communicates with the first air gap and the second air gap between the first air gap and the second air gap.

公开(公告)号：US20140065555A1

公开(公告)日：2014-03-06

申请号：US13787281

申请日：2013-03-06

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Yasuhito YOSHIMIZU ,  Hiroshi TOMITA ,  Hisashi OKUCHI

IPC: G03F7/20

CPC classification number: G03F7/20 ,  G03F7/165 ,  G03F7/40

Abstract: According to one embodiment, a manufacturing method includes forming a desired pattern containing an uneven pattern on a substrate, subjecting the surface of the desired pattern to a water repellent treatment, forming a resist film on the desired pattern, performing an exposure treatment to expose the uneven pattern, rinsing the substrate with water, and drying the substrate.

Abstract translation: 根据一个实施例，一种制造方法包括在衬底上形成包含不均匀图案的期望图案，对期望图案的表面进行拒水处理，在期望图案上形成抗蚀剂膜，进行曝光处理以使曝光 不均匀图案，用水冲洗基板，并干燥基板。

公开(公告)号：US20170263613A1

公开(公告)日：2017-09-14

申请号：US15254014

申请日：2016-09-01

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Atsushi MURAKOSHI ,  Yasuhito YOSHIMIZU ,  Tomofumi INOUE ,  Tatsuya KATO ,  Yuta WATANABE ,  Fumitaka ARAI

IPC: H01L27/115 ,  H01L21/28 ,  H01L29/66 ,  H01L29/792 ,  H01L29/423

CPC classification number: H01L27/1157 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11575 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/42324 ,  H01L29/42328 ,  H01L29/42332 ,  H01L29/4234 ,  H01L29/42348 ,  H01L29/42352 ,  H01L29/66825 ,  H01L29/7926

Abstract: According to one embodiment, a semiconductor device includes a substrate and a semiconductor layer. The device further includes a first electrode layer that is provided on a side surface of the semiconductor layer with a first insulating film interposed therebetween. The device further includes a charge storage layer provided on a side surface of the first electrode layer with the second insulating film interposed therebetween.