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    MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE
    4.
    发明申请
    MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE 有权
    半导体存储器件的制造方法

    公开(公告)号：US20160071857A1

    公开(公告)日：2016-03-10

    申请号：US14657174

    申请日：2015-03-13

    Applicant: KABUSHIKI KAISHA TOSHIBA

    Inventor： Nobuhito KUGE ,  Hiroshi Akahori

    IPC: H01L27/115 ,  H01L21/311

    CPC classification number: H01L27/11524

    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes: forming memory cells and select transistors on a semiconductor substrate configured to select any memory cell, forming a first insulating nitride film, forming a contact, and selectively removing the first insulating nitride film. The first insulating nitride film is formed so as to cover the semiconductor substrate between the select transistors adjacent in the first direction, the select transistors, and the memory cells. The first insulating nitride film is selectively removed in a region other than the region in which the contact is formed and in a region above the select transistors or the memory cells.

    Abstract translation: 根据实施例，半导体器件的制造方法包括：在半导体衬底上形成存储单元和选择晶体管，其被配置为选择任何存储单元，形成第一绝缘氮化物膜，形成接触，以及选择性地去除第一绝缘氮化物 电影。 第一绝缘氮化物膜被形成为覆盖在第一方向相邻的选择晶体管，选择晶体管和存储单元之间的半导体衬底。 在除了形成接触的区域之外的区域中以及在选择晶体管或存储单元上方的区域中选择性地去除第一绝缘氮化物膜。

    SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
    5.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
    半导体存储器件及其制造方法

    公开(公告)号：US20140346585A1

    公开(公告)日：2014-11-27

    申请号：US14018851

    申请日：2013-09-05

    Applicant: Kabushiki Kaisha Toshiba

    Inventor： Nobuhito KUGE ,  Tsukasa NAKAI

    IPC: H01L27/115

    CPC classification number: H01L27/11582 ,  H01L27/11519 ,  H01L29/4234 ,  H01L29/66833 ,  H01L29/7926

    Abstract: According to one embodiment, a semiconductor memory device includes a lower gate layer, a stacked body including a plurality of electrode layers and a plurality of insulating layers, alternately stacked on the lower gate layer, a channel body extending within the stacked body from the topmost electrode layer to the lower gate layer, and a memory film provided between the electrode layer and the channel body. The memory film includes a charge storage film. The electrode layer includes a step portion in which a step is formed in a stacking direction of the stacked body. The channel body and the memory film pass through the step portion.

    Abstract translation: 根据一个实施例，半导体存储器件包括下栅极层，包括交替层叠在下栅极层上的多个电极层和多个绝缘层的堆叠体，从顶部延伸到堆叠体内的沟道本体 电极层到下栅极层，以及设置在电极层和通道体之间的记忆膜。 记忆膜包括电荷存储膜。 电极层包括阶梯部，其中在层叠体的堆叠方向上形成台阶。 通道体和记忆膜通过台阶部。

    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
    6.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 有权
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US20150028409A1

    公开(公告)日：2015-01-29

    申请号：US14149700

    申请日：2014-01-07

    Applicant: KABUSHIKI KAISHA TOSHIBA

    Inventor： Nobuhito KUGE

    IPC: H01L27/115 ,  H01L21/28

    CPC classification number: H01L21/764 ,  H01L21/76289 ,  H01L27/11524 ,  H01L27/11529 ,  H01L29/0649 ,  H01L29/42328 ,  H01L29/4991 ,  H01L29/66825 ,  H01L29/7881

    Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes: a plurality of first semiconductor regions arranged each via a space in a direction crossing a first direction; a plurality of control gate electrodes; and a select gate electrode extending in a second direction, and the select gate electrode aligned with a control gate electrode located on an outermost side out of the plurality of control gate electrodes via the space; a first insulating layer covering the plurality of control gate electrodes and the select gate electrode, the first insulating layer provided on a side wall of the select gate electrode via the space, and a portion of the first insulating layer bridged between adjacent ones of the plurality of control gate electrodes protruding toward the space between adjacent ones of the plurality of control gate electrodes.

    Abstract translation: 根据一个实施例，非易失性半导体存储器件包括：沿与第一方向交叉的方向经由空间布置的多个第一半导体区域; 多个控制栅电极; 以及选择栅电极，其在第二方向上延伸，并且所述选择栅极经由所述空间与位于所述多个控制栅电极中的最外侧的控制栅电极对准; 覆盖所述多个控制栅电极和所述选择栅电极的第一绝缘层，经由所述空间设置在所述选择栅电极的侧壁上的所述第一绝缘层，以及桥接在所述多个控制栅电极和所述选择栅极中的相邻电极之间的所述第一绝缘层的一部分 的控制栅极电极朝向多个控制栅电极中相邻的控制栅电极之间的空间突出。

    APPARATUS FOR INSPECTING SEMICONDUCTOR DEVICE AND METHOD FOR INSPECTING SEMICONDUCTOR DEVICE
    7.
    发明申请
    APPARATUS FOR INSPECTING SEMICONDUCTOR DEVICE AND METHOD FOR INSPECTING SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20220065802A1

    公开(公告)日：2022-03-03

    申请号：US17168491

    申请日：2021-02-05

    Applicant: Kioxia Corporation

    Inventor： Nobuhito KUGE ,  Toshihisa FUJIWARA ,  Yui FUJIWARA ,  Chisaki USUI

    IPC: G01N23/207 ,  G01N23/2055

    Abstract: An apparatus for inspecting a semiconductor device according to an embodiment includes an X-ray irradiation unit configured to make monochromatic X-rays obliquely incident on the semiconductor device, which is an object at a predetermined angle of incidence, a detection unit configured to detect observed X-rays observed from the object using a plurality of two-dimensionally disposed photodetection elements, an analysis apparatus configured to generate X-ray diffraction images obtained by photoelectrically converting the observed X-rays, and a control unit configured to change an angle of incidence and a detection angle of the X-rays, in which the analysis apparatus acquires an X-ray diffraction image every time the angle of incidence is changed, extracts a peak X-ray diffraction image, X-ray intensity of which becomes maximum for each of pixels and compares the peak X-ray diffraction image among the pixels to thereby estimate a stress distribution of the object.

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