公开(公告)号：US20200212203A1

公开(公告)日：2020-07-02

申请号：US16723147

申请日：2019-12-20

Applicant: Infineon Technologies AG

Inventor： Moriz Jelinek ,  Kang Nan Khor ,  Armin Schieber ,  Michael Stadtmueller ,  Wei-Lin Sun

IPC: H01L29/66 ,  H01L21/02 ,  H01L21/3115 ,  H01L21/311 ,  H01L29/423

Abstract: A method of manufacturing a trench oxide in a trench for a gate structure in a semiconductor substrate is described. The method includes: generating the trench in the semiconductor substrate; generating an oxide layer over opposing sidewalls of the trench; damaging at least a portion of the oxide layer by ion implantation; coating the oxide layer with an etching mask; generating at least one opening in the etching mask adjacent to one of the opposing sidewalls; and partly removing the oxide layer by etching the oxide layer beneath the etching mask down to an etching depth at the one of the opposing sidewalls by introducing an etching agent into the opening.

公开(公告)号：US10192955B2

公开(公告)日：2019-01-29

申请号：US15718189

申请日：2017-09-28

Applicant: Infineon Technologies AG

Inventor： Johannes Georg Laven ,  Moriz Jelinek ,  Hans-Joachim Schulze ,  Werner Schustereder ,  Michael Stadtmueller

IPC: H01L29/06 ,  H01L21/324 ,  H01L21/8234 ,  H01L29/739 ,  H01L21/263 ,  H01L21/265 ,  H01L21/322 ,  H01L29/36 ,  H01L29/861 ,  H01L29/167 ,  H01L21/66

Abstract: A method of manufacturing a semiconductor device includes determining information that indicates an extrinsic dopant concentration and an intrinsic oxygen concentration in a semiconductor wafer. On the basis of information about the extrinsic dopant concentration and the intrinsic oxygen concentration as well as information about a generation rate or a dissociation rate of oxygen-related thermal donors in the semiconductor wafer, a process temperature gradient is determined for generating or dissociating oxygen-related thermal donors to compensate for a difference between a target dopant concentration and the extrinsic dopant concentration.

公开(公告)号：US20220157607A1

公开(公告)日：2022-05-19

申请号：US17666654

申请日：2022-02-08

Applicant: Infineon Technologies AG

Inventor： Thomas Aichinger ,  Gerald Rescher ,  Michael Stadtmueller

IPC: H01L21/04 ,  H01L21/02 ,  H01L29/16 ,  H01L29/78 ,  H01L29/66 ,  H01L29/40 ,  H01L29/10

Abstract: A method for forming a wide band gap semiconductor device is provided. The method includes forming a gate insulation layer on a wide band gap semiconductor substrate and annealing the gate insulation layer using at least a first reactive gas species and a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species. The method can include forming a gate electrode on the gate insulation layer after annealing the gate insulation layer.

公开(公告)号：US11127839B2

公开(公告)日：2021-09-21

申请号：US16723147

申请日：2019-12-20

Applicant: Infineon Technologies AG

Inventor： Moriz Jelinek ,  Kang Nan Khor ,  Armin Schieber ,  Michael Stadtmueller ,  Wei-Lin Sun

IPC: H01L29/66 ,  H01L21/02 ,  H01L21/311 ,  H01L21/3115 ,  H01L29/423

Abstract: A method of manufacturing a trench oxide in a trench for a gate structure in a semiconductor substrate is described. The method includes: generating the trench in the semiconductor substrate; generating an oxide layer over opposing sidewalls of the trench; damaging at least a portion of the oxide layer by ion implantation; coating the oxide layer with an etching mask; generating at least one opening in the etching mask adjacent to one of the opposing sidewalls; and partly removing the oxide layer by etching the oxide layer beneath the etching mask down to an etching depth at the one of the opposing sidewalls by introducing an etching agent into the opening.

公开(公告)号：US20190311903A1

公开(公告)日：2019-10-10

申请号：US16374457

申请日：2019-04-03

Applicant: Infineon Technologies AG

Inventor： Thomas Aichinger ,  Gerald Rescher ,  Michael Stadtmueller

IPC: H01L21/04 ,  H01L21/02 ,  H01L29/16 ,  H01L29/10 ,  H01L29/78 ,  H01L29/66 ,  H01L29/40

Abstract: A method for forming a wide band gap semiconductor device is provided. The method includes forming a gate insulation layer on a wide band gap semiconductor substrate and annealing the gate insulation layer using at least a first reactive gas species and a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species. The method can include forming a gate electrode on the gate insulation layer after annealing the gate insulation layer.

公开(公告)号：US11295951B2

公开(公告)日：2022-04-05

申请号：US16374457

申请日：2019-04-03

Applicant: Infineon Technologies AG

Inventor： Thomas Aichinger ,  Gerald Rescher ,  Michael Stadtmueller

IPC: H01L29/40 ,  H01L21/02 ,  H01L21/04 ,  H01L29/16 ,  H01L29/78 ,  H01L29/66 ,  H01L29/10

Abstract: A method for forming a wide band gap semiconductor device is provided. The method includes forming a gate insulation layer on a wide band gap semiconductor substrate and annealing the gate insulation layer using at least a first reactive gas species and a second reactive gas species, wherein the first reactive gas species differs from the second reactive gas species. The method can include forming a gate electrode on the gate insulation layer after annealing the gate insulation layer.

公开(公告)号：US20180019306A1

公开(公告)日：2018-01-18

申请号：US15718189

申请日：2017-09-28

Applicant: Infineon Technologies AG

Inventor： Johannes Georg Laven ,  Moriz Jelinek ,  Hans-Joachim Schulze ,  Werner Schustereder ,  Michael Stadtmueller

IPC: H01L29/06 ,  H01L29/739 ,  H01L21/324 ,  H01L21/8234 ,  H01L21/66

CPC classification number: H01L29/0692 ,  H01L21/263 ,  H01L21/26506 ,  H01L21/3221 ,  H01L21/324 ,  H01L21/8234 ,  H01L22/12 ,  H01L22/14 ,  H01L22/20 ,  H01L29/0878 ,  H01L29/167 ,  H01L29/36 ,  H01L29/7393 ,  H01L29/7802 ,  H01L29/8611

Abstract: A method of manufacturing a semiconductor device includes determining information that indicates an extrinsic dopant concentration and an intrinsic oxygen concentration in a semiconductor wafer. On the basis of information about the extrinsic dopant concentration and the intrinsic oxygen concentration as well as information about a generation rate or a dissociation rate of oxygen-related thermal donors in the semiconductor wafer, a process temperature gradient is determined for generating or dissociating oxygen-related thermal donors to compensate for a difference between a target dopant concentration and the extrinsic dopant concentration.

公开(公告)号：US09825131B2

公开(公告)日：2017-11-21

申请号：US15146459

申请日：2016-05-04

Applicant: Infineon Technologies AG

Inventor： Johannes Georg Laven ,  Moriz Jelinek ,  Hans-Joachim Schulze ,  Werner Schustereder ,  Michael Stadtmueller

IPC: H01L21/00 ,  H01L29/06 ,  H01L21/324 ,  H01L21/8234 ,  H01L29/739

CPC classification number: H01L29/0692 ,  H01L21/263 ,  H01L21/26506 ,  H01L21/3221 ,  H01L21/324 ,  H01L21/8234 ,  H01L22/12 ,  H01L22/14 ,  H01L22/20 ,  H01L29/167 ,  H01L29/36 ,  H01L29/7393 ,  H01L29/8611

Abstract: A method of manufacturing a semiconductor device includes determining information that indicates an extrinsic dopant concentration and an intrinsic oxygen concentration in a semiconductor wafer. On the basis of information about the extrinsic dopant concentration and the intrinsic oxygen concentration as well as information about a generation rate or a dissociation rate of oxygen-related thermal donors in the semiconductor wafer, a process temperature gradient is determined for generating or dissociating oxygen-related thermal donors to compensate for a difference between a target dopant concentration and the extrinsic dopant concentration.

公开(公告)号：US09196675B2

公开(公告)日：2015-11-24

申请号：US14170085

申请日：2014-01-31

Applicant: Infineon Technologies AG

Inventor： Wolfgang Lehnert ,  Michael Stadtmueller ,  Stefan Pompl ,  Markus Meyer

IPC: H01L27/108 ,  H01L29/66 ,  H01L29/94 ,  H01L49/02

CPC classification number: H01L28/60 ,  H01L27/10829 ,  H01L27/10861 ,  H01L29/66181 ,  H01L29/945

Abstract: A method for manufacturing a semiconductor device and a semiconductor device are disclosed. The method comprises forming a trench in a substrate, partially filling the trench with a first semiconductive material, forming an interface along a surface of the first semiconductive material, and filling the trench with a second semiconductive material. The semiconductor device includes a first electrode arranged along sidewalls of a trench and a dielectric arranged over the first electrode. The semiconductor device further includes a second electrode at least partially filling the trench, wherein the second electrode comprises an interface within the second electrode.

Abstract translation: 公开了半导体器件和半导体器件的制造方法。 该方法包括在衬底中形成沟槽，用第一半导体材料部分地填充沟槽，沿着第一半导体材料的表面形成界面，并用第二半导体材料填充沟槽。 半导体器件包括沿着沟槽的侧壁布置的第一电极和布置在第一电极上的电介质。 所述半导体器件还包括至少部分地填充所述沟槽的第二电极，其中所述第二电极包括所述第二电极内的界面。

公开(公告)号：US20140145305A1

公开(公告)日：2014-05-29

申请号：US14170085

申请日：2014-01-31

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Wolfgang Lehnert ,  Michael Stadtmueller ,  Stefan Pompl ,  Markus Meyer

IPC: H01L49/02

CPC classification number: H01L28/60 ,  H01L27/10829 ,  H01L27/10861 ,  H01L29/66181 ,  H01L29/945

Abstract: A method for manufacturing a semiconductor device and a semiconductor device are disclosed. The method comprises forming a trench in a substrate, partially filling the trench with a first semiconductive material, forming an interface along a surface of the first semiconductive material, and filling the trench with a second semiconductive material. The semiconductor device includes a first electrode arranged along sidewalls of a trench and a dielectric arranged over the first electrode. The semiconductor device further includes a second electrode at least partially filling the trench, wherein the second electrode comprises an interface within the second electrode.

Abstract translation: 公开了半导体器件和半导体器件的制造方法。 该方法包括在衬底中形成沟槽，用第一半导体材料部分地填充沟槽，沿着第一半导体材料的表面形成界面，并用第二半导电材料填充沟槽。 半导体器件包括沿着沟槽的侧壁布置的第一电极和布置在第一电极上的电介质。 所述半导体器件还包括至少部分地填充所述沟槽的第二电极，其中所述第二电极包括所述第二电极内的界面。