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公开(公告)号:US20240212564A1
公开(公告)日:2024-06-27
申请号:US17913258
申请日:2021-11-04
Applicant: BOE Technology Group Co., Ltd.
Inventor: Lizhong Wang , Ce Ning , Yunping Di , Binbin Tong , Chengfu Xu , Dapeng Xue , Shuilang Dong , Nianqi Yao
IPC: G09G3/20
CPC classification number: G09G3/2092 , G09G2300/0426 , G09G2300/0842 , G09G2310/0267 , G09G2310/062 , G09G2310/08
Abstract: A display substrate, a manufacturing method thereof and a display apparatus are provided. In the present disclosure, a first transistor group with oxide semiconductor as an active layer material is disposed on a side of a second transistor group with polysilicon as an active layer material away from the base, and an area enclosed by orthographic projections of the transistors in the first transistor group on the base is overlapped with an area enclosed by orthographic projections of the transistors in the second transistor group on the base. Stable performance of the transistors included can be ensured in a manufacturing process of the first transistor group and the second transistor group located in different layers, and at the same time, an area occupied by the driving circuit can be reduced so as to decrease a frame width of a display apparatus or improve resolution of the display apparatus.
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公开(公告)号:US11475833B2
公开(公告)日:2022-10-18
申请号:US16767351
申请日:2019-12-18
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Qingzhao Liu , Guoqiang Wang , Rui Huang , Lizhong Wang , Shuilang Dong , Xinhong Lu
IPC: G09G3/3233 , G09G3/3266 , H01L27/12 , H01L29/78 , H01L31/12
Abstract: The present application discloses a semiconductor apparatus, a pixel circuit and a control method thereof. The semiconductor apparatus comprises: an active layer; a first insulating layer; a first gate and a second gate overlapping with a portion of the active layer with the first insulating layer interposed therebetween, respectively; a first electrode, a second electrode and a third electrode, the first electrode and the second electrode are electrically connected with a first portion and a second portion of the active layer, respectively, the third electrode is used to be electrically connected with a photosensitive device, wherein the third electrode is electrically connected with the first gate or the second gate; or the third electrode is electrically connected with a third portion of the active layer.
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3.
公开(公告)号:US11232750B2
公开(公告)日:2022-01-25
申请号:US16633377
申请日:2019-01-29
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Lizhong Wang , Rui Huang , Yupeng Gao , Jiangnan Lu , Shuilang Dong
IPC: G09G3/3258 , G09G3/3291
Abstract: A display substrate, a display panel, and a manufacturing method and a driving method of a display substrate are provided. The display substrate includes a base substrate, a pixel circuit, and a photosensitive unit. The pixel circuit and the photosensitive unit are on the base substrate, the pixel circuit includes a first transistor, and an orthographic projection of the photosensitive unit on the base substrate at least partially overlaps with an orthographic projection of the first transistor on the base substrate.
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4.
公开(公告)号:US20240234381A9
公开(公告)日:2024-07-11
申请号:US17769825
申请日:2021-06-25
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Xinhong Lu , Xiaoyan Zhu , Chao Liu , Shuilang Dong , Jiushi Wang , Liuqing Li
IPC: H01L25/075 , H01L25/16 , H01L33/62
CPC classification number: H01L25/0753 , H01L25/167 , H01L33/62 , H01L2933/0066
Abstract: A driving substrate, a light-emitting apparatus and a manufacturing method thereof, a splicing display apparatus, the driving substrate includes: a device disposing area, a bending area and a bonding area, the bending area is located between the device disposing area and the bonding area; the driving substrates located in the device disposing area, the bending area, and the bonding area include a buffer layer, a first conductive layer and a flexible dielectric layer that are stacked in sequence; the driving substrates located in the device disposing area and the bonding area further include a base plate disposed at a side of the buffer layer away from the first conductive layer, and a second conductive layer disposed at a side of the flexible dielectric layer away from the first conductive layer; and the driving substrate located in the bending area is configured to be able to bend along a bending axis.
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公开(公告)号:US11938481B2
公开(公告)日:2024-03-26
申请号:US17256077
申请日:2020-06-03
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Qingzhao Liu , Shuilang Dong
CPC classification number: B01L3/502784 , B01L3/502715 , G01N21/59 , B01L2300/0627 , B01L2300/0645 , B01L2300/161 , B01L2400/0439
Abstract: The present disclosure provides a microfluidic substrate, a microfluidic chip and a micro total analysis system. The microfluidic substrate includes a substrate and an ultrasonic structure on the substrate. The ultrasonic structure is configured to generate ultrasonic waves during a droplet splitting process to vibrate a droplet.
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公开(公告)号:US11469261B2
公开(公告)日:2022-10-11
申请号:US16769725
申请日:2019-08-20
Applicant: BOE Technology Group Co., Ltd.
Inventor: Shengguang Ban , Zhanfeng Cao , Ke Wang , Qingzhao Liu , Shuilang Dong
IPC: H01L27/14 , H01L27/144 , G02F1/1362 , H01L27/32 , G02F1/1368
Abstract: An array substrate is provided. The array substrate includes a display area having a first array of subpixels; and a partially transparent area having a second array of subpixels. The partially transparent area includes a plurality of light emitting regions spaced apart from each other by a substantially transparent non-light emitting region. The second array of subpixels is limited in the plurality of light emitting regions. The array substrate further includes a plurality of photosensors and a plurality of first thin film transistors in the substantially transparent non-light emitting region. A respective one of the plurality of photosensors includes a first polarity semiconductor layer, a second polarity semiconductor layer, and an intrinsic semiconductor layer connecting the first polarity semiconductor layer and the second polarity semiconductor layer.
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公开(公告)号:US11327215B2
公开(公告)日:2022-05-10
申请号:US16649651
申请日:2019-03-29
Applicant: BOE Technology Group Co., Ltd.
Inventor: Shuilang Dong , Xiandong Meng , Wenqu Liu , Jifeng Tan , Wei Tan
Abstract: The present disclosure provides a collimating backlight module, a preparation method thereof and a display device. The method for preparing the collimating backlight module includes: providing a light guide plate; forming a protective layer on a light emitting side of the light guide plate, where the protective layer simultaneously covers a light emitting area and a non-light emitting area of the light emitting side, a hollow area is formed on the protective layer, to expose the light emitting area of the light guide plate; and forming a light taking grating on the light emitting area of the light guide plate.
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公开(公告)号:US20210408088A1
公开(公告)日:2021-12-30
申请号:US16769725
申请日:2019-08-20
Applicant: BOE Technology Group Co., Ltd.
Inventor: Shengguang Ban , Zhanfeng Cao , Ke Wang , Qingzhao Liu , Shuilang Dong
IPC: H01L27/144 , H01L27/32 , G02F1/1362
Abstract: An array substrate is provided. The array substrate includes a display area having a first array of subpixels; and a partially transparent area having a second array of subpixels. The partially transparent area includes a plurality of light emitting regions spaced apart from each other by a substantially transparent non-light emitting region. The second array of subpixels is limited in the plurality of light emitting regions. The array substrate further includes a plurality of photosensors and a plurality of first thin film transistors in the substantially transparent non-light emitting region. A respective one of the plurality of photosensors includes a first polarity semiconductor layer, a second polarity semiconductor layer, and an intrinsic semiconductor layer connecting the first polarity semiconductor layer and the second polarity semiconductor layer.
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公开(公告)号:US20240363510A1
公开(公告)日:2024-10-31
申请号:US18580229
申请日:2022-11-24
Applicant: BOE Technology Group Co., Ltd.
Inventor: Liuqing Li , Shuilang Dong , Xinhong Lu , Guoteng Li , Jingshang Zhou , Baoman Li
IPC: H01L23/498 , H01L21/48
CPC classification number: H01L23/49822 , H01L21/4857 , H01L23/4985
Abstract: A chip on film includes: a flexible substrate; and a multilayer wiring structure disposed on the flexible substrate. The multilayer wiring structure includes a first wiring layer, a first insulation layer and a second wiring layer, which are sequentially arranged in a direction towards the flexible substrate the flexible substrate. The first wiring layer includes a first conductive material and the second wiring layer includes a second conductive material. The chip on film further includes: pins, at least part of which are in the first wiring layer; first via holes in the first insulation layer; and a second wire and a second wire leading portion in the second wiring layer, which are electrically connected to each other. More than one pin is electrically connected to the second wire leading portion through more than one first via hole, respectively.
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公开(公告)号:US12127447B2
公开(公告)日:2024-10-22
申请号:US17502052
申请日:2021-10-15
Applicant: BOE Technology Group Co., Ltd.
Inventor: Dapeng Xue , Shuilang Dong , Ke Wang , Zhanfeng Cao
IPC: H01L51/52 , H01L25/075 , H01L25/16 , H01L51/56 , H10K50/858 , H10K59/124 , H10K59/80 , H10K71/00 , H01L33/44
CPC classification number: H10K59/124 , H01L25/0753 , H01L25/167 , H10K50/858 , H10K59/879 , H10K71/00 , H01L33/44
Abstract: A display substrate is provided, which includes a base substrate and a plurality of sub-pixels disposed on the base substrate. At least one sub-pixel includes a light transmittance region and a display region. The display region includes a circuit structure layer and a light-emitting element which are disposed on a base substrate, and the light-emitting element is connected with the circuit structure layer. The display substrate further includes a plurality of insulating layers disposed on the base substrate, and at least one insulating layer is hollowed out in the light transmittance region.
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