Array substrate, manufacturing method thereof, and display apparatus

    公开(公告)号:US11581342B2

    公开(公告)日:2023-02-14

    申请号:US16485286

    申请日:2019-01-07

    发明人: Guoqiang Wang

    IPC分类号: H01L27/144 H01L27/12

    摘要: An array substrate includes a substrate, a protection layer, and a photodiode. The protection layer is disposed over the substrate, has a single layer-structure, and is provided with a through-hole therein. The photodiode includes a lower electrode, a PN junction and an upper electrode, which are sequentially over the substrate. The PN junction is within the through-hole. The protection layer and the PN junction of the photodiode have a substantially same thickness. The array substrate further includes a thin-film transistor over the substrate. An orthographic projection of an active layer of the thin-film transistor on the substrate does not overlap with an orthographic projection of the PN junction of the photodiode on the substrate.

    Pixel structure, liquid crystal display panel, operating method of the same, and display device

    公开(公告)号:US10739642B2

    公开(公告)日:2020-08-11

    申请号:US16569639

    申请日:2019-09-12

    IPC分类号: G02F1/13363 G02F1/1335

    摘要: A pixel structure, a liquid crystal display panel, a method of operating the liquid crystal display panel, and a display device are disclosed. The pixel structure includes a light shutter for switching between first and second states, wherein in the first and second states, the light shutter only allows first polarized light having a first polarization direction and second polarized light having a second polarization direction to pass, respectively; a birefringent filter for causing emergent paths of the first and second polarized light to be first and second paths, respectively; a first liquid crystal unit and a first color filter in the first path and corresponding to a first sub-pixel region, wherein the first color filter is at a light-emergent side of the first liquid crystal unit; and a second liquid crystal unit in the second path and corresponding to a second sub-pixel region.

    PIXEL STRUCTURE, LIQUID CRYSTAL DISPLAY PANEL, OPERATING METHOD OF THE SAME, AND DISPLAY DEVICE

    公开(公告)号:US20200089061A1

    公开(公告)日:2020-03-19

    申请号:US16569639

    申请日:2019-09-12

    IPC分类号: G02F1/13363 G02F1/1335

    摘要: A pixel structure, a liquid crystal display panel, a method of operating the liquid crystal display panel, and a display device are disclosed. The pixel structure includes a light shutter for switching between first and second states, wherein in the first and second states, the light shutter only allows first polarized light having a first polarization direction and second polarized light having a second polarization direction to pass, respectively; a birefringent filter for causing emergent paths of the first and second polarized light to be first and second paths, respectively; a first liquid crystal unit and a first color filter in the first path and corresponding to a first sub-pixel region, wherein the first color filter is at a light-emergent side of the first liquid crystal unit; and a second liquid crystal unit in the second path and corresponding to a second sub-pixel region.

    Inorganic light-emitting diode chip, method for preparing the same, and display substrate

    公开(公告)号:US11522101B2

    公开(公告)日:2022-12-06

    申请号:US16767050

    申请日:2019-12-13

    发明人: Guoqiang Wang

    摘要: The present disclosure provides an inorganic light-emitting diode chip, a method for preparing the same, and a display substrate. The inorganic light-emitting diode chip includes: an undoped gallium nitride layer and a light-emitting unit arranged on the undoped gallium nitride layer, the light-emitting unit includes a first light-emitting subunit including a first N-type gallium nitride layer, a first multi-quantum well layer and a first P-type gallium nitride layer that are sequentially arranged, and a second light-emitting subunit including a second P-type gallium nitride layer, a second multi-quantum well layer and a second N-type gallium nitride layer that are sequentially arranged on a surface of the first P-type gallium nitride layer; an orthogonal projection of the second multi-quantum well layer on the undoped gallium nitride layer is smaller than an orthogonal projection of the first multi-quantum well layer on the undoped gallium nitride layer.

    Semiconductor apparatus, pixel circuit and control method thereof

    公开(公告)号:US11475833B2

    公开(公告)日:2022-10-18

    申请号:US16767351

    申请日:2019-12-18

    摘要: The present application discloses a semiconductor apparatus, a pixel circuit and a control method thereof. The semiconductor apparatus comprises: an active layer; a first insulating layer; a first gate and a second gate overlapping with a portion of the active layer with the first insulating layer interposed therebetween, respectively; a first electrode, a second electrode and a third electrode, the first electrode and the second electrode are electrically connected with a first portion and a second portion of the active layer, respectively, the third electrode is used to be electrically connected with a photosensitive device, wherein the third electrode is electrically connected with the first gate or the second gate; or the third electrode is electrically connected with a third portion of the active layer.

    ARRAY SUBSTRATE, DISPLAY APPARATUS, AND METHOD OF FABRICATING ARRAY SUBSTRATE

    公开(公告)号:US20220199650A1

    公开(公告)日:2022-06-23

    申请号:US17057546

    申请日:2020-03-24

    IPC分类号: H01L27/12

    摘要: An array substrate including a display area having a plurality of subpixels is provided. The plurality of subpixels includes a plurality of first subpixels in a display-bonding sub-area and a plurality of second subpixels in a regular display sub-area. The array substrate includes a plurality of thin film transistors on a first side of the base substrate and respectively in the plurality of subpixels. A respective one of the plurality of first subpixels includes a bonding pad on a second side of a base substrate; a lead line electrically connecting a respective one of a plurality of thin film transistors to the bonding pad; and a via extending through the base substrate. The lead line is unexposed in the array substrate. The lead line extends from the first side to the second side of the base substrate through the via, to connect to the bonding pad.