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公开(公告)号：US12183748B2
公开(公告)日：2024-12-31
申请号：US18518526
申请日：2023-11-23
Applicant: BOE Technology Group Co., Ltd.
Inventor： Ke Wang , Muxin Di , Zhiwei Liang , Guoqiang Wang , Renquan Gu , Xiaoxin Song , Xiaoyan Zhu , Yingwei Liu , Zhanfeng Cao
IPC: H01L27/12
Abstract: An array substrate including a display area having a plurality of subpixels is provided. The plurality of subpixels includes a plurality of first subpixels in a display-bonding sub-area and a plurality of second subpixels in a regular display sub-area. The array substrate includes a plurality of thin film transistors on a first side of the base substrate and respectively in the plurality of subpixels. A respective one of the plurality of first subpixels includes a bonding pad on a second side of a base substrate; a lead line electrically connecting a respective one of a plurality of thin film transistors to the bonding pad; and a via extending through the base substrate. The lead line is unexposed in the array substrate. The lead line extends from the first side to the second side of the base substrate through the via, to connect to the bonding pad.
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公开(公告)号：US20230418122A1
公开(公告)日：2023-12-28
申请号：US18465273
申请日：2023-09-12
Applicant: BOE Technology Group Co., Ltd.
Inventor： Liang Chen , Minghua Xuan , Dongni Liu , Haoliang Zheng , Li Xiao , Zhenyu Zhang , Hao Chen , Ke Wang
IPC: G02F1/1362 , H10K59/131
CPC classification number: G02F1/136286 , H10K59/131
Abstract: The present disclosure discloses a display panel and a display device. The display panel includes: a base substrate, including a plurality of substrate via holes located in a display area of the display panel; and a plurality of driving signal lines and a plurality of bonding terminals, respectively located on different sides of the base substrate. At least one of the plurality of driving signal lines is electrically connected to at least one of the plurality of bonding terminals through the substrate via hole(s).
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3.发明公开公开(公告)号：US20230369551A1
公开(公告)日：2023-11-16
申请号：US18041694
申请日：2022-03-04
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Qi Qi , Ke Wang , Yutao Hao , Jianguo Wang
IPC: H01L33/62 , H01L25/075 , H01L23/00
CPC classification number: H01L33/62 , H01L25/0753 , H01L24/13 , H01L24/16 , H01L2224/13021 , H01L2224/16227 , H01L2924/12041
Abstract: A light emitting module, a method of manufacturing the light emitting module, and a display device are provided. The light emitting module includes: a back frame; a first substrate; an electronic element array disposed on the first substrate, wherein the electronic element array includes a plurality of electronic elements; an encapsulation layer disposed on the first substrate and covering the electronic element array; and a bonding portion disposed between the back frame and the first substrate, wherein the bonding portion includes a first surface facing the back frame and a second surface facing the first substrate, and the first surface and the second surface are oppositely disposed, wherein a material of the first substrate is an organic material, the back frame is in direct contact with the first surface of the bonding portion, and the first substrate is in direct contact with the second surface of the bonding portion.
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公开(公告)号：US11637166B2
公开(公告)日：2023-04-25
申请号：US16651551
申请日：2019-11-13
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yingwei Liu , Qi Yao , Ke Wang , Zhanfeng Cao , Zhiwei Liang , Muxin Di , Guangcai Yuan , Xue Jiang , Dongni Liu
Abstract: The present disclosure relates to a method of manufacturing an array substrate. The method of manufacturing an array substrate may include forming a main via hole in a substrate, filling a first conductive material in the main via hole, and forming a pixel circuit layer on a first surface of the substrate. The pixel circuit layer may include a first via hole. An orthographic projection of the first via hole on the substrate may at least partially overlap the corresponding main via hole.
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公开(公告)号：US11581461B2
公开(公告)日：2023-02-14
申请号：US16917921
申请日：2020-07-01
Applicant: BOE Technology Group Co., Ltd.
Inventor： Zhiwei Liang , Wenqian Luo , Yingwei Liu , Zhanfeng Cao , Ke Wang
Abstract: A display substrate includes a drive substrate and a welding pad provided on the drive substrate and electrically connected with the drive substrate. The display substrate further includes an insulating construction layer provided on the welding pad. The insulating construction layer is provided with a groove for exposing the welding pad. A bonding material is accommodated in the groove, and a micro light emitting diode is electrically connected with the welding pad through the bonding material.
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Patent Agency Ranking
公开(公告)号：US11537018B2
公开(公告)日：2022-12-27
申请号：US17281709
申请日：2020-01-10
Applicant: BOE Technology Group Co., Ltd.
Inventor： Liang Chen , Minghua Xuan , Dongni Liu , Haoliang Zheng , Li Xiao , Zhenyu Zhang , Hao Chen , Ke Wang
IPC: G02F1/1362 , H01L27/32
Abstract: The present disclosure discloses a display panel and a display device. The display panel includes: a base substrate, including a plurality of substrate via holes located in a display area of the display panel; and a plurality of driving signal lines and a plurality of bonding terminals, respectively located on different sides of the base substrate. At least one of the plurality of driving signal lines is electrically connected to at least one of the plurality of bonding terminals through the substrate via hole(s).
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公开(公告)号：US11469261B2
公开(公告)日：2022-10-11
申请号：US16769725
申请日：2019-08-20
Applicant: BOE Technology Group Co., Ltd.
Inventor： Shengguang Ban , Zhanfeng Cao , Ke Wang , Qingzhao Liu , Shuilang Dong
IPC: H01L27/14 , H01L27/144 , G02F1/1362 , H01L27/32 , G02F1/1368
Abstract: An array substrate is provided. The array substrate includes a display area having a first array of subpixels; and a partially transparent area having a second array of subpixels. The partially transparent area includes a plurality of light emitting regions spaced apart from each other by a substantially transparent non-light emitting region. The second array of subpixels is limited in the plurality of light emitting regions. The array substrate further includes a plurality of photosensors and a plurality of first thin film transistors in the substantially transparent non-light emitting region. A respective one of the plurality of photosensors includes a first polarity semiconductor layer, a second polarity semiconductor layer, and an intrinsic semiconductor layer connecting the first polarity semiconductor layer and the second polarity semiconductor layer.
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公开(公告)号：US20210408088A1
公开(公告)日：2021-12-30
申请号：US16769725
申请日：2019-08-20
Applicant: BOE Technology Group Co., Ltd.
Inventor： Shengguang Ban , Zhanfeng Cao , Ke Wang , Qingzhao Liu , Shuilang Dong
IPC: H01L27/144 , H01L27/32 , G02F1/1362
Abstract: An array substrate is provided. The array substrate includes a display area having a first array of subpixels; and a partially transparent area having a second array of subpixels. The partially transparent area includes a plurality of light emitting regions spaced apart from each other by a substantially transparent non-light emitting region. The second array of subpixels is limited in the plurality of light emitting regions. The array substrate further includes a plurality of photosensors and a plurality of first thin film transistors in the substantially transparent non-light emitting region. A respective one of the plurality of photosensors includes a first polarity semiconductor layer, a second polarity semiconductor layer, and an intrinsic semiconductor layer connecting the first polarity semiconductor layer and the second polarity semiconductor layer.
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公开(公告)号：US11171304B2
公开(公告)日：2021-11-09
申请号：US16766849
申请日：2019-12-13
Applicant: BOE Technology Group Co., Ltd.
Inventor： Shengguang Ban , Zhanfeng Cao , Ke Wang
Abstract: Disclosed are a flexible substrate, a preparation method thereof, and a display device, to improve the encapsulation effect and the product yield. The flexible substrate includes: a base substrate, where the base substrate has a plurality of sub-pixel areas arranged in an array, connection areas each for connecting adjacent sub-pixel areas; and hollow areas among the sub-pixel areas and the connection area; in each sub-pixel area, there are a pixel circuit, an isolation structure surrounding the pixel circuit, and a light-emitting functional layer covering the pixel circuit and the isolation structure; the isolation structure has a hollow pattern at a junction of the sub-pixel area and the connection area; the connection area has a signal line therein, and the signal line is electrically connected with the pixel circuit through the hollow pattern; and the isolation structure has an undercut that interrupts the light-emitting functional layer.
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10.发明申请公开(公告)号：US20210074689A1
公开(公告)日：2021-03-11
申请号：US16984511
申请日：2020-08-04
Applicant: BOE Technology Group Co., Ltd.
Inventor： Hsuanwei MAI , Zhanfeng Cao , Ke Wang , Haixu Li , Zhiwei Liang , Zhijun Lv
IPC: H01L25/075 , H01L33/00
Abstract: Disclosed are a transfer carrier and a manufacturing method thereof, and a method for transferring a light-emitting diode chip. The transfer carrier includes: a substrate having a plurality of via holes penetrating a thickness of the substrate, the substrate having a first surface and second surface which are opposite to each other; and thermoplastic structures filling corresponding ones of the via holes, one end of the thermoplastic structures protruding from the second surface of the substrate, and the other end covering a surrounding area on the first surface, of the corresponding via holes.
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