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公开(公告)号:US11968901B2
公开(公告)日:2024-04-23
申请号:US17432433
申请日:2021-02-23
Applicant: BOE Technology Group Co., Ltd.
Inventor: Zhao Cui , Feng Zhang , Zhijun Lv , Wenqu Liu , Liwen Dong , Xiaoxin Song , Detian Meng , Libo Wang , Dongfei Hou , Qi Yao
IPC: H10N30/20 , H10K59/12 , H10K59/122 , H10K59/80 , H10K71/00
CPC classification number: H10N30/20 , H10K59/1201 , H10K59/122 , H10K59/873 , H10K71/00
Abstract: The disclosure provides a displaying substrate, a manufacturing method thereof, and a display panel, and relates to the technical field of display. The displaying substrate comprises a first supporting base (1), plurality of vibrating element modules (2), and a display module (3). The display module (3) comprises display units (31), connecting units (32) and hollowed-out units (33). Each connecting unit (32) is located between two adjacent display units (31). Each hollowed-out unit (33) is located between two adjacent display units (31) except an area where the corresponding connecting unit (32) is located. The hollowed-out units (33) are provided with cavities (40) corresponding to the vibrating element modules (2). Orthographic projections of the hollowed-out units (33) on a reference plane cover orthographic projections of the vibrating element modules (2) on the reference plane. The vibrating element modules (2) and the cavities (40) form a transducer.
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公开(公告)号:US11817307B2
公开(公告)日:2023-11-14
申请号:US16766735
申请日:2019-07-24
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Guangcai Yuan , Zhijun Lv , Haixu Li , Xiaoxin Song , Feng Zhang , Wenqu Liu , Liwen Dong , Zhao Cui , Libo Wang , Detian Meng
CPC classification number: H01L33/38 , H01L24/14 , H01L24/17 , H01L24/81 , H01L33/005 , H01L33/58 , H01L33/62 , H01L2933/0016
Abstract: The present disclosure relates to a display substrate and a method for manufacturing the same. The display substrate includes: a substrate; a first electrode located on the substrate; and a conductive convex located on the first electrode. A dimension of a cross section of the conductive convex along a plane parallel to the substrate is negatively correlated to a distance from the cross section to a surface of the first electrode.
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公开(公告)号:US20220199650A1
公开(公告)日:2022-06-23
申请号:US17057546
申请日:2020-03-24
Applicant: BOE Technology Group Co., Ltd.
Inventor: Ke Wang , Muxin Di , Zhiwei Liang , Guoqiang Wang , Renquan Gu , Xiaoxin Song , Xiaoyan Zhu , Yingwei Liu , Zhanfeng Cao
IPC: H01L27/12
Abstract: An array substrate including a display area having a plurality of subpixels is provided. The plurality of subpixels includes a plurality of first subpixels in a display-bonding sub-area and a plurality of second subpixels in a regular display sub-area. The array substrate includes a plurality of thin film transistors on a first side of the base substrate and respectively in the plurality of subpixels. A respective one of the plurality of first subpixels includes a bonding pad on a second side of a base substrate; a lead line electrically connecting a respective one of a plurality of thin film transistors to the bonding pad; and a via extending through the base substrate. The lead line is unexposed in the array substrate. The lead line extends from the first side to the second side of the base substrate through the via, to connect to the bonding pad.
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公开(公告)号:US12199081B2
公开(公告)日:2025-01-14
申请号:US17299798
申请日:2020-08-31
Applicant: BOE Technology Group Co., Ltd.
Inventor: Wenqu Liu , Feng Zhang , Qi Yao , Zhao Cui , Liwen Dong , Zhijun Lv , Dongfei Hou , Detian Meng , Xiaoxin Song , Libo Wang
Abstract: Provided is a display substrate, which includes a base substrate, a circuit structure layer disposed on the base substrate, multiple ultrasonic sensing elements and multiple micro light-emitting elements. The multiple ultrasonic sensing elements are disposed on a side of the circuit structure layer away from the base substrate, and are electrically connected to the circuit structure layer, and the multiple light-emitting elements are disposed on the side of the circuit structure layer away from the base substrate, and are electrically connected to the circuit structure layer. An orthographic projection of the multiple ultrasonic sensing elements on the base substrate does not overlap with an orthographic projection of the multiple micro light-emitting elements on the base substrate.
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公开(公告)号:US11864415B2
公开(公告)日:2024-01-02
申请号:US17358016
申请日:2021-06-25
Applicant: BOE Technology Group Co., Ltd.
Inventor: Wenqu Liu , Feng Zhang , Qi Yao , Zhao Cui , Xiaoxin Song , Zhijun Lv , Dongfei Hou , Detian Meng , Liwen Dong , Libo Wang , Yang Yue , Haitao Huang , Chuanxiang Xu
IPC: H10K50/858 , H10K59/38 , H10K59/124 , H10K71/00 , H10K59/12
CPC classification number: H10K50/858 , H10K59/124 , H10K59/38 , H10K71/00 , H10K59/1201
Abstract: Provided are a display panel and a preparation method thereof, and a display apparatus. The display panel includes a first display region, and the first display region includes multiple sub-display regions and a first light transmittance region located between adjacent sub-display regions. Each first sub-display region of the multiple sub-display regions includes a first light-emitting element and a first filter unit disposed in a first light-emergence direction of the first light-emitting element. Each second sub-display region in the multiple sub-display regions includes a first collimating light extraction element disposed in a second light-emergence direction of the first light-emitting element and a second filter unit disposed in a light-emergence direction of the first collimating light extraction element.
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公开(公告)号:US11737367B2
公开(公告)日:2023-08-22
申请号:US17039228
申请日:2020-09-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Feng Zhang , Wenqu Liu , Zhijun Lv , Liwen Dong , Xiaoxin Song , Zhao Cui , Detian Meng , Libo Wang
IPC: H01L41/113 , H10N30/30 , H10N30/082 , H10N30/87
CPC classification number: H10N30/302 , H10N30/082 , H10N30/877
Abstract: A piezoelectric device includes: a base having at least one hole, a heat conductive portion disposed in the at least one hole and in contact with a wall of the at least one hole, and at least one piezoelectric sensor disposed on the base. A thermal conductivity of the heat conductive portion is greater than a thermal conductivity of the base. Each piezoelectric sensor includes: a first electrode, a piezoelectric pattern made of a piezoelectric material and a second electrode that are sequentially stacked in a thickness direction of the base.
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公开(公告)号:US11650449B2
公开(公告)日:2023-05-16
申请号:US16964106
申请日:2019-09-03
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Wenqu Liu , Qi Yao , Feng Zhang , Zhijun Lv , Liwen Dong , Xiaoxin Song , Zhao Cui , Detian Meng , Libo Wang , Jifeng Tan , Xiandong Meng
IPC: G02F1/1335 , G02F1/1333 , G02F1/137 , F21V8/00 , G02F1/1337 , G02F1/1343 , G02B6/00 , G02F1/13357
CPC classification number: G02F1/133512 , G02B6/00 , G02B6/005 , G02F1/1337 , G02F1/13439 , G02F1/13756 , G02F1/133357 , G02F1/133603 , G02F1/133607 , G02F1/134309
Abstract: The embodiments of the present disclosure provide a display panel. The display panel includes a first substrate, a second substrate disposed opposite to the first substrate, and a liquid crystal layer between the first substrate and the second substrate, a plurality of first electrodes disposed on a side, close to the second substrate, of the first substrate and spaced apart at intervals, a first dielectric layer for planarizing the plurality of first electrodes, a second dielectric layer disposed on a side, close to the liquid crystal layer, of the first dielectric layer, a light shielding portion disposed on the side, close to the liquid crystal layer, of the second substrate, and a control circuit configured to apply a voltage between the first electrode and the second electrode so that the liquid crystal layer is in a first state or a second state.
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公开(公告)号:US11436856B2
公开(公告)日:2022-09-06
申请号:US16826196
申请日:2020-03-21
Applicant: BOE Technology Group Co., Ltd.
Inventor: Wenqu Liu , Qi Yao , Feng Zhang , Zhijun Lv , Liwen Dong , Xiaoxin Song , Zhao Cui , Detian Meng , Libo Wang , Mingqi Chen , Changzheng Wang
IPC: H01L41/04 , G06V40/13 , H01L41/08 , H01L41/193 , B06B1/06 , H01L41/29 , H01L41/331 , H01L41/45 , H01L41/257
Abstract: Embodiments of the present disclosure provide a method for manufacturing a fingerprint recognition method, a fingerprint recognition module, and a display device. The method for manufacturing the fingerprint recognition module includes: providing a backplane; forming a bonding terminal in a bonding area of the backplane; forming a sensing electrode in a fingerprint recognition area of the backplane; forming an insulation layer cladding the bonding terminal in the bonding area, and forming a piezoelectric material layer in the fingerprint recognition area, where an orthographic projection of the piezoelectric material layer on the backplane coincides with an orthographic projection of the sensing electrode on the backplane; performing polarization processing on the piezoelectric material layer; and peeling off the insulation layer.
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公开(公告)号:US20220037433A1
公开(公告)日:2022-02-03
申请号:US16755643
申请日:2019-05-20
Applicant: BOE Technology Group Co., Ltd.
Inventor: Feng Zhang , Zhijun Lv , Wenqu Liu , Liwen Dong , Xiaoxin Song , Zhao Cui , Detian Meng , Libo Wang , Chuanxiang Xu
Abstract: An array substrate includes a flexible base substrate; a buffer layer on the flexible base substrate and continuously extending from a display area into a peripheral area, including a first portion substantially extending throughout the display area and a second portion in the peripheral area, the first portion and the second portion being parts of an integral layer, an organic insulating layer substantially extending throughout but limited in the display area and on a side of the buffer layer away from the flexible base substrate; an inorganic insulating layer limited in the peripheral area and on a side of the buffer layer away from the flexible base substrate; a planarization layer on a side of the organic insulating layer away from the buffer layer, and a plurality of light emitting elements on a side of the planarization layer away from the organic insulating layer.
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公开(公告)号:US20240088170A1
公开(公告)日:2024-03-14
申请号:US18518526
申请日:2023-11-23
Applicant: BOE Technology Group Co., Ltd.
Inventor: Ke Wang , Muxin Di , Zhiwei Liang , Guoqiang Wang , Renquan Gu , Xiaoxin Song , Xiaoyan Zhu , Yingwei Liu , Zhanfeng Cao
IPC: H01L27/12
CPC classification number: H01L27/124 , H01L27/1251 , H01L27/127
Abstract: An array substrate including a display area having a plurality of subpixels is provided. The plurality of subpixels includes a plurality of first subpixels in a display-bonding sub-area and a plurality of second subpixels in a regular display sub-area. The array substrate includes a plurality of thin film transistors on a first side of the base substrate and respectively in the plurality of subpixels. A respective one of the plurality of first subpixels includes a bonding pad on a second side of a base substrate; a lead line electrically connecting a respective one of a plurality of thin film transistors to the bonding pad; and a via extending through the base substrate. The lead line is unexposed in the array substrate. The lead line extends from the first side to the second side of the base substrate through the via, to connect to the bonding pad.
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