公开(公告)号：US12237344B2

公开(公告)日：2025-02-25

申请号：US18522510

申请日：2023-11-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wei Yang ,  Xinhong Lu

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786 ,  H10K59/121

Abstract: An OLED display device including a display area is provided. A first and second thin film transistors (TFTs) are arranged in the display area, the first TFT includes a first active layer, the second TFT includes a second active layer, a material of the first active layer is different from that of the second active layer. The OLED display device includes a substrate, the second active layer, a second gate of the second TFT, the first active layer, a first gate of the first TFT, a first source and drain of the first TFT, a second source and drain of the second TFT, a first data line in a same layer as the second source and drain, a first planarization layer on the first data line, and a second data line on the first planarization layer and electrically insulated from the first data line.

公开(公告)号：US12213372B2

公开(公告)日：2025-01-28

申请号：US17732781

申请日：2022-04-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wei Yang ,  Guangcai Yuan ,  Ce Ning ,  Xinhong Lu ,  Tianmin Zhou ,  Xin Yang

IPC: H01L51/00 ,  H10K59/124 ,  H10K59/131 ,  H10K77/10

Abstract: The present disclosure relates to an OLED display panel and display device. The OLED display panel includes: a display area, a bending area and a bonding area for bonding a circuit board, wherein the display panel further includes: a base substrate; a first semiconductor pattern on the base substrate; a first insulating layer group on the first semiconductor pattern; a second semiconductor pattern on the first insulating layer group; a second insulating layer group on the second semiconductor pattern; first via holes in the first insulating layer group and the second insulating layer group; second via holes in the second insulating layer group, wherein the display panel further includes: a first groove located in the bending area and having a depth substantially identical to that of the first via holes; and a metal trace, connecting a trace in the display area to the circuit board.

公开(公告)号：US20240234381A9

公开(公告)日：2024-07-11

申请号：US17769825

申请日：2021-06-25

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xinhong Lu ,  Xiaoyan Zhu ,  Chao Liu ,  Shuilang Dong ,  Jiushi Wang ,  Liuqing Li

IPC: H01L25/075 ,  H01L25/16 ,  H01L33/62

CPC classification number: H01L25/0753 ,  H01L25/167 ,  H01L33/62 ,  H01L2933/0066

Abstract: A driving substrate, a light-emitting apparatus and a manufacturing method thereof, a splicing display apparatus, the driving substrate includes: a device disposing area, a bending area and a bonding area, the bending area is located between the device disposing area and the bonding area; the driving substrates located in the device disposing area, the bending area, and the bonding area include a buffer layer, a first conductive layer and a flexible dielectric layer that are stacked in sequence; the driving substrates located in the device disposing area and the bonding area further include a base plate disposed at a side of the buffer layer away from the first conductive layer, and a second conductive layer disposed at a side of the flexible dielectric layer away from the first conductive layer; and the driving substrate located in the bending area is configured to be able to bend along a bending axis.

公开(公告)号：US20230028746A1

公开(公告)日：2023-01-26

申请号：US17781850

申请日：2021-05-17

Applicant: BOE Technology Group Co., Ltd.

Inventor： Ming Yang ,  Zhenyu Zhang ,  Minghua Xuan ,  Feifei Wang ,  Xinhong Lu

IPC: H01L27/12 ,  H01L25/16 ,  G09G3/32

Abstract: A light-emitting substrate and a display device are provided. Each light-emitting unit includes a first voltage terminal. The first voltage line includes a first portion, a first connecting portion, and a second portion. The first portion is electrically connected with first voltage terminals of a first row to a Y-th row of light-emitting units in a corresponding column. An extension direction of a second portion of the first voltage line has an included angle with both the first direction and the second direction. The first connecting portion is at boundary of the Y-th row and a (Y+1)-th row of light-emitting units. The first transmission line is electrically connected with first voltage terminals of the (Y+1)-th row to an N-th row of light-emitting units in a corresponding column, and is electrically connected with the first connecting portion of the first voltage line corresponding to light-emitting units of a corresponding column.

公开(公告)号：US10818694B2

公开(公告)日：2020-10-27

申请号：US16166356

申请日：2018-10-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wei Yang ,  Hehe Hu ,  Xinhong Lu

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/66 ,  H01L27/32

Abstract: The present disclosure relates to array substrate, preparation method thereof and display panel. An array substrate comprises: a first thin film transistor and a second thin film transistor over a substrate; wherein the first thin film transistor comprises a first portion of a first insulating layer, the first insulating layer comprises a first recess corresponding to the second thin film transistor, and the second thin film transistor is located in the first recess; and wherein a thickness of a second portion of the first insulating layer, which is below the bottom of the first recess, is smaller than that of the first portion of the first insulating layer.

公开(公告)号：US20240363510A1

公开(公告)日：2024-10-31

申请号：US18580229

申请日：2022-11-24

Applicant: BOE Technology Group Co., Ltd.

Inventor： Liuqing Li ,  Shuilang Dong ,  Xinhong Lu ,  Guoteng Li ,  Jingshang Zhou ,  Baoman Li

IPC: H01L23/498 ,  H01L21/48

CPC classification number: H01L23/49822 ,  H01L21/4857 ,  H01L23/4985

Abstract: A chip on film includes: a flexible substrate; and a multilayer wiring structure disposed on the flexible substrate. The multilayer wiring structure includes a first wiring layer, a first insulation layer and a second wiring layer, which are sequentially arranged in a direction towards the flexible substrate the flexible substrate. The first wiring layer includes a first conductive material and the second wiring layer includes a second conductive material. The chip on film further includes: pins, at least part of which are in the first wiring layer; first via holes in the first insulation layer; and a second wire and a second wire leading portion in the second wiring layer, which are electrically connected to each other. More than one pin is electrically connected to the second wire leading portion through more than one first via hole, respectively.

公开(公告)号：US11926499B2

公开(公告)日：2024-03-12

申请号：US17631090

申请日：2021-04-09

Applicant: BOE Technology Group Co., Ltd.

Inventor： Shuqi Liu ,  Xinhong Lu ,  Wenyue Fu ,  Haoran Gao ,  Guangcai Yuan ,  Li Li ,  Shaodong Sun ,  Song Fang ,  Dongfeng Du ,  Qi Qi

IPC: B65H45/16 ,  B05C5/02 ,  B05C9/12 ,  B05C13/02 ,  B65H45/30

CPC classification number: B65H45/16 ,  B05C5/0212 ,  B05C9/12 ,  B05C13/02 ,  B65H45/30

Abstract: A folding device is provided. The folding device includes a bearing and fixing mechanism (1) configured to bear and fix a main body portion (21) of a to-be-folded device (2); a folding mechanism (3) located on at least one side of the bearing and fixing mechanism (1), the folding mechanism (3) being rotatably connected to the bearing and fixing mechanism (1) and configured to bear and fix a to-be-folded portion (22) of the to-be-folded device (2); and a driving mechanism (4) connected to the folding mechanism (3), the driving mechanism (4) being configured to drive the folding mechanism (3) to turn relative to the bearing and fixing mechanism (1), so as to fold the to-be-folded portion (22) to a side in a thickness direction of the main body portion (21). The folding device can fold automatically, and manual folding is avoided.

公开(公告)号：US11646327B2

公开(公告)日：2023-05-09

申请号：US17328393

申请日：2021-05-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wei Yang ,  Xinhong Lu

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786 ,  H10K59/121

CPC classification number: H01L27/1255 ,  H01L27/124 ,  H01L27/1225 ,  H01L27/1251 ,  H01L27/1259 ,  H01L29/66757 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78675 ,  H10K59/1213 ,  H10K59/1216

Abstract: A display device is disclosed. The display device includes a display area and a wiring area. The display area is disposed with a first thin film transistor which is an oxide thin film transistor and a second thin film transistor which is a low temperature poly-silicon thin film transistor. A distance between a first active layer of the first thin film transistor and a substrate is different from a distance between a second active layer of the second thin film transistor and the substrate. The first thin film transistor includes first vias that receive a first source/drain. The second thin film transistor includes second vias that receives a second source/drain. The wiring area is provided with a groove. The groove includes a first sub-groove and a second sub-groove that are stacked, and depths of the second vias are substantially equal to a depth of the second sub-groove.

公开(公告)号：US11257849B2

公开(公告)日：2022-02-22

申请号：US16531231

申请日：2019-08-05

Applicant: BOE Technology Group Co., Ltd.

Inventor： Wei Yang ,  Guangcai Yuan ,  Ce Ning ,  Xinhong Lu

IPC: H01L29/10 ,  H01L27/12

Abstract: A display panel and a method for fabricating the same are provided. The display panel includes: a base substrate; a first thin film transistor on one side of the base substrate, the first thin film transistor comprising: a first active layer, a first protection layer, a second protection layer, a first source and a first drain; wherein the first protection layer and the second protection layer are on one side of the first active layer away from the base substrate, and are separated from each other; the first protection layer and the second protection layer are configured to protect the first active layer from being etched during forming of a via-hole corresponding to the first source and/or a via-hole corresponding to the first drain.

公开(公告)号：US20200091263A1

公开(公告)日：2020-03-19

申请号：US16556342

申请日：2019-08-30

Applicant: BOE Technology Group Co., Ltd.

Inventor： Ke Wang ,  Xinhong Lu ,  Hehe Hu ,  Wei Yang ,  Ce Ning

IPC: H01L27/32 ,  H01L27/12 ,  H01L29/417 ,  H01L29/423 ,  H01L29/40

Abstract: The present discloses an array substrate and a manufacturing method thereof, and a display device. The array substrate includes a first transistor and a second transistor. The first transistor includes a first active layer, a first gate, a first source and a first drain. The second transistor includes a second active layer, a second gate, a second source and a second drain. An orthographic projection of the second source on the base substrate and an orthographic projection of the second drain on the base substrate at least partially overlap. One of the second source and the second drain is in the same layer as and made from the same material as the first gate. The first source and the first drain are in the same layer as and made from the same material as the other of the second source and the second drain.