公开(公告)号：US12235558B2

公开(公告)日：2025-02-25

申请号：US18017413

申请日：2022-03-31

Applicant: BOE Technology Group Co., Ltd.

Inventor： Yunping Di ,  Lizhong Wang ,  Ce Ning ,  Binbin Tong ,  Liping Lei ,  Jianbo Xian

IPC: G02F1/1368 ,  G02F1/1362 ,  H01L27/12

Abstract: Provided is a substrate. The substrate includes a base substrate; and a plurality of sub-pixel structures arranged in an array on the base substrate, wherein the sub-pixel structure comprises: a thin film transistor disposed on the base substrate, the thin film transistor comprising a source and a drain; an insulating layer disposed on a side of the thin film transistor distal from the base substrate, a first via hole being formed in the insulating layer; a pixel electrode disposed on a side of the insulating layer distal from the base substrate, the pixel electrode being electrically connected to either the source or the drain through the first via hole; and a filling block disposed at the first via hole.

公开(公告)号：US12106728B2

公开(公告)日：2024-10-01

申请号：US17908359

申请日：2021-08-31

Applicant: BOE Technology Group Co., Ltd.

Inventor： Lizhong Wang ,  Guangcai Yuan ,  Ce Ning ,  Hehe Hu ,  Nianqi Yao ,  Xin Xie ,  Yifang Huang ,  Liping Lei ,  Chen Xu

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2310/0286

Abstract: A display substrate and a display panel are provided, the display substrate includes a first gate driver circuit and a second gate driver circuit that are respectively arranged on a first side and a second side of a display region; the first gate driver circuit includes a plurality of first shift register units arranged in a first direction, each first shift register unit includes a first thin film transistor; the second gate driver circuit includes a plurality of second shift register units arranged in the first direction, each second shift register unit includes a second thin film transistor having the same function as the first thin film transistor; an average turn-on current of at least one first thin film transistor is Ion1, and an average turn-on current of at least one second thin film transistor is Ion2, Ion1>Ion2.

公开(公告)号：US11534755B2

公开(公告)日：2022-12-27

申请号：US16755911

申请日：2019-04-16

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ce Ning ,  Xiaochen Ma ,  Hehe Hu ,  Guangcai Yuan ,  Xin Gu

IPC: B01L3/00

Abstract: The present disclosure relates to a micro-channel device. The micro-channel device may include a micro-channel structure and a semiconductor junction. The micro-channel structure may include a base layer, a plurality of rails distributed on the base layer at intervals, and a cover layer comprising a plurality of columns. The cover layer and the base layer are configured to form a plurality of micro-channels. The semiconductor junction may include a P-type semiconductor layer, an intrinsic semiconductor layer and a N-type semiconductor layer stacked in a first direction.

公开(公告)号：US11257849B2

公开(公告)日：2022-02-22

申请号：US16531231

申请日：2019-08-05

Applicant: BOE Technology Group Co., Ltd.

Inventor： Wei Yang ,  Guangcai Yuan ,  Ce Ning ,  Xinhong Lu

IPC: H01L29/10 ,  H01L27/12

Abstract: A display panel and a method for fabricating the same are provided. The display panel includes: a base substrate; a first thin film transistor on one side of the base substrate, the first thin film transistor comprising: a first active layer, a first protection layer, a second protection layer, a first source and a first drain; wherein the first protection layer and the second protection layer are on one side of the first active layer away from the base substrate, and are separated from each other; the first protection layer and the second protection layer are configured to protect the first active layer from being etched during forming of a via-hole corresponding to the first source and/or a via-hole corresponding to the first drain.

公开(公告)号：US11245008B2

公开(公告)日：2022-02-08

申请号：US16642522

申请日：2019-07-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaochen Ma ,  Guangcai Yuan ,  Ce Ning ,  Hehe Hu ,  Xin Gu

IPC: H01L29/10 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  G01N27/414 ,  H01L29/786

Abstract: The present application provides a TFT, a manufacturing method thereof, and a sensor. The TFT includes a substrate, and a source, a drain and an active layer on the substrate. The active layer includes a microchannel, and the thin film transistor is configured to detect a sample in the microchannel. When a sample to be detected enters the microchannel, the electron distribution in the active layer would be affected, which causes fluctuations in the TFT characteristics. By detecting such fluctuations, detecting the composition and property of the liquid to be detected may be achieved. Moreover, by virtue of the microchannel, the sample may be precisely controlled. The impact of the external environment may be reduced and the detection accuracy can be enhanced. Continuous monitoring instead of one-time detection of the sample may be achieved and the sample detection efficiency may be improved.

公开(公告)号：US20210226064A1

公开(公告)日：2021-07-22

申请号：US16959179

申请日：2019-11-19

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xiaochen Ma ,  Guangcai Yuan ,  Ce Ning ,  Xin Gu ,  Hehe Hu

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/417

Abstract: Provided are a thin film transistor including: a base cushion layer having a recessed portion, base insulating layer, source-drain layer and active layer. The base insulating layer is located on a side of the base cushion layer where the recessed portion is located, and has a first and second partition walls that are spaced apart, and an orthographic projection region of a gap region between the first and second partition walls onto the base cushion layer is located at a region where the recessed portion is located; and both orthographic projection regions of the first and second partition walls onto the base cushion layer partially overlap with the recessed portion region; and both the source-drain layer and the active layer are located on the side of the base insulating layer away from the base cushion layer.

公开(公告)号：US11024657B2

公开(公告)日：2021-06-01

申请号：US16318740

申请日：2018-04-02

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhengliang Li ,  Ce Ning ,  Song Liu ,  Wenlin Zhang ,  Xuefei Sun

IPC: H01L27/12

Abstract: The present disclosure provides a transistor, an array substrate and a method of manufacturing the array substrate, and a display device. The method of manufacturing the array substrate comprises: depositing a plurality of silicon oxide layers on an active layer of a transistor; and depositing a silicon oxynitride layer over the plurality of silicon oxide layers.

公开(公告)号：US20200091263A1

公开(公告)日：2020-03-19

申请号：US16556342

申请日：2019-08-30

Applicant: BOE Technology Group Co., Ltd.

Inventor： Ke Wang ,  Xinhong Lu ,  Hehe Hu ,  Wei Yang ,  Ce Ning

IPC: H01L27/32 ,  H01L27/12 ,  H01L29/417 ,  H01L29/423 ,  H01L29/40

Abstract: The present discloses an array substrate and a manufacturing method thereof, and a display device. The array substrate includes a first transistor and a second transistor. The first transistor includes a first active layer, a first gate, a first source and a first drain. The second transistor includes a second active layer, a second gate, a second source and a second drain. An orthographic projection of the second source on the base substrate and an orthographic projection of the second drain on the base substrate at least partially overlap. One of the second source and the second drain is in the same layer as and made from the same material as the first gate. The first source and the first drain are in the same layer as and made from the same material as the other of the second source and the second drain.

公开(公告)号：US10510784B2

公开(公告)日：2019-12-17

申请号：US15110416

申请日：2015-10-13

Applicant: BOE Technology Group Co., Ltd.

Inventor： Ce Ning ,  Fangzhen Zhang

IPC: H01L29/66 ,  H01L27/12 ,  H01L21/28 ,  H01L21/84 ,  H01L21/30 ,  H01L21/768 ,  H01L29/786 ,  H01L29/417 ,  H01L29/45 ,  H01L29/49

Abstract: The present disclosure provides an array substrate and a method of manufacturing the same and a display apparatus in which the array substrate is applied. In one embodiment, the method of manufacturing an array substrate at least includes the steps of: forming a first electrode layer, a metal gate layer and a first layer of non-oxide insulation material, the first layer of non-oxide insulation material being formed on an upper surface of the metal gate layer; forming, by using one patterning process, a pattern including a first electrode and a gate such that, after completion of the patterning process, a first non-oxide insulation layer is further formed on the gate and a first sub-electrode belonging to the first electrode layer is further formed below the gate. This method of manufacturing the array substrate is simple, which facilitates mass production of the array substrate as well as the display apparatus.

公开(公告)号：US10403761B2

公开(公告)日：2019-09-03

申请号：US15086857

申请日：2016-03-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ce Ning ,  Wei Yang ,  Xiaohu Li

IPC: H01L21/84 ,  H01L29/786 ,  H01L29/66 ,  H01L29/423 ,  H01L29/49 ,  H01L29/24 ,  H01L21/027 ,  H01L29/45 ,  H01L27/12 ,  H01L29/22

Abstract: An array substrate and a manufacturing method thereof, and a display device are provided. The manufacturing method comprises: forming a first gate metal pattern on a base substrate; forming a gate insulating layer, a first active layer pattern and a source-drain metal pattern on the base substrate on which the first gate metal pattern is formed; forming a first protective layer pattern and a through hole pattern on the base substrate on which the source-drain metal pattern is formed; and forming a second active layer pattern and a pixel electrode pattern on the base substrate on which the first protective layer pattern is formed. Embodiments of the present disclosure solve problems of poor display performance and high cost of the array substrate and achieve effects of improving the display performance and reducing the cost.