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    SELECTIVE CAPPING FOR GATE-ALL-AROUND FIELD EFFECT TRANSISTORS
    3.
    发明申请
    SELECTIVE CAPPING FOR GATE-ALL-AROUND FIELD EFFECT TRANSISTORS 有权

    公开(公告)号：US20250079239A1

    公开(公告)日：2025-03-06

    申请号：US18459524

    申请日：2023-09-01

    Applicant: Applied Materials, Inc.

    Inventor： Jiang LU ,  Shumao ZHANG ,  Liqi WU ,  Yiyang WAN ,  Weifeng YE ,  Jianqiu GUO ,  Dong WANG ,  Qihao ZHU

    IPC: H01L21/768 ,  H01L21/3205

    Abstract: Embodiments of the disclosure include a method of forming a gate-all-around (GAA) contact structure on a semiconductor substrate. The method will include removing material from surfaces of a feature formed in a surface of a substrate that includes a plurality of features that each include a plurality of source/drain contact surfaces, selectively forming a reaction product material over a surface of each of the plurality of source/drain contact surfaces, heating the substrate to a first temperature to remove the reaction product material from the surface of each of the plurality of contacts, selectively forming a first metal layer on the surface of each of the plurality of contacts, selectively forming a second metal layer on the first metal layer, and filling the feature with a conductor material, wherein the conductor material comprises tungsten (W) or molybdenum (Mo).

    METHOD OF FORMING A MEOL CONTACT STRUCTURE
    5.
    发明申请
    METHOD OF FORMING A MEOL CONTACT STRUCTURE 有权

    公开(公告)号：US20240379768A1

    公开(公告)日：2024-11-14

    申请号：US18196833

    申请日：2023-05-12

    Applicant: Applied Materials, Inc.

    Inventor： Shumao ZHANG ,  Le ZHANG ,  Weifeng YE ,  Chih-Hsun HSU ,  David T. OR ,  Gary HOW ,  Yiyang WAN ,  Liqi WU ,  Jiang LU

    IPC: H01L29/40 ,  H01L21/02 ,  H01L21/768

    Abstract: Embodiments of the disclosure include a method of forming contact structure on a semiconductor substrate. The method includes treating a native oxide layer formed on a contact junction, wherein treating the native oxide layer forms a silica salt layer on the contact junction disposed within a contact feature that includes one or more surfaces that comprise silicon nitride. Then exposing the silica salt layer and the one or more surfaces to a plasma comprising oxygen, wherein the plasma forms a silicon oxynitride material on the one or more surfaces. Then removing the second silica salt layer, selectively forming a metal silicide layer on the contact junction, and then filling the contact feature with a metal, wherein filling the feature comprises selectively depositing a metal layer over the selectively formed metal silicide layer.

    METHODS FOR FORMING LOW RESISTIVITY CONTACTS
    9.
    发明申请
    METHODS FOR FORMING LOW RESISTIVITY CONTACTS 有权

    公开(公告)号：US20240379363A1

    公开(公告)日：2024-11-14

    申请号：US18582977

    申请日：2024-02-21

    Applicant: Applied Materials, Inc.

    Inventor： Jianqiu GUO ,  Dong WANG ,  Shumao ZHANG ,  Liqi WU ,  ShihChung CHEN ,  Jiang LU

    IPC: H01L21/28

    Abstract: Methods are provided. In some embodiments, a method of forming a contact structure on a semiconductor substrate includes disposing a selective metal silicide layer on a surface of a contact structure by maintaining a first temperature of a substrate and providing a first carrier gas, a first metal-containing precursor, and a first hydrogen-containing precursor to a first deposition chamber. The method includes disposing a partially selective metal layer on a surface of the selective metal silicide layer and one or more surfaces of a cavity by maintaining a second temperature of the substrate and providing a second carrier gas, a second metal-containing precursor, and a reducing agent to the first deposition chamber or a second deposition chamber. The second metal-containing precursor and the reducing agent are introduced to the first deposition chamber or the second deposition chamber at a chamber pressure of about 50 T to about 150 T.

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