公开(公告)号：US20240186181A1

公开(公告)日：2024-06-06

申请号：US18074335

申请日：2022-12-02

Applicant: Applied Materials, Inc.

Inventor： Ge QU ,  Qihao ZHU ,  Zheng JU ,  Yang ZHOU ,  Jiajie CEN ,  Feng Q. LIU ,  Zhiyuan WU ,  Feng CHEN ,  Kevin KASHEFI ,  Xianmin TANG ,  Jeffrey W. ANTHIS ,  Mark Joseph SALY

IPC: H01L21/768 ,  H01L21/3205

CPC classification number: H01L21/76849 ,  H01L21/32051 ,  H01L21/76877

Abstract: Methods to deposit a metal cap for an interconnect are disclosed. In embodiments, a method comprises contacting the substrate with an alkyl halide and a ruthenium metal precursor to form a metal cap for an interconnect.

公开(公告)号：US20250054767A1

公开(公告)日：2025-02-13

申请号：US18646055

申请日：2024-04-25

Applicant: Applied Materials, Inc.

Inventor： Qihao ZHU ,  Shumao ZHANG ,  Weifeng YE ,  Yiyang WAN ,  Gary HOW ,  Jianqiu GUO ,  Dong WANG ,  Shihchung CHEN ,  Liqi WU ,  Jiang LU

IPC: H01L21/285 ,  C23C16/02 ,  C23C16/04 ,  C23C16/14 ,  C23C16/42 ,  C23C16/455 ,  C23C16/50 ,  C23C16/52 ,  H01J37/32 ,  H01L21/02 ,  H01L21/768

Abstract: Embodiments include a method of forming a contact structure on a semiconductor substrate. The method including selectively depositing a metal silicide layer over a contact formed within a cavity of a substrate and a bottom surface of the cavity using a selective deposition process, including forming a residual layer on a surface of a dielectric layer forming sidewalls of the cavity, wherein a thickness of the metal silicide layer deposited over the contact is greater than a thickness of the residual layer, removing at least a portion of the residual layer formed on the dielectric layer using an etching process that comprises exposing the metal selectively deposited layer to a metal halide containing precursor, and selectively depositing a metal fill over the metal silicide layer remaining over the contact after removing the at least the portion of the residual layer using a selective metal fill process.

公开(公告)号：US20250112091A1

公开(公告)日：2025-04-03

申请号：US18899407

申请日：2024-09-27

Applicant: Applied Materials, Inc.

Inventor： Jianqiu GUO ,  Dong WANG ,  Liqi WU ,  Yiyang WAN ,  Shumao ZHANG ,  Qihao ZHU ,  Weifeng YE ,  Jiang LU ,  Shihchung CHEN

IPC: H01L21/768 ,  C23C16/02 ,  C23C16/42 ,  C23C16/455 ,  H01J37/32 ,  H01L21/285 ,  H01L23/532

Abstract: A contact structure includes a cavity comprising a device contact formed on a surface of a substrate, a bottom surface, and sidewalls. A metal silicide layer disposed over the surface of the device contact, the bottom surface, and the sidewalls of the cavity, and a treated surface formed over a portion of the metal silicide layer disposed over the sidewalls of the cavity.

公开(公告)号：US20250079239A1

公开(公告)日：2025-03-06

申请号：US18459524

申请日：2023-09-01

Applicant: Applied Materials, Inc.

Inventor： Jiang LU ,  Shumao ZHANG ,  Liqi WU ,  Yiyang WAN ,  Weifeng YE ,  Jianqiu GUO ,  Dong WANG ,  Qihao ZHU

IPC: H01L21/768 ,  H01L21/3205

Abstract: Embodiments of the disclosure include a method of forming a gate-all-around (GAA) contact structure on a semiconductor substrate. The method will include removing material from surfaces of a feature formed in a surface of a substrate that includes a plurality of features that each include a plurality of source/drain contact surfaces, selectively forming a reaction product material over a surface of each of the plurality of source/drain contact surfaces, heating the substrate to a first temperature to remove the reaction product material from the surface of each of the plurality of contacts, selectively forming a first metal layer on the surface of each of the plurality of contacts, selectively forming a second metal layer on the first metal layer, and filling the feature with a conductor material, wherein the conductor material comprises tungsten (W) or molybdenum (Mo).

公开(公告)号：US20240363407A1

公开(公告)日：2024-10-31

申请号：US18309669

申请日：2023-04-28

Applicant: Applied Materials, Inc.

Inventor： Jie ZHANG ,  Liqi WU ,  Cory LAFOLLETT ,  Tsung-Han YANG ,  Wei WENG ,  Qihao ZHU ,  Jiang LU ,  Rongjun WANG ,  Xianmin TANG

IPC: H01L21/768 ,  H01L21/02

CPC classification number: H01L21/76877 ,  H01L21/02274 ,  H01L21/76843 ,  H01L21/76865 ,  H01L21/76883

Abstract: Embodiments of the present disclosure generally relate to a method for forming an electrically conductive feature on a substrate. In one embodiment, the method includes forming a first conductive layer via physical vapor deposition (PVD) in an opening of a substrate. The first conductive layer has a thickness of less than 20 angstroms. The method further includes forming a second conductive layer via PVD on the first conductive layer. The first conductive layer and the second conductive layer are formed at a temperature of less than 50° C. The method further includes annealing at least a portion of the first conductive layer and the second conductive layer.

公开(公告)号：US20250157824A1

公开(公告)日：2025-05-15

申请号：US18947949

申请日：2024-11-14

Applicant: Applied Materials, Inc.

Inventor： Shumao ZHANG ,  Qihao ZHU ,  Liqi WU ,  Chih-Hsun HSU ,  Jiang LU ,  Rongjun WANG

IPC: H01L21/285 ,  C23C16/455 ,  C23C16/458 ,  C23C16/52 ,  H01L21/02

Abstract: Embodiments of the present disclosure generally relate to methods and processes for selectively depositing a metal fill layer into a feature on the surface of a semiconductor structure. In some embodiments, a method of forming a contact structure includes performing a preclean operation on a contact structure to form a precleaned contact structure. The contact structure includes a silicon-based portion exposed in a cavity of a substrate. The method further includes depositing a metal layer over the precleaned contact structure to form a deposited contact structure. The method further includes introducing a metal halide precursor to the deposited contact structure to at least partially remove the second layer from the deposited contact structure to form an etched contact structure. The method further includes depositing a metal fill layer onto the first layer to form a filled contact structure. The deposited metal fill layer comprises a super conformal profile.

公开(公告)号：US20250054812A1

公开(公告)日：2025-02-13

申请号：US18400819

申请日：2023-12-29

Applicant: Applied Materials, Inc.

Inventor： Qihao ZHU ,  Shumao ZHANG ,  Weifeng YE ,  Yiyang WAN ,  Gary HOW ,  Jianqiu GUO ,  Dong WANG ,  Shihchung CHEN ,  Liqi WU ,  Jiang LU

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/535

Abstract: Embodiments include a method of forming a contact structure on a semiconductor substrate. The method including selectively depositing a metal silicide layer over a contact formed within a cavity of a substrate and a bottom surface of the cavity using a selective deposition process, including forming a residual layer on a surface of a dielectric layer forming sidewalls of the cavity, wherein a thickness of the metal silicide layer deposited over the contact is greater than a thickness of the residual layer, removing at least a portion of the residual layer formed on the dielectric layer using an etching process that comprises exposing the metal selectively deposited layer to a metal halide containing precursor, and selectively depositing a metal fill over the metal silicide layer remaining over the contact after removing the at least the portion of the residual layer using a selective metal fill process.

公开(公告)号：US20240371654A1

公开(公告)日：2024-11-07

申请号：US18142940

申请日：2023-05-03

Applicant: Applied Materials, Inc.

Inventor： Qihao ZHU ,  Chi Hong CHING ,  Liqi WU ,  Tsungjui LIU ,  Gaurav THAREJA ,  Xinke WANG ,  Feng Q. LIU ,  Xi CEN ,  Kai WU ,  Yixiong YANG ,  Yuanhung LIU ,  Jiang LU ,  Rongjun WANG ,  Xianmin TANG

IPC: H01L21/3213 ,  H01L21/02 ,  H01L21/768

Abstract: A method of filling a feature in a semiconductor structure with metal includes depositing a metal cap layer on a bottom surface of a feature formed within a dielectric layer and top surfaces of the dielectric layer, partially filling the feature from the bottom surface with a flowable polymer layer, performing a metal pullback process to remove the metal cap layer on the top surfaces of the dielectric layer selectively to the dielectric layer, wherein the metal pullback process includes a first etch process including a chemical etch process using molybdenum hexafluoride (MoF6) to remove the metal cap layer selectively to the dielectric layer, and a second etch process to remove residues on etched surfaces of the dielectric layer, removing the flowable polymer layer, pre-cleaning a surface of the metal cap layer, and filling the feature from the surface of the metal cap layer with metal fill material.