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公开(公告)号:US20240379363A1
公开(公告)日:2024-11-14
申请号:US18582977
申请日:2024-02-21
Applicant: Applied Materials, Inc.
Inventor: Jianqiu GUO , Dong WANG , Shumao ZHANG , Liqi WU , ShihChung CHEN , Jiang LU
IPC: H01L21/28
Abstract: Methods are provided. In some embodiments, a method of forming a contact structure on a semiconductor substrate includes disposing a selective metal silicide layer on a surface of a contact structure by maintaining a first temperature of a substrate and providing a first carrier gas, a first metal-containing precursor, and a first hydrogen-containing precursor to a first deposition chamber. The method includes disposing a partially selective metal layer on a surface of the selective metal silicide layer and one or more surfaces of a cavity by maintaining a second temperature of the substrate and providing a second carrier gas, a second metal-containing precursor, and a reducing agent to the first deposition chamber or a second deposition chamber. The second metal-containing precursor and the reducing agent are introduced to the first deposition chamber or the second deposition chamber at a chamber pressure of about 50 T to about 150 T.
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公开(公告)号:US20200161181A1
公开(公告)日:2020-05-21
申请号:US16669082
申请日:2019-10-30
Applicant: Applied Materials, Inc.
Inventor: Wenhui WANG , Huixiong DAI , Christopher S. NGAI , Liqi WU , Wenyu ZHANG , Yongmei CHEN , Hao CHEN , Keith Tatseun WONG , Ke CHANG
IPC: H01L21/768 , H01L23/535 , H01L21/033 , H01L21/02
Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits, and more particularly, to methods for forming a layer. The layer may be a mask used in lithography process to pattern and form a trench. The mask is formed over a substrate having at least two distinct materials by a selective deposition process. The edges of the mask are disposed on an intermediate layer formed on at least one of the two distinct materials. The method includes removing the intermediate layer to form a gap between edges of the mask and the substrate and filling the gap with a different material than the mask or with the same material as the mask. By filling the gap with the same or different material as the mask, electrical paths are improved.
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公开(公告)号:US20250054767A1
公开(公告)日:2025-02-13
申请号:US18646055
申请日:2024-04-25
Applicant: Applied Materials, Inc.
Inventor: Qihao ZHU , Shumao ZHANG , Weifeng YE , Yiyang WAN , Gary HOW , Jianqiu GUO , Dong WANG , Shihchung CHEN , Liqi WU , Jiang LU
IPC: H01L21/285 , C23C16/02 , C23C16/04 , C23C16/14 , C23C16/42 , C23C16/455 , C23C16/50 , C23C16/52 , H01J37/32 , H01L21/02 , H01L21/768
Abstract: Embodiments include a method of forming a contact structure on a semiconductor substrate. The method including selectively depositing a metal silicide layer over a contact formed within a cavity of a substrate and a bottom surface of the cavity using a selective deposition process, including forming a residual layer on a surface of a dielectric layer forming sidewalls of the cavity, wherein a thickness of the metal silicide layer deposited over the contact is greater than a thickness of the residual layer, removing at least a portion of the residual layer formed on the dielectric layer using an etching process that comprises exposing the metal selectively deposited layer to a metal halide containing precursor, and selectively depositing a metal fill over the metal silicide layer remaining over the contact after removing the at least the portion of the residual layer using a selective metal fill process.
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公开(公告)号:US20240352577A1
公开(公告)日:2024-10-24
申请号:US18758099
申请日:2024-06-28
Applicant: Applied Materials, Inc.
Inventor: Chang KE , Wenyu ZHANG , Liqi WU
IPC: C23C16/18 , C23C16/02 , C23C16/04 , C23C16/08 , C23C16/455
CPC classification number: C23C16/18 , C23C16/0281 , C23C16/04 , C23C16/08 , C23C16/45525
Abstract: Methods and apparatus for selectively depositing a layer atop a substrate having a metal surface and a dielectric surface is disclosed, including: (a) contacting the metal surface with one or more metal halides such as metal chlorides or metal fluorides to form an exposed metal surface; (b) growing an organosilane based self-assembled monolayer atop the dielectric surface; and (c) selectively depositing a layer atop the exposed metal surface of the substrate, wherein the organosilane based self-assembled monolayer inhibits deposition of the layer atop the dielectric surface.
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5.
公开(公告)号:US20250112091A1
公开(公告)日:2025-04-03
申请号:US18899407
申请日:2024-09-27
Applicant: Applied Materials, Inc.
Inventor: Jianqiu GUO , Dong WANG , Liqi WU , Yiyang WAN , Shumao ZHANG , Qihao ZHU , Weifeng YE , Jiang LU , Shihchung CHEN
IPC: H01L21/768 , C23C16/02 , C23C16/42 , C23C16/455 , H01J37/32 , H01L21/285 , H01L23/532
Abstract: A contact structure includes a cavity comprising a device contact formed on a surface of a substrate, a bottom surface, and sidewalls. A metal silicide layer disposed over the surface of the device contact, the bottom surface, and the sidewalls of the cavity, and a treated surface formed over a portion of the metal silicide layer disposed over the sidewalls of the cavity.
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公开(公告)号:US20250079239A1
公开(公告)日:2025-03-06
申请号:US18459524
申请日:2023-09-01
Applicant: Applied Materials, Inc.
Inventor: Jiang LU , Shumao ZHANG , Liqi WU , Yiyang WAN , Weifeng YE , Jianqiu GUO , Dong WANG , Qihao ZHU
IPC: H01L21/768 , H01L21/3205
Abstract: Embodiments of the disclosure include a method of forming a gate-all-around (GAA) contact structure on a semiconductor substrate. The method will include removing material from surfaces of a feature formed in a surface of a substrate that includes a plurality of features that each include a plurality of source/drain contact surfaces, selectively forming a reaction product material over a surface of each of the plurality of source/drain contact surfaces, heating the substrate to a first temperature to remove the reaction product material from the surface of each of the plurality of contacts, selectively forming a first metal layer on the surface of each of the plurality of contacts, selectively forming a second metal layer on the first metal layer, and filling the feature with a conductor material, wherein the conductor material comprises tungsten (W) or molybdenum (Mo).
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7.
公开(公告)号:US20240363407A1
公开(公告)日:2024-10-31
申请号:US18309669
申请日:2023-04-28
Applicant: Applied Materials, Inc.
Inventor: Jie ZHANG , Liqi WU , Cory LAFOLLETT , Tsung-Han YANG , Wei WENG , Qihao ZHU , Jiang LU , Rongjun WANG , Xianmin TANG
IPC: H01L21/768 , H01L21/02
CPC classification number: H01L21/76877 , H01L21/02274 , H01L21/76843 , H01L21/76865 , H01L21/76883
Abstract: Embodiments of the present disclosure generally relate to a method for forming an electrically conductive feature on a substrate. In one embodiment, the method includes forming a first conductive layer via physical vapor deposition (PVD) in an opening of a substrate. The first conductive layer has a thickness of less than 20 angstroms. The method further includes forming a second conductive layer via PVD on the first conductive layer. The first conductive layer and the second conductive layer are formed at a temperature of less than 50° C. The method further includes annealing at least a portion of the first conductive layer and the second conductive layer.
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公开(公告)号:US20240379768A1
公开(公告)日:2024-11-14
申请号:US18196833
申请日:2023-05-12
Applicant: Applied Materials, Inc.
Inventor: Shumao ZHANG , Le ZHANG , Weifeng YE , Chih-Hsun HSU , David T. OR , Gary HOW , Yiyang WAN , Liqi WU , Jiang LU
IPC: H01L29/40 , H01L21/02 , H01L21/768
Abstract: Embodiments of the disclosure include a method of forming contact structure on a semiconductor substrate. The method includes treating a native oxide layer formed on a contact junction, wherein treating the native oxide layer forms a silica salt layer on the contact junction disposed within a contact feature that includes one or more surfaces that comprise silicon nitride. Then exposing the silica salt layer and the one or more surfaces to a plasma comprising oxygen, wherein the plasma forms a silicon oxynitride material on the one or more surfaces. Then removing the second silica salt layer, selectively forming a metal silicide layer on the contact junction, and then filling the contact feature with a metal, wherein filling the feature comprises selectively depositing a metal layer over the selectively formed metal silicide layer.
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公开(公告)号:US20230343643A1
公开(公告)日:2023-10-26
申请号:US17868475
申请日:2022-07-19
Applicant: Applied Materials, Inc.
Inventor: Chih-Hsun HSU , Shiyu YUE , Wei LEI , Yi XU , Jiang LU , Yu LEI , Ziye XIONG , Tsung-Han YANG , Zhimin QI , Aixi ZHANG , Jie ZHANG , Liqi WU , Rongjun WANG , Shihchung CHEN , Meng-Shan WU , Chun-Chieh WANG , Annamalai LAKSHMANAN , Yixiong YANG , Xianmin TANG
IPC: H01L21/768 , H01L23/522
CPC classification number: H01L21/76877 , H01L21/76876 , H01L21/76843 , H01L21/76865 , H01L23/5226 , H01L21/76826
Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on an exposed surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in a top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process removes or reduces the oxidized portion of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.
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公开(公告)号:US20220359279A1
公开(公告)日:2022-11-10
申请号:US17316649
申请日:2021-05-10
Applicant: Applied Materials, Inc.
Inventor: Xi CEN , Mingrui ZHAO , Peiqi WANG , Wei Min CHAN , Kai WU , Yi LUO , Liqi WU
IPC: H01L21/768 , C23C16/455 , C23C16/06
Abstract: Embodiments herein are generally directed to methods of forming high aspect ratio metal contacts and/or interconnect features, e.g., tungsten features, in a semiconductor device. Often, conformal deposition of tungsten in a high aspect ratio opening results in a seam and/or void where the outward growth of tungsten from one or more walls of the opening meet. Thus, the methods set forth herein provide for a desirable bottom up tungsten bulk fill to avoid the formation of seams and/or voids in the resulting interconnect features, and provide an improved contact metal structure and method of forming the same. In some embodiments, an improved overburden layer or overburden layer structure is formed over the field region of the substrate to enable the formation of a contact or interconnect structure that has improved characteristics over conventionally formed contacts or interconnect structures.
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