公开(公告)号：US07932169B2

公开(公告)日：2011-04-26

申请号：US12587301

申请日：2009-10-05

申请人： Luc Belanger ,  Stephen L. Buchwalter ,  Leena Paivikki Buchwalter ,  Ajay P. Giri ,  Jonathan H. Griffith ,  Donald W. Henderson ,  Sung Kwon Kang ,  Eric H. Laine ,  Christian Lavoie ,  Paul A. Lauro ,  Valérie Anne Oberson ,  Da-Yuan Shih ,  Kamalesh K Srivastava ,  Michael J. Sullivan

发明人： Luc Belanger ,  Stephen L. Buchwalter ,  Leena Paivikki Buchwalter ,  Ajay P. Giri ,  Jonathan H. Griffith ,  Donald W. Henderson ,  Sung Kwon Kang ,  Eric H. Laine ,  Christian Lavoie ,  Paul A. Lauro ,  Valérie Anne Oberson ,  Da-Yuan Shih ,  Kamalesh K Srivastava ,  Michael J. Sullivan

IPC分类号： H01L21/44

CPC分类号： H01L24/12 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/114 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/116 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/13023 ,  H01L2224/13111 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/01083 ,  H01L2924/01049 ,  H01L2224/13099

摘要： An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting metallurgy including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

摘要翻译： 一种适于将微电子器件芯片倒装连接到封装的互连结构，包括二层，三层或四层限流冶金，包括粘附/反应阻挡层，并且具有与含锡的组分反应的焊料可湿性层 无铅焊料，使得可焊接层在焊接期间可以完全消耗，但在焊接期间与无铅焊料接触后，阻挡层保持不变。 一个或多个无铅焊料球选择性地位于焊料润湿层上，该无铅焊球包含锡作为主要成分和一种或多种合金成分。

公开(公告)号：US20100276813A1

公开(公告)日：2010-11-04

申请号：US12839214

申请日：2010-07-19

申请人： Luc Belanger ,  David Danovitch ,  John U. Knickerbocker

发明人： Luc Belanger ,  David Danovitch ,  John U. Knickerbocker

IPC分类号： H01L23/488 ,  B23K31/02 ,  B23K1/20

CPC分类号： H01L24/11 ,  H01L25/0657 ,  H01L2224/13099 ,  H01L2224/48091 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2224/0401

摘要： A method of implementing an injection molded soldering process for three-dimensional structures, particularly, such as directed to three-dimensional semiconductor chip stacking. Also provide is an arrangement for implementing the injection molded soldering (IMS) process. Pursuant to an embodiment of the invention, the joining of the semiconductor chip layers with a substrate is implemented, rather than by means of currently known wire bond stacking, through the intermediary of columns of solder material formed by the IMS process, thereby providing electrical advantages imparted by the flip chip interconnect structures. In this connection, various diversely dimensioned solder column interconnects allow for simple and dependable connections to a substrate by a plurality of superimposed layers or stacked arrays of semiconductor components, such as semiconductor chips. In accordance with a further aspect, it is possible to derive a unique design for an IMS mold structure, which contains cavities for forming the columnar fill of solder, and which also incorporates further cavities acting as cutouts for dies or the positioning of other electronic packages or modules.

摘要翻译： 一种实现用于三维结构的注射成型焊接工艺的方法，特别是诸如针对三维半导体芯片堆叠的方法。 还提供了用于实现注射成型焊接（IMS）工艺的布置。 根据本发明的实施例，通过由IMS工艺形成的焊料柱的中间层，实现了半导体芯片层与基板的接合，而不是通过目前已知的引线键合堆叠，从而提供电气优点 由倒装芯片互连结构赋予。 在这方面，各种不同尺寸的焊料柱互连允许通过多个叠加层或诸如半导体芯片的半导体部件的堆叠阵列对衬底进行简单且可靠的连接。 根据另一方面，可以为IMS模具结构导出独特的设计，该模具结构包含用于形成焊料的柱状填充物的空腔，并且还包括用作模具的切口或其他电子封装的定位的另外的空腔 或模块。

公开(公告)号：US20090140423A1

公开(公告)日：2009-06-04

申请号：US11947070

申请日：2007-11-29

申请人： Luc Belanger ,  Srinivasa S.N. Reddy ,  Da-Yuan Shih ,  Brian R. Sundlof

发明人： Luc Belanger ,  Srinivasa S.N. Reddy ,  Da-Yuan Shih ,  Brian R. Sundlof

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L24/13 ,  C22C19/007 ,  C22C19/03 ,  C23C14/025 ,  C23C14/165 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/05001 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/0554 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/13006 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/013

摘要： A a metallic adhesion layer is formed on a last level metal plate exposed in an opening of a passivation layer. A Ni—Ti alloy in which the weight percentage of Ti is from about 6.5% to about 30% is deposited by sputtering onto the metallic adhesion layer to form an underbump metallic layer. A wetting layer comprising Cu or Ag or Au is deposited on top of Ni—Ti layer by sputtering. A C4 ball is applied to a surface of the wetting layer for C4 processing. The sputter deposition of the Ni—Ti alloy offers economic and performance advantages relative to known methods in the art since the Ni—Ti alloy in the composition of the present invention is non-magnetic and easy to sputter, and the consumption of the inventive Ni—Ti alloy is limited during C4 processing. Also, Sn in the solder reacts uniformly with both Ni and Ti and the consumption of Ni—Ti by Sn solder is less than that for pure Ni.

摘要翻译： 在暴露在钝化层的开口中的最后一级金属板上形成金属粘合层。 其中Ti的重量百分数为约6.5％至约30％的Ni-Ti合金通过溅射沉积到金属粘合层上以形成底部金属层。 通过溅射将包含Cu或Ag或Au的润湿层沉积在Ni-Ti层的顶部上。 将C4球施加到用于C4加工的润湿层的表面。 Ni-Ti合金的溅射沉积相对于本领域已知的方法提供经济和性能优点，因为本发明组合物中的Ni-Ti合金是非磁性的并且易于溅射，并且本发明的Ni -Ti合金在C4加工过程中受到限制。 此外，焊料中的Sn与Ni和Ti均匀地反应，Sn焊料的Ni-Ti的消耗小于纯Ni的消耗。

公开(公告)号：US20090134016A1

公开(公告)日：2009-05-28

申请号：US11946231

申请日：2007-11-28

申请人： Luc Belanger ,  Srinivasa S.N. Reddy ,  Brian R. Sundlof

发明人： Luc Belanger ,  Srinivasa S.N. Reddy ,  Brian R. Sundlof

IPC分类号： C23C14/00

CPC分类号： H01L24/13 ,  C22C19/03 ,  C23C14/025 ,  C23C14/165 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/05001 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/0554 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11334 ,  H01L2224/13006 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/00014 ,  H01L2924/013

摘要： A metallic adhesion layer is formed on a last level metal plate exposed in an opening of a passivation layer. A Ni—Cu alloy in which the weight percentage of Ni is from about 50% to about 70% is deposited by sputtering onto the metallic adhesion layer to form an underbump metallic layer. Optionally, a wetting layer comprising Cu or Au may be deposited by sputtering. A C4 ball is applied to a surface of the underbump metallic layer comprising the Ni—Cu alloy or the wetting layer for C4 processing. The sputter deposition of the Ni—Cu alloy offers economic advantages relative to known methods in the art since the Ni—Cu alloy in the composition of the present invention is non-magnetic and easy to sputter, and the consumption of the inventive Ni—Cu alloy is limited during C4 processing.

摘要翻译： 在暴露在钝化层的开口中的最后一级金属板上形成金属粘附层。 通过溅射将Ni的重量百分比为约50％至约70％的Ni-Cu合金沉积到金属粘合层上以形成下凸块金属层。 任选地，可以通过溅射沉积包含Cu或Au的润湿层。 将C4球施加到包含Ni-Cu合金或用于C4加工的润湿层的底部基底金属层的表面上。 Ni-Cu合金的溅射沉积相对于本领域已知的方法提供经济优势，因为本发明组合物中的Ni-Cu合金是非磁性的并且易于溅射，并且本发明的Ni-Cu C4加工时合金有限。

公开(公告)号：US20080157395A1

公开(公告)日：2008-07-03

申请号：US11616919

申请日：2006-12-28

申请人： Luc Belanger ,  Stephen L. Buchwalter ,  Leena Paivikki Buchwalter ,  Ajay P. Giri ,  Jonathan H. Griffith ,  Donald W. Henderson ,  Sung Kwon Kang ,  Eric H. Laine ,  Christian Lavoie ,  Paul A. Lauro ,  Valerie Anne Oberson ,  Da-Yuan Shih ,  Kamalesh K. Srivastava ,  Michael J. Sullivan

发明人： Luc Belanger ,  Stephen L. Buchwalter ,  Leena Paivikki Buchwalter ,  Ajay P. Giri ,  Jonathan H. Griffith ,  Donald W. Henderson ,  Sung Kwon Kang ,  Eric H. Laine ,  Christian Lavoie ,  Paul A. Lauro ,  Valerie Anne Oberson ,  Da-Yuan Shih ,  Kamalesh K. Srivastava ,  Michael J. Sullivan

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L24/12 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/114 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/116 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/13023 ,  H01L2224/13111 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/01083 ,  H01L2924/01049 ,  H01L2224/13099

摘要： An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting metallurgy including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

摘要翻译： 一种适于将微电子器件芯片倒装连接到封装的互连结构，包括二层，三层或四层限流冶金，包括粘附/反应阻挡层，并且具有与含锡的组分反应的焊料可湿性层 无铅焊料，使得可焊接层在焊接期间可以完全消耗，但在焊接期间与无铅焊料接触后，阻挡层保持不变。 一个或多个无铅焊料球选择性地位于焊料润湿层上，该无铅焊球包含锡作为主要成分和一种或多种合金成分。

公开(公告)号：US08314500B2

公开(公告)日：2012-11-20

申请号：US11616919

申请日：2006-12-28

申请人： Luc Belanger ,  Stephen L. Buchwalter ,  Leena Paivikki Buchwalter ,  Ajay P. Giri ,  Jonathan H. Griffith ,  Donald W. Henderson ,  Sung Kwon Kang ,  Eric H. Laine ,  Christian Lavoie ,  Paul A. Lauro ,  Valérie Anne Oberson ,  Da-Yuan Shih ,  Kamalesh K Srivastava ,  Michael J. Sullivan

发明人： Luc Belanger ,  Stephen L. Buchwalter ,  Leena Paivikki Buchwalter ,  Ajay P. Giri ,  Jonathan H. Griffith ,  Donald W. Henderson ,  Sung Kwon Kang ,  Eric H. Laine ,  Christian Lavoie ,  Paul A. Lauro ,  Valérie Anne Oberson ,  Da-Yuan Shih ,  Kamalesh K Srivastava ,  Michael J. Sullivan

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/12 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/114 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/116 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/13023 ,  H01L2224/13111 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/0104 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/01083 ,  H01L2924/01049 ,  H01L2224/13099

摘要： An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting metallurgy including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

摘要翻译： 一种适于将微电子器件芯片倒装连接到封装的互连结构，包括二层，三层或四层限流冶金，包括粘附/反应阻挡层，并且具有与含锡的组分反应的焊料可湿性层 无铅焊料，使得可焊接层在焊接期间可以完全消耗，但在焊接期间与无铅焊料接触后，阻挡层保持不变。 一个或多个无铅焊料球选择性地位于焊料润湿层上，该无铅焊球包含锡作为主要成分和一种或多种合金成分。

公开(公告)号：US20080185703A1

公开(公告)日：2008-08-07

申请号：US11670543

申请日：2007-02-02

申请人： Luc Belanger ,  David Danovitch ,  John U. Knickerbocker

发明人： Luc Belanger ,  David Danovitch ,  John U. Knickerbocker

IPC分类号： H01L23/488 ,  H01L21/58

CPC分类号： H01L24/11 ,  H01L25/0657 ,  H01L2224/13099 ,  H01L2224/48091 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2224/0401

摘要： A method of implementing an injection molded soldering process for three-dimensional structures, particularly, such as directed to three-dimensional semiconductor chip stacking. Also provide is an arrangement for implementing the injection molded soldering (IMS) process. Pursuant to an embodiment of the invention, the joining of the semiconductor chip layers with a substrate is implemented, rather than by means of currently known wire bond stacking, through the intermediary of columns of solder material formed by the IMS process, thereby providing electrical advantages imparted by the flip chip interconnect structures. In this connection, various diversely dimensioned solder column interconnects allow for simple and dependable connections to a substrate by a plurality of superimposed layers or stacked arrays of semiconductor components, such as semiconductor chips. In accordance with a further aspect, it is possible to derive a unique design for an IMS mold structure, which contains cavities for forming the columnar fill of solder, and which also incorporates further cavities acting as cutouts for dies or the positioning of other electronic packages or modules.

摘要翻译： 一种实现用于三维结构的注射成型焊接工艺的方法，特别是诸如针对三维半导体芯片堆叠的方法。 还提供了用于实现注射成型焊接（IMS）工艺的布置。 根据本发明的实施例，通过由IMS工艺形成的焊料柱的中间层，实现了半导体芯片层与基板的接合，而不是通过目前已知的引线键合堆叠，从而提供电气优点 由倒装芯片互连结构赋予。 在这方面，各种不同尺寸的焊料柱互连允许通过多个叠加层或诸如半导体芯片的半导体部件的堆叠阵列对衬底进行简单且可靠的连接。 根据另一方面，可以为IMS模具结构导出独特的设计，该模具结构包含用于形成焊料的柱状填充物的空腔，并且还包括用作模具的切口或其他电子封装的定位的另外的空腔 或模块。

公开(公告)号：US20060035454A1

公开(公告)日：2006-02-16

申请号：US11048578

申请日：2005-02-01

申请人： Luc Belanger ,  Peter Gruber ,  Valerie Oberson ,  Christopher Tessler

发明人： Luc Belanger ,  Peter Gruber ,  Valerie Oberson ,  Christopher Tessler

IPC分类号： B23K35/12 ,  H01L21/44

CPC分类号： H01L24/11 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05572 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/11003 ,  H01L2224/111 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H05K3/3468 ,  H05K2203/0113 ,  H05K2203/0338 ,  H05K2203/043 ,  H05K2203/087 ,  H05K2203/1157 ,  H05K2203/128 ,  H01L2924/0105 ,  H01L2224/11 ,  H01L2224/05099

摘要： Disclosed is a new process that permits the transfer and reflow of solder features produced by Injection Molded Solder (IMS) from a mold plate to a solder receiving substrate without the use of flux. Several embodiments produce solder transfer and reflow separately or together and use either formic acid vapor or partial concentration of hydrogen, both in nitrogen, as the oxide reducing atmosphere. A final embodiment produces fluxless transfer and reflow in only nitrogen through the use of ultrasonic vibration between the solder filled mold plate and solder receiving substrate.

摘要翻译： 公开了一种允许从注射成型焊料（IMS）产生的焊料特征从模板向焊料接收衬底的转移和回流而不使用焊剂的新方法。 几种实施方式分别产生焊料转移和回流，或者在一起并且在氮气中使用甲酸蒸气或部分浓度的氢作为氧化物还原气氛。 最终实施例通过在焊料填充的模具板和焊料接收衬底之间使用超声波振动，仅在氮气中产生无磁通转移和回流。

公开(公告)号：US20050263571A1

公开(公告)日：2005-12-01

申请号：US10857988

申请日：2004-05-30

申请人： Luc Belanger ,  Guy Brouillette ,  Stephen Buchwalter ,  Peter Gruber ,  Hideo Kimura ,  Jean-Luc Landreville ,  Frederic Manurer ,  Marc Montminy ,  Valerie Oberson ,  Da-Yuan Shih ,  Stephane St-Onge ,  Michel Turgeon ,  Takeshi Yamada

发明人： Luc Belanger ,  Guy Brouillette ,  Stephen Buchwalter ,  Peter Gruber ,  Hideo Kimura ,  Jean-Luc Landreville ,  Frederic Manurer ,  Marc Montminy ,  Valerie Oberson ,  Da-Yuan Shih ,  Stephane St-Onge ,  Michel Turgeon ,  Takeshi Yamada

IPC分类号： B23K3/06 ,  B23K31/02 ,  H05K3/34

CPC分类号： B23K3/0623 ,  H05K3/3457 ,  H05K2203/0113 ,  H05K2203/0126 ,  H05K2203/0338 ,  H05K2203/1121

摘要： A method and apparatus for forming solder bumps by molten solder deposition into cavity arrays in a substrate immediately followed by solidification of molten solder such that precise replication of cavity volumes is consistently achieved in formed solder bump arrays. Various solder filling problems, such as those caused by surface tension and oxidation effects, are overcome by a combination of narrow molten Solder dispense slots and solidification of dispensed molten solder.

摘要翻译： 一种用于通过熔融焊料沉积形成焊料凸块的方法和装置，紧接在熔融焊料的固化之后，立即在形成的焊料凸块阵列中实现空腔体积的精确复制。 各种焊料填充问题，例如由表面张力和氧化作用引起的焊料填充问题，都是通过组合窄熔融焊料分配槽和分散的熔融焊料的固化来克服的。

公开(公告)号：US07952205B2

公开(公告)日：2011-05-31

申请号：US12839214

申请日：2010-07-19

申请人： Luc Belanger ,  David Danovitch ,  John U. Knickerbocker

发明人： Luc Belanger ,  David Danovitch ,  John U. Knickerbocker

IPC分类号： H01L29/40

CPC分类号： H01L24/11 ,  H01L25/0657 ,  H01L2224/13099 ,  H01L2224/48091 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2224/0401

摘要： A method of implementing an injection molded soldering process for three-dimensional structures, particularly, such as directed to three-dimensional semiconductor chip stacking. Also provide is an arrangement for implementing the injection molded soldering (IMS) process. Pursuant to an embodiment of the invention, the joining of the semiconductor chip layers with a substrate is implemented, rather than by means of currently known wire bond stacking, through the intermediary of columns of solder material formed by the IMS process, thereby providing electrical advantages imparted by the flip chip interconnect structures. In this connection, various diversely dimensioned solder column interconnects allow for simple and dependable connections to a substrate by a plurality of superimposed layers or stacked arrays of semiconductor components, such as semiconductor chips. In accordance with a further aspect, it is possible to derive a unique design for an IMS mold structure, which contains cavities for forming the columnar fill of solder, and which also incorporates further cavities acting as cutouts for dies or the positioning of other electronic packages or modules.

摘要翻译： 一种实现用于三维结构的注射成型焊接工艺的方法，特别是诸如针对三维半导体芯片堆叠的方法。 还提供了用于实现注射成型焊接（IMS）工艺的布置。 根据本发明的实施例，通过由IMS工艺形成的焊料柱的中间层，实现了半导体芯片层与基板的接合，而不是通过目前已知的引线键合堆叠，从而提供电气优点 由倒装芯片互连结构赋予。 在这方面，各种不同尺寸的焊料柱互连允许通过多个叠加层或诸如半导体芯片的半导体部件的堆叠阵列对衬底进行简单且可靠的连接。 根据另一方面，可以为IMS模具结构导出独特的设计，该模具结构包含用于形成焊料的柱状填充物的空腔，并且还包括用作模具的切口或其他电子封装的定位的另外的空腔 或模块。